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bg "0,0,32768"
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text (MLText
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va (VaSet
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ps "TopLeftStrategy"
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st "1"
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stg "VerticalLayoutStrategy"
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va (VaSet
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uid 436,0
va (VaSet
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shape (RectFrame
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ps "TopLeftStrategy"
text (MLText
uid 440,0
va (VaSet
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xt "49150,2500,62150,3400"
st "g1: IF depth > 1 GENERATE"
tm "FrameTitleTextMgr"
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ps "TopLeftStrategy"
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va (VaSet
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va (VaSet
font "courier,8,0"
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xt "49500,4500,50000,5400"
st "2"
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stg "VerticalLayoutStrategy"
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va (VaSet
font "courier,8,1"
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xt "65000,28000,74500,28900"
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va (VaSet
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xt "65000,29000,65000,29000"
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tg (CPTG
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stg "VerticalLayoutStrategy"
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va (VaSet
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xt "54000,43400,57000,44400"
st "write"
blo "54000,44200"
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)
thePort (LogicalPort
decl (Decl
n "write"
t "std_ulogic"
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)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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tg (CPTG
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f (Text
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va (VaSet
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xt "54000,47400,57000,48400"
st "clock"
blo "54000,48200"
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)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
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suid 2,0
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)
)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "52250,49625,53000,50375"
)
tg (CPTG
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stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
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xt "54000,49400,57000,50400"
st "reset"
blo "54000,50200"
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thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
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suid 3,0
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)
)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
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tg (CPTG
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f (Text
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va (VaSet
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xt "63801,39400,68001,40400"
st "dataOut"
ju 2
blo "68001,40200"
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thePort (LogicalPort
m 1
decl (Decl
n "dataOut"
t "std_ulogic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 4
suid 4,0
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)
)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 270
va (VaSet
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tg (CPTG
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f (Text
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va (VaSet
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xt "65600,43400,68000,44400"
st "read"
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blo "68000,44200"
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)
thePort (LogicalPort
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n "read"
t "std_ulogic"
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suid 5,0
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)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "52250,39625,53000,40375"
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tg (CPTG
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stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
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xt "53999,39400,57599,40400"
st "dataIn"
blo "53999,40200"
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)
thePort (LogicalPort
decl (Decl
n "dataIn"
t "std_ulogic_vector"
b "(dataBitNb-1 DOWNTO 0)"
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suid 6,0
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)
)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 90
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tg (CPTG
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f (Text
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va (VaSet
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xt "65000,41400,68000,42400"
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blo "68000,42200"
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)
thePort (LogicalPort
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decl (Decl
n "empty"
t "std_ulogic"
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)
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ps "OnEdgeStrategy"
shape (Triangle
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ro 270
va (VaSet
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tg (CPTG
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va (VaSet
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xt "54000,41400,56400,42400"
st "full"
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)
thePort (LogicalPort
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n "full"
t "std_ulogic"
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)
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xt "53000,36000,69000,52000"
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va (VaSet
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xt "53600,51800,57200,52800"
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xt "53600,53800,54800,54800"
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xt "53000,56000,73000,56900"
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xt "37000,18000,52250,18000"
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end &19
es 0
sat 32
eat 32
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st 0
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tg (WTG
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va (VaSet
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xt "37000,16600,40500,17900"
st "clock"
blo "37000,17600"
tm "WireNameMgr"
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)
on &2
)
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ps "OnConnectorStrategy"
shape (Circle
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va (VaSet
vasetType 1
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xt "46600,9600,47400,10400"
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)
)
]
shape (OrthoPolyLine
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va (VaSet
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xt "37000,10000,52250,10000"
pts [
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start &3
end &23
es 0
sat 32
eat 32
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stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "37000,8600,41200,9900"
st "dataIn"
blo "37000,9600"
tm "WireNameMgr"
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)
on &4
)
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ps "OnConnectorStrategy"
shape (Circle
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va (VaSet
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xt "74600,9600,75400,10400"
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)
)
]
shape (OrthoPolyLine
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va (VaSet
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lineWidth 2
)
xt "69750,10000,85000,10000"
pts [
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)
start &5
end &21
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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)
xt "80000,8600,84900,9900"
st "dataOut"
blo "80000,9600"
tm "WireNameMgr"
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)
on &6
)
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uid 461,0
ps "OnConnectorStrategy"
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va (VaSet
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xt "76600,11600,77400,12400"
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)
)
]
shape (OrthoPolyLine
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va (VaSet
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)
xt "69750,12000,85000,12000"
pts [
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)
start &7
end &24
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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)
xt "81000,10600,84500,11900"
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blo "81000,11600"
tm "WireNameMgr"
)
)
on &8
)
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ps "OnConnectorStrategy"
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va (VaSet
vasetType 1
)
xt "44600,11600,45400,12400"
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)
)
]
shape (OrthoPolyLine
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va (VaSet
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)
xt "37000,12000,52250,12000"
pts [
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)
start &9
end &25
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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)
xt "37000,10600,39800,11900"
st "full"
blo "37000,11600"
tm "WireNameMgr"
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)
on &10
)
*67 (Wire
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ps "OnConnectorStrategy"
shape (Circle
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vasetType 1
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xt "78600,13600,79400,14400"
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)
]
shape (OrthoPolyLine
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va (VaSet
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)
xt "69750,14000,85000,14000"
pts [
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)
start &11
end &22
es 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 89,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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)
xt "82000,12600,84800,13900"
st "read"
blo "82000,13600"
tm "WireNameMgr"
)
)
on &12
)
*69 (Wire
uid 99,0
shape (OrthoPolyLine
uid 100,0
va (VaSet
vasetType 3
)
xt "37000,20000,52250,20000"
pts [
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)
start &13
end &20
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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)
xt "37000,18600,40500,19900"
st "reset"
blo "37000,19600"
tm "WireNameMgr"
)
)
on &14
)
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ps "OnConnectorStrategy"
shape (Circle
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va (VaSet
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xt "42600,13600,43400,14400"
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)
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shape (OrthoPolyLine
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va (VaSet
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xt "37000,14000,52250,14000"
pts [
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)
start &15
end &18
es 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 117,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "37000,12600,40500,13900"
st "write"
blo "37000,13600"
tm "WireNameMgr"
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on &16
)
*72 (Wire
uid 363,0
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va (VaSet
vasetType 3
)
xt "45000,50000,52250,50000"
pts [
"45000,50000"
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)
end &49
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 369,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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xt "45000,48600,48500,49900"
st "reset"
blo "45000,49600"
tm "WireNameMgr"
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)
on &14
)
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uid 371,0
shape (OrthoPolyLine
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va (VaSet
vasetType 3
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xt "43000,14000,52250,44000"
pts [
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)
start &71
end &47
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "48000,42600,51500,43900"
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tm "WireNameMgr"
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on &16
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vasetType 3
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xt "45000,48000,52250,48000"
pts [
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)
end &48
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "45000,46600,48500,47900"
st "clock"
blo "45000,47600"
tm "WireNameMgr"
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)
on &2
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va (VaSet
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xt "69750,12000,77000,42000"
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start &64
end &53
sat 32
eat 32
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st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "70000,40600,73500,41900"
st "empty"
blo "70000,41600"
tm "WireNameMgr"
)
)
on &8
)
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va (VaSet
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xt "45000,12000,52250,42000"
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start &66
end &54
sat 32
eat 32
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st 0
sf 1
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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st "full"
blo "49000,41600"
tm "WireNameMgr"
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)
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)
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uid 403,0
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va (VaSet
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xt "47000,10000,52250,40000"
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start &60
end &52
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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blo "48000,39600"
tm "WireNameMgr"
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)
on &4
)
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uid 411,0
shape (OrthoPolyLine
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va (VaSet
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xt "69750,10000,75000,40000"
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start &62
end &50
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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xt "70000,38600,74900,39900"
st "dataOut"
blo "70000,39600"
tm "WireNameMgr"
)
)
on &6
)
*79 (Wire
uid 419,0
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va (VaSet
vasetType 3
)
xt "69750,14000,79000,44000"
pts [
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)
start &68
end &51
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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st "read"
blo "70000,43600"
tm "WireNameMgr"
)
)
on &12
)
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isActive 1
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xySpacing 1000
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stg "VerticalLayoutStrategy"
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tm "PackageList"
)
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)
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st "`resetall
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)
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va (VaSet
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tm "BdCompilerDirectivesTextMgr"
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va (VaSet
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xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
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windowsPaperName "A4"
windowsPaperType 9
scale 75
exportedDirectories [
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xt "0,0,15000,5000"
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text (MLText
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)
xt "200,200,2200,1100"
st "
Text
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tm "CommentText"
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)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
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va (VaSet
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xt "0,0,1500,1750"
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iconMaskName "reqTracerRequirement.msk"
)
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text (MLText
va (VaSet
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font "courier,8,0"
)
xt "450,2150,1450,3050"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
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shape (RectFrame
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lineColor "32768,0,0"
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)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "courier,10,1"
)
xt "1000,1000,5600,2200"
st "Panel0"
blo "1000,2000"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "40000,56832,65535"
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xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
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xt "1350,3200,6650,4400"
st "<library>"
blo "1350,4200"
tm "BdLibraryNameMgr"
)
*91 (Text
va (VaSet
)
xt "1350,4400,6150,5600"
st "<block>"
blo "1350,5400"
tm "BlkNameMgr"
)
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va (VaSet
)
xt "1350,5600,3250,6800"
st "I0"
blo "1350,6600"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
)
xt "1350,13200,1350,13200"
)
header ""
)
elements [
]
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viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultMWComponent (MWC
shape (Rectangle
va (VaSet
vasetType 1
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xt "-950,0,8950,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
)
xt "-450,3200,3750,4400"
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blo "-450,4200"
)
*94 (Text
va (VaSet
)
xt "-450,4400,8450,5600"
st "MWComponent"
blo "-450,5400"
)
*95 (Text
va (VaSet
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xt "-450,5600,1450,6800"
st "I0"
blo "-450,6600"
tm "InstanceNameMgr"
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)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
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xt "-7450,1200,-7450,1200"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
defaultSaComponent (SaComponent
shape (Rectangle
va (VaSet
vasetType 1
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xt "0,0,8000,10000"
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ttg (MlTextGroup
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stg "VerticalLayoutStrategy"
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xt "-200,3200,4000,4400"
st "Library"
blo "-200,4200"
tm "BdLibraryNameMgr"
)
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va (VaSet
)
xt "-200,4400,8200,5600"
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blo "-200,5400"
tm "CptNameMgr"
)
*98 (Text
va (VaSet
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st "I0"
blo "-200,6600"
tm "InstanceNameMgr"
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ga (GenericAssociation
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xt "-7200,1200,-7200,1200"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
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va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
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iconMaskName "UnknownFile.msk"
)
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portVis (PortSigDisplay
)
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)
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)
xt "-1200,0,9200,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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xt "-700,3200,3500,4400"
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blo "-700,4200"
)
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va (VaSet
)
xt "-700,4400,8700,5600"
st "VhdlComponent"
blo "-700,5400"
)
*101 (Text
va (VaSet
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xt "-700,5600,1200,6800"
st "I0"
blo "-700,6600"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
)
xt "-7700,1200,-7700,1200"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
entityPath ""
archName ""
archPath ""
)
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va (VaSet
vasetType 1
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)
xt "-1850,0,9850,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
)
xt "-1350,3200,2850,4400"
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)
*103 (Text
va (VaSet
)
xt "-1350,4400,9350,5600"
st "VerilogComponent"
blo "-1350,5400"
)
*104 (Text
va (VaSet
)
xt "-1350,5600,550,6800"
st "I0"
blo "-1350,6600"
tm "InstanceNameMgr"
)
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)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
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)
xt "-8350,1200,-8350,1200"
)
header ""
)
elements [
]
)
entityPath ""
)
defaultHdlText (HdlText
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,32768"
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
font "courier,8,0"
)
xt "3000,4000,5000,5000"
st "eb1"
blo "3000,4800"
tm "HdlTextNameMgr"
)
*106 (Text
va (VaSet
font "courier,8,0"
)
xt "3000,5000,4000,6000"
st "1"
blo "3000,5800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultEmbeddedText (EmbeddedText
commentText (CommentText
ps "CenterOffsetStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
)
xt "0,0,18000,5000"
)
text (MLText
va (VaSet
font "courier,8,0"
)
xt "200,200,2200,1100"
st "
Text
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 4600
visibleWidth 17600
)
)
)
defaultGlobalConnector (GlobalConnector
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va (VaSet
vasetType 1
fg "65535,65535,0"
)
xt "-1000,-1000,1000,1000"
radius 1000
)
name (Text
va (VaSet
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)
xt "-550,-500,550,500"
st "G"
blo "-550,300"
)
)
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ps "OnConnectorStrategy"
shape (Line2D
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"0,0"
"1000,1000"
]
va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
)
)
defaultBdJunction (BdJunction
ps "OnConnectorStrategy"
shape (Circle
va (VaSet
vasetType 1
)
xt "-400,-400,400,400"
radius 400
)
)
defaultPortIoIn (PortIoIn
shape (CompositeShape
va (VaSet
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fg "0,0,32768"
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optionalChildren [
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ro 270
xt "-2000,-375,-500,375"
)
(Line
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ro 270
xt "-500,0,0,0"
pts [
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)
stc 0
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
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)
xt "-1375,-1000,-1375,-1000"
ju 2
blo "-1375,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoOut (PortIoOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
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ro 270
xt "500,-375,2000,375"
)
(Line
sl 0
ro 270
xt "0,0,500,0"
pts [
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)
]
)
stc 0
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
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font "courier,12,0"
)
xt "625,-1000,625,-1000"
blo "625,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoInOut (PortIoInOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
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sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
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)
]
)
stc 0
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
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font "courier,12,0"
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultPortIoBuffer (PortIoBuffer
shape (CompositeShape
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
)
optionalChildren [
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xt "500,-375,2000,375"
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(Line
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xt "0,0,500,0"
pts [
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"500,0"
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stc 0
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
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)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultSignal (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
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]
)
ss 0
es 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
font "courier,12,0"
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xt "0,0,3400,1400"
st "sig0"
blo "0,1200"
tm "WireNameMgr"
)
)
)
defaultBus (Wire
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va (VaSet
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pts [
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es 0
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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va (VaSet
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xt "0,0,4700,1400"
st "dbus0"
blo "0,1200"
tm "WireNameMgr"
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)
)
defaultBundle (Bundle
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va (VaSet
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lineStyle 3
lineWidth 1
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pts [
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ss 0
es 0
sat 32
eat 32
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tm "BundleNameMgr"
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bundleNet &0
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xt "0,0,10000,12000"
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portMapText (BiTextGroup
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stg "VerticalLayoutStrategy"
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va (VaSet
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)
second (MLText
va (VaSet
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tm "PortMapTextMgr"
)
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xt "0,0,20000,20000"
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tm "FrameTitleTextMgr"
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tm "FrameSeqNumMgr"
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decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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va (VaSet
font "courier,8,1"
)
xt "12000,20000,22000,21000"
st "Frame Declarations"
blo "12000,20800"
)
*108 (MLText
va (VaSet
font "courier,8,0"
)
xt "12000,21000,12000,21000"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "28160,28160,28160"
lineStyle 1
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
font "courier,8,0"
)
xt "0,-1100,9000,-200"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1450,1450"
)
num (Text
va (VaSet
font "courier,8,0"
)
xt "250,250,1250,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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font "courier,8,1"
)
xt "12000,20000,22000,21000"
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blo "12000,20800"
)
*110 (MLText
va (VaSet
font "courier,8,0"
)
xt "12000,21000,12000,21000"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,8,0"
)
xt "0,750,2100,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,8,0"
)
xt "0,750,2100,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
isHidden 1
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "courier,8,1"
)
xt "-3000,5400,3500,6300"
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blo "-3000,6100"
)
portLabel (Text
uid 3,0
va (VaSet
font "courier,8,1"
)
xt "-3000,6400,0,7300"
st "Ports:"
blo "-3000,7100"
)
preUserLabel (Text
uid 4,0
va (VaSet
isHidden 1
font "courier,8,1"
)
xt "-3000,5400,1500,6300"
st "Pre User:"
blo "-3000,6100"
)
preUserText (MLText
uid 5,0
va (VaSet
isHidden 1
)
xt "-3000,5400,-3000,5400"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
font "courier,8,1"
)
xt "-3000,17000,5500,17900"
st "Diagram Signals:"
blo "-3000,17700"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "courier,8,1"
)
xt "-3000,5400,2500,6300"
st "Post User:"
blo "-3000,6100"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
)
xt "-3000,5400,-3000,5400"
tm "BdDeclarativeTextMgr"
)
)
commonDM (CommonDM
ldm (LogicalDM
ordering 1
suid 8,0
usingSuid 1
emptyRow *111 (LEmptyRow
)
uid 150,0
optionalChildren [
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)
*113 (TitleRowHdr
)
*114 (FilterRowHdr
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*115 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*116 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*117 (GroupColHdr
tm "GroupColHdrMgr"
)
*118 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*119 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*120 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*121 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*122 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*123 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
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port (LogicalPort
decl (Decl
n "write"
t "std_ulogic"
o 1
suid 8,0
)
)
uid 121,0
)
*125 (LeafLogPort
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 1,0
)
)
uid 123,0
)
*126 (LeafLogPort
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 3
suid 7,0
)
)
uid 125,0
)
*127 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "dataOut"
t "std_ulogic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 4
suid 3,0
)
)
uid 127,0
)
*128 (LeafLogPort
port (LogicalPort
decl (Decl
n "read"
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o 5
suid 6,0
)
)
uid 129,0
)
*129 (LeafLogPort
port (LogicalPort
decl (Decl
n "dataIn"
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o 6
suid 2,0
)
)
uid 131,0
)
*130 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "empty"
t "std_ulogic"
o 7
suid 4,0
)
)
uid 133,0
)
*131 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "full"
t "std_ulogic"
o 8
suid 5,0
)
)
uid 135,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
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optionalChildren [
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sheetRow (SheetRow
headerVa (MVa
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cellVa (MVa
cellColor "65535,65535,65535"
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groupVa (MVa
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)
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optionalChildren [
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hidden 1
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sheetCol (SheetCol
propVa (MVa
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optionalChildren [
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litem &118
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dimension 100
uid 172,0
)
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pos 6
dimension 50
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pos 7
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fixedCol 4
fixedRow 2
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vaOverrides [
]
)
]
)
uid 149,0
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genericsCommonDM (CommonDM
ldm (LogicalDM
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uid 179,0
optionalChildren [
*154 (RefLabelRowHdr
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*155 (TitleRowHdr
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*156 (FilterRowHdr
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*157 (RefLabelColHdr
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*158 (RowExpandColHdr
tm "RowExpandColHdrMgr"
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*159 (GroupColHdr
tm "GroupColHdrMgr"
)
*160 (NameColHdr
tm "GenericNameColHdrMgr"
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*161 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*162 (InitColHdr
tm "GenericValueColHdrMgr"
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*163 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
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*164 (EolColHdr
tm "GenericEolColHdrMgr"
)
*165 (LogGeneric
generic (GiElement
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type "positive"
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uid 468,0
)
*166 (LogGeneric
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uid 470,0
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pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 191,0
optionalChildren [
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sheetRow (SheetRow
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cellVa (MVa
cellColor "65535,65535,65535"
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font "courier,10,0"
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groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
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emptyMRCItem *168 (MRCItem
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dimension 20
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uid 193,0
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hidden 1
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sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
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uid 197,0
optionalChildren [
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dimension 20
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dimension 100
uid 201,0
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dimension 50
uid 202,0
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dimension 80
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fixedCol 3
fixedRow 2
name "Ports"
uid 192,0
vaOverrides [
]
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]
)
uid 178,0
type 1
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activeModelName "BlockDiag:GEN"
frameCount 2
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