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27 lines
690 B
VHDL
27 lines
690 B
VHDL
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LIBRARY Common;
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USE Common.commonLib.all;
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LIBRARY Common_test;
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USE Common_test.testUtils.all;
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ARCHITECTURE test OF commonLib_tb IS
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constant maxPowOf2: positive := 10;
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constant indent: string(1 to 2) := (others => ' ');
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BEGIN
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process
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variable value, bitNb: positive;
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BEGIN
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print("testing function " & '"' & "requiredBitNb" & '"');
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for index in 1 to maxPowOf2 loop
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for offset in -1 to 1 loop
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value := 2**index + offset;
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bitNb := requiredBitNb(value);
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print(indent & "requiredBitNb(" & sprintf("%d", value) & ") = " & sprintf("%d", bitNb));
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end loop;
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print("");
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end loop;
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wait;
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end process;
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END ARCHITECTURE test;
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