Cursor/Libs/Memory_test/hds/flash_tb/struct.bd

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dialect 11
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "ieee"
unitName "numeric_std"
)
]
instances [
(Instance
name "I1"
duLibraryName "memory_test"
duName "flash_tester"
elements [
(GiElement
name "addressBitNb"
type "positive"
value "addressBitNb"
)
(GiElement
name "dataBitNb"
type "positive"
value "dataBitNb"
)
]
mwi 0
uid 1774,0
)
(Instance
name "I0"
duLibraryName "memory_test"
duName "flash_28F128J3A"
elements [
(GiElement
name "fileSpec"
type "string"
value "\"U:\\ELN_board\\Simulation\\flash.srec\""
)
(GiElement
name "T_W13"
type "time"
value "500 ns"
)
(GiElement
name "T_W16_program"
type "time"
value "1 us"
)
(GiElement
name "T_W16_erase"
type "time"
value "1.5 us"
)
(GiElement
name "T_R2"
type "time"
value "120 ns"
)
(GiElement
name "T_R3"
type "time"
value "120 ns"
)
(GiElement
name "T_R7"
type "time"
value "0 ns"
)
(GiElement
name "T_R8"
type "time"
value "55 ns"
)
(GiElement
name "T_R9"
type "time"
value "15 ns"
)
]
mwi 0
uid 5435,0
)
]
libraryRefs [
"ieee"
]
)
version "31.1"
appVersion "2018.1 (Build 12)"
noEmbeddedEditors 1
model (BlockDiag
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hdl"
)
(vvPair
variable "HDSDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds"
)
(vvPair
variable "SideDataDesignDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/flash_tb/struct.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/flash_tb/struct.bd.user"
)
(vvPair
variable "SourceDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "struct"
)
(vvPair
variable "concat_file"
value "concatenated"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/flash_tb"
)
(vvPair
variable "d_logical"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/flash_tb"
)
(vvPair
variable "date"
value "08/28/19"
)
(vvPair
variable "day"
value "Wed"
)
(vvPair
variable "day_long"
value "Wednesday"
)
(vvPair
variable "dd"
value "28"
)
(vvPair
variable "entity_name"
value "flash_tb"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "struct.bd"
)
(vvPair
variable "f_logical"
value "struct.bd"
)
(vvPair
variable "f_noext"
value "struct"
)
(vvPair
variable "graphical_source_author"
value "francois"
)
(vvPair
variable "graphical_source_date"
value "08/28/19"
)
(vvPair
variable "graphical_source_group"
value "francois"
)
(vvPair
variable "graphical_source_host"
value "Aphelia"
)
(vvPair
variable "graphical_source_time"
value "13:45:28"
)
(vvPair
variable "group"
value "francois"
)
(vvPair
variable "host"
value "Aphelia"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "Memory_test"
)
(vvPair
variable "library_downstream_ModelSim"
value "D:\\Users\\ELN_labs\\VHDL_comp"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/Libs/Memory_test/work"
)
(vvPair
variable "mm"
value "08"
)
(vvPair
variable "module_name"
value "flash_tb"
)
(vvPair
variable "month"
value "Aug"
)
(vvPair
variable "month_long"
value "August"
)
(vvPair
variable "p"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/flash_tb/struct.bd"
)
(vvPair
variable "p_logical"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/flash_tb/struct.bd"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "hds"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_ISEPath"
value "D:\\Labs\\ElN\\BoardTester\\Board\\ise"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "C:\\EDA\\Modelsim\\win32"
)
(vvPair
variable "task_NC-SimPath"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "bd"
)
(vvPair
variable "this_file"
value "struct"
)
(vvPair
variable "this_file_logical"
value "struct"
)
(vvPair
variable "time"
value "13:45:28"
)
(vvPair
variable "unit"
value "flash_tb"
)
(vvPair
variable "user"
value "francois"
)
(vvPair
variable "version"
value "2018.1 (Build 12)"
)
(vvPair
variable "view"
value "struct"
)
(vvPair
variable "year"
value "2019"
)
(vvPair
variable "yy"
value "19"
)
]
)
LanguageMgr "Vhdl2008LangMgr"
uid 198,0
optionalChildren [
*1 (Grouping
uid 1487,0
optionalChildren [
*2 (CommentText
uid 1489,0
shape (Rectangle
uid 1490,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "72000,77000,91000,79000"
)
oxt "45000,22000,64000,24000"
text (MLText
uid 1491,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "72200,77500,87800,78500"
st "
<enter project name here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 18600
)
position 1
ignorePrefs 1
)
*3 (CommentText
uid 1492,0
shape (Rectangle
uid 1493,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "40000,77000,66000,79000"
)
oxt "13000,22000,39000,24000"
text (MLText
uid 1494,0
va (VaSet
fg "32768,0,0"
font "courier,12,1"
)
xt "47750,77350,58250,78650"
st "
<company name>
"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 25600
)
position 1
ignorePrefs 1
)
*4 (CommentText
uid 1495,0
shape (Rectangle
uid 1496,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "45000,83000,66000,85000"
)
oxt "18000,28000,39000,30000"
text (MLText
uid 1497,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "45200,83500,61400,84500"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 20600
)
position 1
ignorePrefs 1
)
*5 (CommentText
uid 1498,0
shape (Rectangle
uid 1499,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "66000,77000,72000,79000"
)
oxt "39000,22000,45000,24000"
text (MLText
uid 1500,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "66200,77500,71000,78500"
st "
Project:
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 5600
)
position 1
ignorePrefs 1
)
*6 (CommentText
uid 1501,0
shape (Rectangle
uid 1502,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "45000,79000,66000,81000"
)
oxt "18000,24000,39000,26000"
text (MLText
uid 1503,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "45200,79500,61400,80500"
st "
<enter diagram title here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 20600
)
position 1
ignorePrefs 1
)
*7 (CommentText
uid 1504,0
shape (Rectangle
uid 1505,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "40000,79000,45000,81000"
)
oxt "13000,24000,18000,26000"
text (MLText
uid 1506,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "40200,79500,43800,80500"
st "
Title:
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 4600
)
position 1
ignorePrefs 1
)
*8 (CommentText
uid 1507,0
shape (Rectangle
uid 1508,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "40000,81000,45000,83000"
)
oxt "13000,26000,18000,28000"
text (MLText
uid 1509,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "40200,81500,43200,82500"
st "
Path:
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 4600
)
position 1
ignorePrefs 1
)
*9 (CommentText
uid 1510,0
shape (Rectangle
uid 1511,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "66000,79000,91000,85000"
)
oxt "39000,24000,64000,30000"
text (MLText
uid 1512,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "66200,79200,79400,80200"
st "
<enter comments here>
"
tm "CommentText"
wrapOption 3
visibleHeight 5600
visibleWidth 24600
)
ignorePrefs 1
)
*10 (CommentText
uid 1513,0
shape (Rectangle
uid 1514,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "45000,81000,66000,83000"
)
oxt "18000,26000,39000,28000"
text (MLText
uid 1515,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "45200,81500,62000,82500"
st "
%library/%unit/%view
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 20600
)
position 1
ignorePrefs 1
)
*11 (CommentText
uid 1516,0
shape (Rectangle
uid 1517,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "40000,83000,45000,85000"
)
oxt "13000,28000,18000,30000"
text (MLText
uid 1518,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "40200,83500,44400,84500"
st "
Edited:
"
tm "CommentText"
wrapOption 3
visibleHeight 1600
visibleWidth 4600
)
position 1
ignorePrefs 1
)
]
shape (GroupingShape
uid 1488,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 1
)
xt "40000,77000,91000,85000"
)
oxt "13000,22000,64000,30000"
)
*12 (Blk
uid 1774,0
shape (Rectangle
uid 1775,0
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "24000,57000,68000,65000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
uid 1776,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*13 (Text
uid 1777,0
va (VaSet
font "courier,12,1"
)
xt "24600,64900,35200,66300"
st "memory_test"
blo "24600,66100"
tm "BdLibraryNameMgr"
)
*14 (Text
uid 1778,0
va (VaSet
font "courier,12,1"
)
xt "24600,66300,34400,67700"
st "flash_tester"
blo "24600,67500"
tm "BlkNameMgr"
)
*15 (Text
uid 1779,0
va (VaSet
font "courier,12,1"
)
xt "24600,67700,27000,69100"
st "I1"
blo "24600,68900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1780,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1781,0
text (MLText
uid 1782,0
va (VaSet
font "courier,9,0"
)
xt "24000,69800,47000,71600"
st "addressBitNb = addressBitNb    ( positive )  
dataBitNb    = dataBitNb       ( positive )  "
)
header ""
)
elements [
(GiElement
name "addressBitNb"
type "positive"
value "addressBitNb"
)
(GiElement
name "dataBitNb"
type "positive"
value "dataBitNb"
)
]
)
)
*16 (Net
uid 5007,0
decl (Decl
n "RP_n"
t "std_ulogic"
o 6
suid 47,0
)
declText (MLText
uid 5008,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,13500,900"
st "SIGNAL RP_n   : std_ulogic"
)
)
*17 (Net
uid 5015,0
decl (Decl
n "BYTE_n"
t "std_ulogic"
o 2
suid 48,0
)
declText (MLText
uid 5016,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,13500,900"
st "SIGNAL BYTE_n : std_ulogic"
)
)
*18 (Net
uid 5023,0
decl (Decl
n "OE_n"
t "std_ulogic"
o 5
suid 49,0
)
declText (MLText
uid 5024,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,13500,900"
st "SIGNAL OE_n   : std_ulogic"
)
)
*19 (Net
uid 5031,0
decl (Decl
n "WE_n"
t "std_ulogic"
o 8
suid 50,0
)
declText (MLText
uid 5032,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,13500,900"
st "SIGNAL WE_n   : std_ulogic"
)
)
*20 (Net
uid 5039,0
decl (Decl
n "CE"
t "std_ulogic_vector"
b "(2 DOWNTO 0)"
o 3
suid 51,0
)
declText (MLText
uid 5040,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,23000,900"
st "SIGNAL CE     : std_ulogic_vector(2 DOWNTO 0)"
)
)
*21 (Net
uid 5047,0
decl (Decl
n "A"
t "unsigned"
b "(addressBitNb-1 DOWNTO 0)"
o 1
suid 52,0
)
declText (MLText
uid 5048,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,25000,900"
st "SIGNAL A      : unsigned(addressBitNb-1 DOWNTO 0)"
)
)
*22 (Net
uid 5055,0
decl (Decl
n "STS"
t "std_ulogic"
o 7
suid 53,0
)
declText (MLText
uid 5056,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,13500,900"
st "SIGNAL STS    : std_ulogic"
)
)
*23 (Net
uid 5063,0
decl (Decl
n "DQ"
t "std_logic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 4
suid 54,0
)
declText (MLText
uid 5064,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "0,0,27500,900"
st "SIGNAL DQ     : std_logic_vector(dataBitNb-1 DOWNTO 0)"
)
)
*24 (SaComponent
uid 5435,0
optionalChildren [
*25 (CptPort
uid 5403,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5404,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,34625,46000,35375"
)
tg (CPTG
uid 5405,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5406,0
va (VaSet
)
xt "47000,34500,47900,35500"
st "A"
blo "47000,35300"
)
)
thePort (LogicalPort
decl (Decl
n "A"
t "unsigned"
b "(23 DOWNTO 0)"
o 45
suid 1,0
)
)
)
*26 (CptPort
uid 5407,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5408,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,42625,46000,43375"
)
tg (CPTG
uid 5409,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5410,0
va (VaSet
)
xt "47000,42500,50200,43500"
st "BYTE_n"
blo "47000,43300"
)
)
thePort (LogicalPort
decl (Decl
n "BYTE_n"
t "std_ulogic"
o 48
suid 2,0
)
)
)
*27 (CptPort
uid 5411,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5412,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,36625,46000,37375"
)
tg (CPTG
uid 5413,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5414,0
va (VaSet
)
xt "47000,36500,48500,37500"
st "CE"
blo "47000,37300"
)
)
thePort (LogicalPort
decl (Decl
n "CE"
t "std_ulogic_vector"
b "(2 DOWNTO 0)"
o 45
suid 3,0
)
)
)
*28 (CptPort
uid 5415,0
ps "OnEdgeStrategy"
shape (Diamond
uid 5416,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "54000,34625,54750,35375"
)
tg (CPTG
uid 5417,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5418,0
va (VaSet
)
xt "51400,34500,53000,35500"
st "DQ"
ju 2
blo "53000,35300"
)
)
thePort (LogicalPort
m 2
decl (Decl
n "DQ"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 45
suid 4,0
)
)
)
*29 (CptPort
uid 5419,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5420,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,40625,46000,41375"
)
tg (CPTG
uid 5421,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5422,0
va (VaSet
)
xt "47000,40500,49300,41500"
st "OE_n"
blo "47000,41300"
)
)
thePort (LogicalPort
decl (Decl
n "OE_n"
t "std_ulogic"
o 48
suid 5,0
)
)
)
*30 (CptPort
uid 5423,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5424,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,46625,46000,47375"
)
tg (CPTG
uid 5425,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5426,0
va (VaSet
)
xt "47000,46500,49300,47500"
st "RP_n"
blo "47000,47300"
)
)
thePort (LogicalPort
decl (Decl
n "RP_n"
t "std_ulogic"
o 48
suid 6,0
)
)
)
*31 (CptPort
uid 5427,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5428,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "54000,36625,54750,37375"
)
tg (CPTG
uid 5429,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 5430,0
va (VaSet
)
xt "51100,36500,53000,37500"
st "STS"
ju 2
blo "53000,37300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "STS"
t "std_ulogic"
o 48
suid 7,0
)
)
)
*32 (CptPort
uid 5431,0
ps "OnEdgeStrategy"
shape (Triangle
uid 5432,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "45250,38625,46000,39375"
)
tg (CPTG
uid 5433,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 5434,0
va (VaSet
)
xt "47000,38500,49400,39500"
st "WE_n"
blo "47000,39300"
)
)
thePort (LogicalPort
decl (Decl
n "WE_n"
t "std_ulogic"
o 48
suid 8,0
)
)
)
]
shape (Rectangle
uid 5436,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "46000,31000,54000,49000"
)
oxt "35000,13000,43000,31000"
ttg (MlTextGroup
uid 5437,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*33 (Text
uid 5438,0
va (VaSet
font "courier,8,1"
)
xt "45800,49000,51300,50000"
st "memory_test"
blo "45800,49800"
tm "BdLibraryNameMgr"
)
*34 (Text
uid 5439,0
va (VaSet
font "courier,8,1"
)
xt "45800,50000,52600,51000"
st "flash_28F128J3A"
blo "45800,50800"
tm "CptNameMgr"
)
*35 (Text
uid 5440,0
va (VaSet
font "courier,8,1"
)
xt "45800,51000,46800,52000"
st "I0"
blo "45800,51800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 5441,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 5442,0
text (MLText
uid 5443,0
va (VaSet
font "courier,8,0"
)
xt "46000,52600,80500,60700"
st "fileSpec      = \"U:\\ELN_board\\Simulation\\flash.srec\"    ( string )  
T_W13         = 500 ns                                  ( time   )  
T_W16_program = 1 us                                    ( time   )  
T_W16_erase   = 1.5 us                                  ( time   )  
T_R2          = 120 ns                                  ( time   )  
T_R3          = 120 ns                                  ( time   )  
T_R7          = 0 ns                                    ( time   )  
T_R8          = 55 ns                                   ( time   )  
T_R9          = 15 ns                                   ( time   )  "
)
header ""
)
elements [
(GiElement
name "fileSpec"
type "string"
value "\"U:\\ELN_board\\Simulation\\flash.srec\""
)
(GiElement
name "T_W13"
type "time"
value "500 ns"
)
(GiElement
name "T_W16_program"
type "time"
value "1 us"
)
(GiElement
name "T_W16_erase"
type "time"
value "1.5 us"
)
(GiElement
name "T_R2"
type "time"
value "120 ns"
)
(GiElement
name "T_R3"
type "time"
value "120 ns"
)
(GiElement
name "T_R7"
type "time"
value "0 ns"
)
(GiElement
name "T_R8"
type "time"
value "55 ns"
)
(GiElement
name "T_R9"
type "time"
value "15 ns"
)
]
)
portVis (PortSigDisplay
sTC 0
sF 0
)
archFileType "UNKNOWN"
)
*36 (Wire
uid 5009,0
shape (OrthoPolyLine
uid 5010,0
va (VaSet
vasetType 3
)
xt "44000,47000,45250,57000"
pts [
"45250,47000"
"44000,47000"
"44000,57000"
]
)
start &30
end &12
sat 32
eat 2
stc 0
st 0
si 0
tg (WTG
uid 5013,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5014,0
va (VaSet
font "courier,12,0"
)
xt "40250,45600,43050,46900"
st "RP_n"
blo "40250,46600"
tm "WireNameMgr"
)
)
on &16
)
*37 (Wire
uid 5017,0
shape (OrthoPolyLine
uid 5018,0
va (VaSet
vasetType 3
)
xt "40000,43000,45250,57000"
pts [
"45250,43000"
"40000,43000"
"40000,57000"
]
)
start &26
end &12
sat 32
eat 2
stc 0
st 0
si 0
tg (WTG
uid 5021,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5022,0
va (VaSet
font "courier,12,0"
)
xt "39250,41600,44650,43000"
st "BYTE_n"
blo "39250,42800"
tm "WireNameMgr"
)
)
on &17
)
*38 (Wire
uid 5025,0
shape (OrthoPolyLine
uid 5026,0
va (VaSet
vasetType 3
)
xt "38000,41000,45250,57000"
pts [
"45250,41000"
"38000,41000"
"38000,57000"
]
)
start &29
end &12
sat 32
eat 2
stc 0
st 0
si 0
tg (WTG
uid 5029,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5030,0
va (VaSet
font "courier,12,0"
)
xt "40250,39600,43050,40900"
st "OE_n"
blo "40250,40600"
tm "WireNameMgr"
)
)
on &18
)
*39 (Wire
uid 5033,0
shape (OrthoPolyLine
uid 5034,0
va (VaSet
vasetType 3
)
xt "36000,39000,45250,57000"
pts [
"45250,39000"
"36000,39000"
"36000,57000"
]
)
start &32
end &12
sat 32
eat 2
stc 0
st 0
si 0
tg (WTG
uid 5037,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5038,0
va (VaSet
font "courier,12,0"
)
xt "39250,37600,42050,38900"
st "WE_n"
blo "39250,38600"
tm "WireNameMgr"
)
)
on &19
)
*40 (Wire
uid 5041,0
shape (OrthoPolyLine
uid 5042,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "34000,37000,45250,57000"
pts [
"45250,37000"
"34000,37000"
"34000,57000"
]
)
start &27
end &12
sat 32
eat 2
sty 1
stc 0
st 0
si 0
tg (WTG
uid 5045,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5046,0
va (VaSet
font "courier,12,0"
)
xt "41250,35600,42650,36900"
st "CE"
blo "41250,36600"
tm "WireNameMgr"
)
)
on &20
)
*41 (Wire
uid 5049,0
shape (OrthoPolyLine
uid 5050,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "32000,35000,45250,57000"
pts [
"45250,35000"
"32000,35000"
"32000,57000"
]
)
start &25
end &12
sat 32
eat 2
sty 1
stc 0
st 0
si 0
tg (WTG
uid 5053,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5054,0
va (VaSet
font "courier,12,0"
)
xt "42250,33600,42950,34900"
st "A"
blo "42250,34600"
tm "WireNameMgr"
)
)
on &21
)
*42 (Wire
uid 5057,0
shape (OrthoPolyLine
uid 5058,0
va (VaSet
vasetType 3
)
xt "54750,37000,58000,57000"
pts [
"54750,37000"
"58000,37000"
"58000,57000"
]
)
start &31
end &12
sat 32
eat 1
stc 0
st 0
si 0
tg (WTG
uid 5061,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5062,0
va (VaSet
font "courier,12,0"
)
xt "56750,35600,59850,37000"
st "STS"
blo "56750,36800"
tm "WireNameMgr"
)
)
on &22
)
*43 (Wire
uid 5065,0
shape (OrthoPolyLine
uid 5066,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "54750,35000,60000,57000"
pts [
"54750,35000"
"60000,35000"
"60000,57000"
]
)
start &28
end &12
sat 32
eat 4
sty 1
stc 0
st 0
si 0
tg (WTG
uid 5069,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 5070,0
va (VaSet
font "courier,12,0"
)
xt "56750,33600,58150,34900"
st "DQ"
blo "56750,34600"
tm "WireNameMgr"
)
)
on &23
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "32768,32768,32768"
)
packageList *44 (PackageList
uid 187,0
stg "VerticalLayoutStrategy"
textVec [
*45 (Text
uid 1297,0
va (VaSet
font "courier,12,0"
)
xt "-7000,19600,2500,21000"
st "Package List"
blo "-7000,20800"
)
*46 (MLText
uid 1298,0
va (VaSet
)
xt "-7000,21000,11600,24000"
st "LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 190,0
stg "VerticalLayoutStrategy"
textVec [
*47 (Text
uid 191,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "20000,0,31000,1200"
st "Compiler Directives"
blo "20000,1000"
)
*48 (Text
uid 192,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "20000,1400,33000,2600"
st "Pre-module directives:"
blo "20000,2400"
)
*49 (MLText
uid 193,0
va (VaSet
isHidden 1
)
xt "20000,2800,32000,4800"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*50 (Text
uid 194,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "20000,5600,33500,6800"
st "Post-module directives:"
blo "20000,6600"
)
*51 (MLText
uid 195,0
va (VaSet
isHidden 1
)
xt "20000,7000,20000,7000"
tm "BdCompilerDirectivesTextMgr"
)
*52 (Text
uid 196,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "20000,7200,33200,8400"
st "End-module directives:"
blo "20000,8200"
)
*53 (MLText
uid 197,0
va (VaSet
isHidden 1
)
xt "20000,1200,20000,1200"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "7,31,1370,1010"
viewArea "-8500,18100,93316,92593"
cachedDiagramExtent "-7000,0,91000,85000"
pageSetupInfo (PageSetupInfo
ptrCmd "Generic PostScript Printer,winspool,"
fileName "\\\\EIV\\a309_hplj4050.electro.eiv"
toPrinter 1
xMargin 48
yMargin 48
windowsPaperWidth 761
windowsPaperHeight 1077
paperType "Letter (8.5\" x 11\")"
windowsPaperName "A4"
scale 75
titlesVisible 0
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
boundaryWidth 0
)
hasePageBreakOrigin 1
pageBreakOrigin "-7000,19000"
lastUid 5521,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2600,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
layer 0
va (VaSet
vasetType 1
fg "59904,39936,65280"
lineColor "0,0,32768"
)
xt "0,0,1500,1750"
iconName "reqTracerRequirement.bmp"
iconMaskName "reqTracerRequirement.msk"
)
autoResize 1
text (MLText
va (VaSet
fg "0,0,32768"
font "courier,8,0"
)
xt "450,2150,1450,3050"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
)
xt "1000,1000,3300,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*54 (Text
va (VaSet
font "courier,12,1"
)
xt "1500,2550,7900,3950"
st "<library>"
blo "1500,3750"
tm "BdLibraryNameMgr"
)
*55 (Text
va (VaSet
font "courier,12,1"
)
xt "1500,3950,7000,5350"
st "<block>"
blo "1500,5150"
tm "BlkNameMgr"
)
*56 (Text
va (VaSet
font "courier,12,1"
)
xt "1500,5350,3000,6750"
st "I0"
blo "1500,6550"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "courier,9,0"
)
xt "1500,12550,1500,12550"
)
header ""
)
elements [
]
)
)
defaultMWComponent (MWC
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-600,0,8600,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*57 (Text
va (VaSet
)
xt "-100,3000,2200,4000"
st "Library"
blo "-100,3800"
)
*58 (Text
va (VaSet
)
xt "-100,4000,5900,5000"
st "MWComponent"
blo "-100,4800"
)
*59 (Text
va (VaSet
)
xt "-100,5000,500,6000"
st "I0"
blo "-100,5800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "courier,9,0"
)
xt "-7100,1000,-7100,1000"
)
header ""
)
elements [
]
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
defaultSaComponent (SaComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-850,0,8850,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*60 (Text
va (VaSet
)
xt "-350,2550,1950,3550"
st "Library"
blo "-350,3350"
tm "BdLibraryNameMgr"
)
*61 (Text
va (VaSet
)
xt "-350,3550,5150,4550"
st "SaComponent"
blo "-350,4350"
tm "CptNameMgr"
)
*62 (Text
va (VaSet
)
xt "-350,4550,250,5550"
st "I0"
blo "-350,5350"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "courier,9,0"
)
xt "-7350,550,-7350,550"
)
header ""
)
elements [
]
)
archFileType "UNKNOWN"
)
defaultVhdlComponent (VhdlComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-1350,0,9350,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*63 (Text
va (VaSet
)
xt "-850,2550,1450,3550"
st "Library"
blo "-850,3350"
)
*64 (Text
va (VaSet
)
xt "-850,3550,5250,4550"
st "VhdlComponent"
blo "-850,4350"
)
*65 (Text
va (VaSet
)
xt "-850,4550,-250,5550"
st "I0"
blo "-850,5350"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "courier,9,0"
)
xt "-7850,550,-7850,550"
)
header ""
)
elements [
]
)
entityPath ""
archName ""
archPath ""
)
defaultVerilogComponent (VerilogComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-2100,0,10100,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*66 (Text
va (VaSet
)
xt "-1600,2550,700,3550"
st "Library"
blo "-1600,3350"
)
*67 (Text
va (VaSet
)
xt "-1600,3550,5500,4550"
st "VerilogComponent"
blo "-1600,4350"
)
*68 (Text
va (VaSet
)
xt "-1600,4550,-1000,5550"
st "I0"
blo "-1600,5350"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "courier,9,0"
)
xt "-8600,550,-8600,550"
)
header ""
)
elements [
]
)
entityPath ""
)
defaultHdlText (HdlText
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*69 (Text
va (VaSet
)
xt "2950,3400,4150,4400"
st "eb1"
blo "2950,4200"
tm "HdlTextNameMgr"
)
*70 (Text
va (VaSet
)
xt "2950,4400,3350,5400"
st "1"
blo "2950,5200"
tm "HdlTextNumberMgr"
)
]
)
)
defaultEmbeddedText (EmbeddedText
commentText (CommentText
ps "CenterOffsetStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,18000,5000"
)
text (MLText
va (VaSet
font "courier,9,0"
)
xt "200,200,2200,1100"
st "
Text
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 4600
visibleWidth 17600
)
)
)
defaultGlobalConnector (GlobalConnector
shape (Circle
va (VaSet
vasetType 1
fg "65535,65535,0"
)
xt "-1000,-1000,1000,1000"
radius 1000
)
name (Text
va (VaSet
)
xt "-300,-500,300,500"
st "G"
blo "-300,300"
)
)
defaultRipper (Ripper
ps "OnConnectorStrategy"
shape (Line2D
pts [
"0,0"
"1000,1000"
]
va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
)
)
defaultBdJunction (BdJunction
ps "OnConnectorStrategy"
shape (Circle
va (VaSet
vasetType 1
)
xt "-400,-400,400,400"
radius 400
)
)
defaultPortIoIn (PortIoIn
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "-2000,-375,-500,375"
)
(Line
sl 0
ro 270
xt "-500,0,0,0"
pts [
"-500,0"
"0,0"
]
)
]
)
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
isHidden 1
)
xt "-2875,-375,-2875,-375"
ju 2
blo "-2875,-375"
tm "WireNameMgr"
)
s (Text
va (VaSet
)
xt "-2875,-375,-2875,-375"
ju 2
blo "-2875,-375"
tm "SignalTypeMgr"
)
)
)
defaultPortIoOut (PortIoOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "500,-375,2000,375"
)
(Line
sl 0
ro 270
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
isHidden 1
)
xt "2875,-375,2875,-375"
blo "2875,-375"
tm "WireNameMgr"
)
s (Text
va (VaSet
)
xt "2875,-375,2875,-375"
blo "2875,-375"
tm "SignalTypeMgr"
)
)
)
defaultPortIoInOut (PortIoInOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
isHidden 1
)
xt "3000,500,3000,500"
blo "3000,500"
tm "WireNameMgr"
)
s (Text
va (VaSet
)
xt "3000,500,3000,500"
blo "3000,500"
tm "SignalTypeMgr"
)
)
)
defaultPortIoBuffer (PortIoBuffer
shape (CompositeShape
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
isHidden 1
)
xt "3000,500,3000,500"
blo "3000,500"
tm "WireNameMgr"
)
s (Text
va (VaSet
)
xt "3000,500,3000,500"
blo "3000,500"
tm "SignalTypeMgr"
)
)
)
defaultSignal (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
font "courier,12,0"
)
xt "0,0,2600,1400"
st "sig0"
blo "0,1200"
tm "WireNameMgr"
)
)
)
defaultBus (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
font "courier,12,0"
)
xt "0,0,3900,1400"
st "dbus0"
blo "0,1200"
tm "WireNameMgr"
)
)
)
defaultBundle (Bundle
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineColor "32768,0,0"
lineStyle 3
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
textGroup (BiTextGroup
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
font "courier,12,0"
)
xt "0,0,5100,1400"
st "bundle0"
blo "0,1200"
tm "BundleNameMgr"
)
second (MLText
va (VaSet
font "courier,12,0"
)
xt "0,1400,1400,2700"
st "()"
tm "BundleContentsMgr"
)
)
bundleNet &0
)
defaultPortMapFrame (PortMapFrame
ps "PortMapFrameStrategy"
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,10000,12000"
)
portMapText (BiTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
first (MLText
va (VaSet
font "courier,12,0"
)
xt "0,0,6300,1300"
st "Auto list"
)
second (MLText
va (VaSet
font "courier,12,0"
)
xt "0,1400,12600,2700"
st "User defined list"
tm "PortMapTextMgr"
)
)
)
defaultGenFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 2
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1400,17400,-400"
st "g0: FOR i IN 0 TO n GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1050,1750"
)
num (Text
va (VaSet
)
xt "200,300,600,1300"
st "1"
blo "200,1100"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*71 (Text
va (VaSet
font "courier,9,1"
)
xt "11800,20000,22600,21200"
st "Frame Declarations"
blo "11800,21000"
)
*72 (MLText
va (VaSet
)
xt "11800,21200,11800,21200"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 1
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1400,10800,-400"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1050,1750"
)
num (Text
va (VaSet
)
xt "200,300,600,1300"
st "1"
blo "200,1100"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*73 (Text
va (VaSet
font "courier,9,1"
)
xt "11800,20000,22600,21200"
st "Frame Declarations"
blo "11800,21000"
)
*74 (MLText
va (VaSet
)
xt "11800,21200,11800,21200"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,12,0"
)
xt "0,750,2600,2150"
st "Port"
blo "0,1950"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,12,0"
)
xt "0,750,2600,2150"
st "Port"
blo "0,1950"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
isHidden 1
font "courier,8,0"
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "courier,10,1"
)
xt "-7000,25800,1600,27000"
st "Declarations"
blo "-7000,26800"
)
portLabel (Text
uid 3,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "-7000,27000,-2800,28200"
st "Ports:"
blo "-7000,28000"
)
preUserLabel (Text
uid 4,0
va (VaSet
font "courier,10,1"
)
xt "-7000,27000,-1000,28200"
st "Pre User:"
blo "-7000,28000"
)
preUserText (MLText
uid 5,0
va (VaSet
)
xt "-5000,28200,18400,30200"
st "constant addressBitNb: positive := 24;
constant dataBitNb: positive := 16;"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "-7000,27000,4000,28200"
st "Diagram Signals:"
blo "-7000,28000"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "-7000,27000,300,28200"
st "Post User:"
blo "-7000,28000"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
)
xt "-5000,41400,-5000,41400"
tm "BdDeclarativeTextMgr"
)
)
commonDM (CommonDM
ldm (LogicalDM
suid 54,0
usingSuid 1
emptyRow *75 (LEmptyRow
)
uid 3310,0
optionalChildren [
*76 (RefLabelRowHdr
)
*77 (TitleRowHdr
)
*78 (FilterRowHdr
)
*79 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*80 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*81 (GroupColHdr
tm "GroupColHdrMgr"
)
*82 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*83 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*84 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*85 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*86 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*87 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
*88 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "RP_n"
t "std_ulogic"
o 6
suid 47,0
)
)
uid 5071,0
)
*89 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "BYTE_n"
t "std_ulogic"
o 2
suid 48,0
)
)
uid 5073,0
)
*90 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "OE_n"
t "std_ulogic"
o 5
suid 49,0
)
)
uid 5075,0
)
*91 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "WE_n"
t "std_ulogic"
o 8
suid 50,0
)
)
uid 5077,0
)
*92 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "CE"
t "std_ulogic_vector"
b "(2 DOWNTO 0)"
o 3
suid 51,0
)
)
uid 5079,0
)
*93 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "A"
t "unsigned"
b "(addressBitNb-1 DOWNTO 0)"
o 1
suid 52,0
)
)
uid 5081,0
)
*94 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "STS"
t "std_ulogic"
o 7
suid 53,0
)
)
uid 5083,0
)
*95 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "DQ"
t "std_logic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 4
suid 54,0
)
)
uid 5085,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 3323,0
optionalChildren [
*96 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "courier,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
)
emptyMRCItem *97 (MRCItem
litem &75
pos 8
dimension 20
)
uid 3325,0
optionalChildren [
*98 (MRCItem
litem &76
pos 0
dimension 20
uid 3326,0
)
*99 (MRCItem
litem &77
pos 1
dimension 23
uid 3327,0
)
*100 (MRCItem
litem &78
pos 2
hidden 1
dimension 20
uid 3328,0
)
*101 (MRCItem
litem &88
pos 0
dimension 20
uid 5072,0
)
*102 (MRCItem
litem &89
pos 1
dimension 20
uid 5074,0
)
*103 (MRCItem
litem &90
pos 2
dimension 20
uid 5076,0
)
*104 (MRCItem
litem &91
pos 3
dimension 20
uid 5078,0
)
*105 (MRCItem
litem &92
pos 4
dimension 20
uid 5080,0
)
*106 (MRCItem
litem &93
pos 5
dimension 20
uid 5082,0
)
*107 (MRCItem
litem &94
pos 6
dimension 20
uid 5084,0
)
*108 (MRCItem
litem &95
pos 7
dimension 20
uid 5086,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
)
uid 3329,0
optionalChildren [
*109 (MRCItem
litem &79
pos 0
dimension 20
uid 3330,0
)
*110 (MRCItem
litem &81
pos 1
dimension 50
uid 3331,0
)
*111 (MRCItem
litem &82
pos 2
dimension 100
uid 3332,0
)
*112 (MRCItem
litem &83
pos 3
dimension 50
uid 3333,0
)
*113 (MRCItem
litem &84
pos 4
dimension 100
uid 3334,0
)
*114 (MRCItem
litem &85
pos 5
dimension 100
uid 3335,0
)
*115 (MRCItem
litem &86
pos 6
dimension 50
uid 3336,0
)
*116 (MRCItem
litem &87
pos 7
dimension 80
uid 3337,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 3324,0
vaOverrides [
]
)
]
)
uid 3309,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *117 (LEmptyRow
)
uid 3339,0
optionalChildren [
*118 (RefLabelRowHdr
)
*119 (TitleRowHdr
)
*120 (FilterRowHdr
)
*121 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*122 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*123 (GroupColHdr
tm "GroupColHdrMgr"
)
*124 (NameColHdr
tm "GenericNameColHdrMgr"
)
*125 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*126 (InitColHdr
tm "GenericValueColHdrMgr"
)
*127 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*128 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
)
pdm (PhysicalDM
uid 3351,0
optionalChildren [
*129 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "courier,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
)
emptyMRCItem *130 (MRCItem
litem &117
pos 0
dimension 20
)
uid 3353,0
optionalChildren [
*131 (MRCItem
litem &118
pos 0
dimension 20
uid 3354,0
)
*132 (MRCItem
litem &119
pos 1
dimension 23
uid 3355,0
)
*133 (MRCItem
litem &120
pos 2
hidden 1
dimension 20
uid 3356,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
)
uid 3357,0
optionalChildren [
*134 (MRCItem
litem &121
pos 0
dimension 20
uid 3358,0
)
*135 (MRCItem
litem &123
pos 1
dimension 50
uid 3359,0
)
*136 (MRCItem
litem &124
pos 2
dimension 100
uid 3360,0
)
*137 (MRCItem
litem &125
pos 3
dimension 100
uid 3361,0
)
*138 (MRCItem
litem &126
pos 4
dimension 50
uid 3362,0
)
*139 (MRCItem
litem &127
pos 5
dimension 50
uid 3363,0
)
*140 (MRCItem
litem &128
pos 6
dimension 80
uid 3364,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 3352,0
vaOverrides [
]
)
]
)
uid 3338,0
type 1
)
activeModelName "BlockDiag"
)