mirror of
https://github.com/Klagarge/Cursor.git
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2409 lines
29 KiB
Plaintext
2409 lines
29 KiB
Plaintext
|
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
|
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library "ieee"
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unitName "NUMERIC_STD"
|
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|
)
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(DmPackageRef
|
||
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library "gates"
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unitName "gates"
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||
|
)
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|
]
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libraryRefs [
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"ieee"
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"gates"
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]
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)
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|
version "26.1"
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appVersion "2018.1 (Build 12)"
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model (Symbol
|
||
|
commonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
suid 2018,0
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||
|
usingSuid 1
|
||
|
emptyRow *1 (LEmptyRow
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||
|
)
|
||
|
uid 283,0
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||
|
optionalChildren [
|
||
|
*2 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
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||
|
n "in9"
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||
|
t "std_uLogic"
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|
o 13
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||
|
suid 12,0
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||
|
)
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)
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||
|
uid 284,0
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||
|
)
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||
|
*3 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in1"
|
||
|
t "std_uLogic"
|
||
|
o 4
|
||
|
suid 2,0
|
||
|
)
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||
|
)
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||
|
uid 285,0
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||
|
)
|
||
|
*4 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in6"
|
||
|
t "std_uLogic"
|
||
|
o 8
|
||
|
suid 9,0
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||
|
)
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||
|
)
|
||
|
uid 286,0
|
||
|
)
|
||
|
*5 (LogPort
|
||
|
port (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "muxOut"
|
||
|
t "std_uLogic"
|
||
|
o 7
|
||
|
suid 5,0
|
||
|
)
|
||
|
)
|
||
|
uid 287,0
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||
|
)
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||
|
*6 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "sel"
|
||
|
t "unsigned"
|
||
|
b "(3 DOWNTO 0)"
|
||
|
o 1
|
||
|
suid 6,0
|
||
|
)
|
||
|
)
|
||
|
uid 288,0
|
||
|
)
|
||
|
*7 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in4"
|
||
|
t "std_uLogic"
|
||
|
o 7
|
||
|
suid 7,0
|
||
|
)
|
||
|
)
|
||
|
uid 289,0
|
||
|
)
|
||
|
*8 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in7"
|
||
|
t "std_uLogic"
|
||
|
o 10
|
||
|
suid 10,0
|
||
|
)
|
||
|
)
|
||
|
uid 290,0
|
||
|
)
|
||
|
*9 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in0"
|
||
|
t "std_uLogic"
|
||
|
o 3
|
||
|
suid 1,0
|
||
|
)
|
||
|
)
|
||
|
uid 291,0
|
||
|
)
|
||
|
*10 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in15"
|
||
|
t "std_uLogic"
|
||
|
o 16
|
||
|
suid 18,0
|
||
|
)
|
||
|
)
|
||
|
uid 292,0
|
||
|
)
|
||
|
*11 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in11"
|
||
|
t "std_uLogic"
|
||
|
o 14
|
||
|
suid 14,0
|
||
|
)
|
||
|
)
|
||
|
uid 293,0
|
||
|
)
|
||
|
*12 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in2"
|
||
|
t "std_uLogic"
|
||
|
o 5
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
uid 294,0
|
||
|
)
|
||
|
*13 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in8"
|
||
|
t "std_uLogic"
|
||
|
o 11
|
||
|
suid 11,0
|
||
|
)
|
||
|
)
|
||
|
uid 295,0
|
||
|
)
|
||
|
*14 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in14"
|
||
|
t "std_uLogic"
|
||
|
o 18
|
||
|
suid 17,0
|
||
|
)
|
||
|
)
|
||
|
uid 296,0
|
||
|
)
|
||
|
*15 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in10"
|
||
|
t "std_uLogic"
|
||
|
o 12
|
||
|
suid 13,0
|
||
|
)
|
||
|
)
|
||
|
uid 297,0
|
||
|
)
|
||
|
*16 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in5"
|
||
|
t "std_uLogic"
|
||
|
o 9
|
||
|
suid 8,0
|
||
|
)
|
||
|
)
|
||
|
uid 298,0
|
||
|
)
|
||
|
*17 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in12"
|
||
|
t "std_uLogic"
|
||
|
o 17
|
||
|
suid 15,0
|
||
|
)
|
||
|
)
|
||
|
uid 299,0
|
||
|
)
|
||
|
*18 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in3"
|
||
|
t "std_uLogic"
|
||
|
o 6
|
||
|
suid 4,0
|
||
|
)
|
||
|
)
|
||
|
uid 300,0
|
||
|
)
|
||
|
*19 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in13"
|
||
|
t "std_uLogic"
|
||
|
o 15
|
||
|
suid 16,0
|
||
|
)
|
||
|
)
|
||
|
uid 301,0
|
||
|
)
|
||
|
*20 (RefLabelRowHdr
|
||
|
)
|
||
|
*21 (TitleRowHdr
|
||
|
)
|
||
|
*22 (FilterRowHdr
|
||
|
)
|
||
|
*23 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*24 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*25 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*26 (NameColHdr
|
||
|
tm "NameColHdrMgr"
|
||
|
)
|
||
|
*27 (ModeColHdr
|
||
|
tm "ModeColHdrMgr"
|
||
|
)
|
||
|
*28 (TypeColHdr
|
||
|
tm "TypeColHdrMgr"
|
||
|
)
|
||
|
*29 (BoundsColHdr
|
||
|
tm "BoundsColHdrMgr"
|
||
|
)
|
||
|
*30 (InitColHdr
|
||
|
tm "InitColHdrMgr"
|
||
|
)
|
||
|
*31 (EolColHdr
|
||
|
tm "EolColHdrMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 302,0
|
||
|
optionalChildren [
|
||
|
*32 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *33 (MRCItem
|
||
|
litem &1
|
||
|
pos 18
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 211,0
|
||
|
optionalChildren [
|
||
|
*34 (MRCItem
|
||
|
litem &20
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 214,0
|
||
|
)
|
||
|
*35 (MRCItem
|
||
|
litem &21
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 216,0
|
||
|
)
|
||
|
*36 (MRCItem
|
||
|
litem &22
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 218,0
|
||
|
)
|
||
|
*37 (MRCItem
|
||
|
litem &2
|
||
|
pos 12
|
||
|
dimension 20
|
||
|
uid 237,0
|
||
|
)
|
||
|
*38 (MRCItem
|
||
|
litem &3
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 238,0
|
||
|
)
|
||
|
*39 (MRCItem
|
||
|
litem &4
|
||
|
pos 7
|
||
|
dimension 20
|
||
|
uid 239,0
|
||
|
)
|
||
|
*40 (MRCItem
|
||
|
litem &5
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 240,0
|
||
|
)
|
||
|
*41 (MRCItem
|
||
|
litem &6
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 241,0
|
||
|
)
|
||
|
*42 (MRCItem
|
||
|
litem &7
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
uid 242,0
|
||
|
)
|
||
|
*43 (MRCItem
|
||
|
litem &8
|
||
|
pos 9
|
||
|
dimension 20
|
||
|
uid 243,0
|
||
|
)
|
||
|
*44 (MRCItem
|
||
|
litem &9
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 244,0
|
||
|
)
|
||
|
*45 (MRCItem
|
||
|
litem &10
|
||
|
pos 15
|
||
|
dimension 20
|
||
|
uid 245,0
|
||
|
)
|
||
|
*46 (MRCItem
|
||
|
litem &11
|
||
|
pos 13
|
||
|
dimension 20
|
||
|
uid 246,0
|
||
|
)
|
||
|
*47 (MRCItem
|
||
|
litem &12
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 247,0
|
||
|
)
|
||
|
*48 (MRCItem
|
||
|
litem &13
|
||
|
pos 10
|
||
|
dimension 20
|
||
|
uid 248,0
|
||
|
)
|
||
|
*49 (MRCItem
|
||
|
litem &14
|
||
|
pos 17
|
||
|
dimension 20
|
||
|
uid 249,0
|
||
|
)
|
||
|
*50 (MRCItem
|
||
|
litem &15
|
||
|
pos 11
|
||
|
dimension 20
|
||
|
uid 250,0
|
||
|
)
|
||
|
*51 (MRCItem
|
||
|
litem &16
|
||
|
pos 8
|
||
|
dimension 20
|
||
|
uid 251,0
|
||
|
)
|
||
|
*52 (MRCItem
|
||
|
litem &17
|
||
|
pos 16
|
||
|
dimension 20
|
||
|
uid 252,0
|
||
|
)
|
||
|
*53 (MRCItem
|
||
|
litem &18
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 253,0
|
||
|
)
|
||
|
*54 (MRCItem
|
||
|
litem &19
|
||
|
pos 14
|
||
|
dimension 20
|
||
|
uid 254,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 212,0
|
||
|
optionalChildren [
|
||
|
*55 (MRCItem
|
||
|
litem &23
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 220,0
|
||
|
)
|
||
|
*56 (MRCItem
|
||
|
litem &25
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 224,0
|
||
|
)
|
||
|
*57 (MRCItem
|
||
|
litem &26
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 226,0
|
||
|
)
|
||
|
*58 (MRCItem
|
||
|
litem &27
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 228,0
|
||
|
)
|
||
|
*59 (MRCItem
|
||
|
litem &28
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 230,0
|
||
|
)
|
||
|
*60 (MRCItem
|
||
|
litem &29
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 232,0
|
||
|
)
|
||
|
*61 (MRCItem
|
||
|
litem &30
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 234,0
|
||
|
)
|
||
|
*62 (MRCItem
|
||
|
litem &31
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 236,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 210,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 282,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *63 (LEmptyRow
|
||
|
)
|
||
|
uid 304,0
|
||
|
optionalChildren [
|
||
|
*64 (RefLabelRowHdr
|
||
|
)
|
||
|
*65 (TitleRowHdr
|
||
|
)
|
||
|
*66 (FilterRowHdr
|
||
|
)
|
||
|
*67 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*68 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*69 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*70 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*71 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*72 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*73 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*74 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
*75 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "delay"
|
||
|
type "time"
|
||
|
value "gateDelay"
|
||
|
)
|
||
|
uid 280,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 305,0
|
||
|
optionalChildren [
|
||
|
*76 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *77 (MRCItem
|
||
|
litem &63
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 256,0
|
||
|
optionalChildren [
|
||
|
*78 (MRCItem
|
||
|
litem &64
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 259,0
|
||
|
)
|
||
|
*79 (MRCItem
|
||
|
litem &65
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 261,0
|
||
|
)
|
||
|
*80 (MRCItem
|
||
|
litem &66
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 263,0
|
||
|
)
|
||
|
*81 (MRCItem
|
||
|
litem &75
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 281,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 257,0
|
||
|
optionalChildren [
|
||
|
*82 (MRCItem
|
||
|
litem &67
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 265,0
|
||
|
)
|
||
|
*83 (MRCItem
|
||
|
litem &69
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 269,0
|
||
|
)
|
||
|
*84 (MRCItem
|
||
|
litem &70
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 271,0
|
||
|
)
|
||
|
*85 (MRCItem
|
||
|
litem &71
|
||
|
pos 3
|
||
|
dimension 100
|
||
|
uid 273,0
|
||
|
)
|
||
|
*86 (MRCItem
|
||
|
litem &72
|
||
|
pos 4
|
||
|
dimension 50
|
||
|
uid 275,0
|
||
|
)
|
||
|
*87 (MRCItem
|
||
|
litem &73
|
||
|
pos 5
|
||
|
dimension 50
|
||
|
uid 277,0
|
||
|
)
|
||
|
*88 (MRCItem
|
||
|
litem &74
|
||
|
pos 6
|
||
|
dimension 80
|
||
|
uid 279,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 255,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 303,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable " "
|
||
|
value " "
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds\\mux16to1\\symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds\\mux16to1\\symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds\\mux16to1"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds\\mux16to1"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "11.09.2019"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "Wed"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "Wednesday"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "11"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "mux16to1"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_author"
|
||
|
value "silvan.zahno"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_date"
|
||
|
value "11.09.2019"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_host"
|
||
|
value "WE6996"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_time"
|
||
|
value "14:35:13"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "WE6996"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "gates"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/ElN/Libraries/Gates/work"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "09"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "mux16to1"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "Sep"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "September"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds\\mux16to1\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\Gates\\hds\\mux16to1\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ADMS"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_DesignCompilerPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$ISE_SCRATCH_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_LeonardoPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC-SimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_PrecisionRTLPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_QuestaSimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_VCSPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "14:35:13"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "mux16to1"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "silvan.zahno"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2018.1 (Build 12)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2019"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "19"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "Vhdl2008LangMgr"
|
||
|
uid 86,0
|
||
|
optionalChildren [
|
||
|
*89 (SymbolBody
|
||
|
uid 11,0
|
||
|
optionalChildren [
|
||
|
*90 (CptPort
|
||
|
uid 51,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 52,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "31250,2625,32000,3375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 123,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 54,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "33000,2500,34400,3500"
|
||
|
st "in0"
|
||
|
blo "33000,3300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 114,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "2000,9400,14200,10400"
|
||
|
st "in0 : IN std_uLogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in0"
|
||
|
t "std_uLogic"
|
||
|
o 3
|
||
|
suid 1,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*91 (CptPort
|
||
|
uid 57,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 58,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "31250,4625,32000,5375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 124,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 60,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "33000,4500,34400,5500"
|
||
|
st "in1"
|
||
|
blo "33000,5300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 115,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "2000,10300,14200,11300"
|
||
|
st "in1 : IN std_uLogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in1"
|
||
|
t "std_uLogic"
|
||
|
o 4
|
||
|
suid 2,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*92 (CptPort
|
||
|
uid 63,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 64,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "31250,6625,32000,7375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 125,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 66,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "33000,6500,34400,7500"
|
||
|
st "in2"
|
||
|
blo "33000,7300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 116,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "2000,16600,14200,17600"
|
||
|
st "in2 : IN std_uLogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "in2"
|
||
|
t "std_uLogic"
|
||
|
o 5
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*93 (CptPort
|
||
|
uid 69,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 70,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "31250,8625,32000,9375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 126,0
|
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ps "CptPortTextPlaceStrategy"
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||
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st "in12"
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st "in12 : IN std_uLogic ;"
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*105 (CptPort
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uid 192,0
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ps "OnEdgeStrategy"
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