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portVis (PortSigDisplay
disp 1
sN 0
sTC 0
sT 1
selT 0
)
archFileType "UNKNOWN"
)
*31 (PortIoIn
uid 271,0
shape (CompositeShape
uid 931,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 932,0
sl 0
ro 270
xt "67000,48625,68500,49375"
)
(Line
uid 933,0
sl 0
ro 270
xt "68500,49000,69000,49000"
pts [
"68500,49000"
"69000,49000"
]
)
]
)
tg (WTG
uid 934,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 935,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "60900,48300,66000,49700"
st "enable"
ju 2
blo "66000,49500"
tm "WireNameMgr"
)
s (Text
uid 936,0
va (VaSet
font "courier,12,0"
)
xt "60900,49700,60900,49700"
ju 2
blo "60900,49700"
tm "SignalTypeMgr"
)
)
)
*32 (PortIoIn
uid 275,0
shape (CompositeShape
uid 937,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 938,0
sl 0
ro 270
xt "67000,50625,68500,51375"
)
(Line
uid 939,0
sl 0
ro 270
xt "68500,51000,69000,51000"
pts [
"68500,51000"
"69000,51000"
]
)
]
)
tg (WTG
uid 940,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 941,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "62200,50300,66000,51700"
st "clock"
ju 2
blo "66000,51500"
tm "WireNameMgr"
)
s (Text
uid 942,0
va (VaSet
font "courier,12,0"
)
xt "62200,51700,62200,51700"
ju 2
blo "62200,51700"
tm "SignalTypeMgr"
)
)
)
*33 (PortIoIn
uid 313,0
shape (CompositeShape
uid 943,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 944,0
sl 0
ro 270
xt "67000,52625,68500,53375"
)
(Line
uid 945,0
sl 0
ro 270
xt "68500,53000,69000,53000"
pts [
"68500,53000"
"69000,53000"
]
)
]
)
tg (WTG
uid 946,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 947,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "61900,52300,66000,53700"
st "reset"
ju 2
blo "66000,53500"
tm "WireNameMgr"
)
s (Text
uid 948,0
va (VaSet
font "courier,12,0"
)
xt "61900,53700,61900,53700"
ju 2
blo "61900,53700"
tm "SignalTypeMgr"
)
)
)
*34 (Frame
uid 321,0
shape (RectFrame
uid 322,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 2
lineWidth 2
)
xt "3000,33000,63000,67000"
)
title (TextAssociate
uid 323,0
ps "TopLeftStrategy"
text (MLText
uid 324,0
va (VaSet
)
xt "2800,31400,27400,32400"
st "g1: FOR i IN 0 TO countInt'high GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
uid 325,0
ps "TopLeftStrategy"
shape (Rectangle
uid 326,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "3450,33200,4550,34800"
)
num (Text
uid 327,0
va (VaSet
)
xt "3650,33400,4450,34400"
st "2"
blo "3650,34200"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
uid 328,0
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*35 (Text
uid 329,0
va (VaSet
font "courier,9,1"
)
xt "55000,67000,65800,68200"
st "Frame Declarations"
blo "55000,68000"
)
*36 (MLText
uid 330,0
va (VaSet
)
xt "55000,68200,55000,68200"
tm "BdFrameDeclTextMgr"
)
]
)
lb "0"
rb "countInt'high"
)
*37 (Net
uid 563,0
decl (Decl
n "carry"
t "std_ulogic_vector"
b "(nbBits DOWNTO 0)"
o 7
suid 6,0
)
declText (MLText
uid 564,0
va (VaSet
font "courier,9,0"
)
xt "-11000,75400,16500,76300"
st "SIGNAL carry      : std_ulogic_vector(nbBits DOWNTO 0)
"
)
)
*38 (Net
uid 565,0
decl (Decl
n "toInc"
t "std_ulogic_vector"
b "(nbBits-1 DOWNTO 0)"
o 10
suid 7,0
)
declText (MLText
uid 566,0
va (VaSet
font "courier,9,0"
)
xt "-11000,78100,17500,79000"
st "SIGNAL toInc      : std_ulogic_vector(nbBits-1 DOWNTO 0)
"
)
)
*39 (Net
uid 569,0
decl (Decl
n "newCounter"
t "unsigned"
b "(nbBits-1 DOWNTO 0)"
o 9
suid 8,0
)
declText (MLText
uid 570,0
va (VaSet
font "courier,9,0"
)
xt "-11000,77200,13000,78100"
st "SIGNAL newCounter : unsigned(nbBits-1 DOWNTO 0)
"
)
)
*40 (PortIoOut
uid 581,0
shape (CompositeShape
uid 949,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 950,0
sl 0
ro 270
xt "106500,44625,108000,45375"
)
(Line
uid 951,0
sl 0
ro 270
xt "106000,45000,106500,45000"
pts [
"106000,45000"
"106500,45000"
]
)
]
)
tg (WTG
uid 952,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 953,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "109000,44300,130000,45600"
st "countOut : (bitNb-1 DOWNTO 0)"
blo "109000,45300"
tm "WireNameMgr"
)
s (Text
uid 954,0
va (VaSet
font "courier,12,0"
)
xt "109000,45600,109000,45600"
blo "109000,45600"
tm "SignalTypeMgr"
)
)
)
*41 (Net
uid 585,0
decl (Decl
n "countInt"
t "unsigned"
b "(nbBits-1 DOWNTO 0)"
o 8
suid 9,0
)
declText (MLText
uid 586,0
va (VaSet
font "courier,9,0"
)
xt "-11000,76300,13000,77200"
st "SIGNAL countInt   : unsigned(nbBits-1 DOWNTO 0)
"
)
)
*42 (Net
uid 670,0
decl (Decl
n "enable"
t "std_uLogic"
o 3
suid 10,0
)
declText (MLText
uid 671,0
va (VaSet
font "courier,9,0"
)
xt "-11000,70600,1000,71500"
st "enable     : std_uLogic
"
)
)
*43 (SaComponent
uid 1192,0
optionalChildren [
*44 (CptPort
uid 1172,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1173,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "70250,50625,71000,51375"
)
tg (CPTG
uid 1174,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1175,0
va (VaSet
)
xt "72000,50500,75400,51700"
st "clock"
blo "72000,51500"
)
s (Text
uid 1201,0
va (VaSet
)
xt "72000,51700,72000,51700"
blo "72000,51700"
)
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 2
suid 1,0
)
)
)
*45 (CptPort
uid 1176,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1177,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "70250,44625,71000,45375"
)
tg (CPTG
uid 1178,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1179,0
va (VaSet
)
xt "72000,44500,76000,45700"
st "dataIn"
blo "72000,45500"
)
s (Text
uid 1202,0
va (VaSet
)
xt "72000,45700,72000,45700"
blo "72000,45700"
)
)
thePort (LogicalPort
decl (Decl
n "dataIn"
t "unsigned"
b "(registerBitNb-1 DOWNTO 0)"
o 1
suid 2,0
)
)
)
*46 (CptPort
uid 1180,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1181,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "87000,44625,87750,45375"
)
tg (CPTG
uid 1182,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1183,0
va (VaSet
)
xt "81200,44400,86000,45600"
st "dataOut"
ju 2
blo "86000,45400"
)
s (Text
uid 1203,0
va (VaSet
)
xt "86000,45600,86000,45600"
ju 2
blo "86000,45600"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dataOut"
t "unsigned"
b "(registerBitNb-1 DOWNTO 0)"
o 3
suid 3,0
)
)
)
*47 (CptPort
uid 1184,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1185,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "70250,48625,71000,49375"
)
tg (CPTG
uid 1186,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1187,0
va (VaSet
)
xt "72000,48500,76000,49700"
st "enable"
blo "72000,49500"
)
s (Text
uid 1204,0
va (VaSet
)
xt "72000,49700,72000,49700"
blo "72000,49700"
)
)
thePort (LogicalPort
decl (Decl
n "enable"
t "std_ulogic"
o 4
suid 4,0
)
)
)
*48 (CptPort
uid 1188,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1189,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "70250,52625,71000,53375"
)
tg (CPTG
uid 1190,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1191,0
va (VaSet
)
xt "72000,52500,75300,53700"
st "reset"
blo "72000,53500"
)
s (Text
uid 1205,0
va (VaSet
)
xt "72000,53700,72000,53700"
blo "72000,53700"
)
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 5
suid 5,0
)
)
)
]
shape (Rectangle
uid 1193,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "71000,41000,87000,55000"
)
oxt "38000,10000,54000,24000"
ttg (MlTextGroup
uid 1194,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*49 (Text
uid 1195,0
va (VaSet
font "courier,8,1"
)
xt "70910,54700,75510,55700"
st "sequential"
blo "70910,55500"
tm "BdLibraryNameMgr"
)
*50 (Text
uid 1196,0
va (VaSet
font "courier,8,1"
)
xt "70910,55700,78110,56700"
st "registerUnsigned"
blo "70910,56500"
tm "CptNameMgr"
)
*51 (Text
uid 1197,0
va (VaSet
font "courier,8,1"
)
xt "70910,56700,71910,57700"
st "I2"
blo "70910,57500"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1198,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1199,0
text (MLText
uid 1200,0
va (VaSet
font "courier,8,0"
)
xt "71000,58800,93000,60600"
st "delay         = gateDelay    ( time     )  
registerBitNb = nbBits       ( positive )  "
)
header ""
)
elements [
(GiElement
name "delay"
type "time"
value "gateDelay"
)
(GiElement
name "registerBitNb"
type "positive"
value "nbBits"
)
]
)
portVis (PortSigDisplay
disp 1
sTC 0
sT 1
sIVOD 1
)
archFileType "UNKNOWN"
)
*52 (SaComponent
uid 1302,0
optionalChildren [
*53 (CptPort
uid 1294,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1295,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,0"
)
xt "92250,44625,93000,45375"
)
tg (CPTG
uid 1296,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1297,0
va (VaSet
isHidden 1
)
xt "93000,44700,95300,45900"
st "in1"
blo "93000,45700"
)
s (Text
uid 1311,0
va (VaSet
isHidden 1
)
xt "93000,45900,93000,45900"
blo "93000,45900"
)
)
thePort (LogicalPort
decl (Decl
n "in1"
t "unsigned"
b "(dataBitNb-1 DOWNTO 0)"
o 1
suid 1,0
)
)
)
*54 (CptPort
uid 1298,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1299,0
ro 90
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,0"
)
xt "98000,44625,98750,45375"
)
tg (CPTG
uid 1300,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1301,0
va (VaSet
isHidden 1
)
xt "95000,44700,98000,45900"
st "out1"
ju 2
blo "98000,45700"
)
s (Text
uid 1312,0
va (VaSet
isHidden 1
)
xt "98000,45900,98000,45900"
ju 2
blo "98000,45900"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "out1"
t "unsigned"
b "(dataBitNb-1 DOWNTO 0)"
o 2
suid 2,0
)
)
)
]
shape (Buf
uid 1303,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "93000,42000,98000,48000"
)
showPorts 0
oxt "36000,16000,41000,22000"
ttg (MlTextGroup
uid 1304,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*55 (Text
uid 1305,0
va (VaSet
font "courier,8,1"
)
xt "93910,47700,96310,48700"
st "gates"
blo "93910,48500"
tm "BdLibraryNameMgr"
)
*56 (Text
uid 1306,0
va (VaSet
font "courier,8,1"
)
xt "93910,48700,100610,49700"
st "bufferUnsigned"
blo "93910,49500"
tm "CptNameMgr"
)
*57 (Text
uid 1307,0
va (VaSet
font "courier,8,1"
)
xt "93910,49700,94910,50700"
st "I0"
blo "93910,50500"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1308,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1309,0
text (MLText
uid 1310,0
va (VaSet
font "courier,8,0"
)
xt "93000,50800,113000,52600"
st "dataBitNb = nbBits       ( positive )  
delay     = gateDelay    ( time     )  "
)
header ""
)
elements [
(GiElement
name "dataBitNb"
type "positive"
value "nbBits"
)
(GiElement
name "delay"
type "time"
value "gateDelay"
)
]
)
portVis (PortSigDisplay
disp 1
sN 0
sTC 0
sT 1
)
archFileType "UNKNOWN"
)
*58 (Wire
uid 71,0
optionalChildren [
*59 (BdJunction
uid 835,0
ps "OnConnectorStrategy"
shape (Circle
uid 836,0
va (VaSet
vasetType 1
)
xt "89350,44600,90150,45400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "87750,45000,93000,45000"
pts [
"87750,45000"
"93000,45000"
]
)
start &46
end &53
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
font "courier,12,0"
)
xt "84000,39600,90100,41000"
st "countInt"
blo "84000,40800"
tm "WireNameMgr"
)
)
on &41
)
*60 (Wire
uid 85,0
shape (OrthoPolyLine
uid 86,0
va (VaSet
vasetType 3
)
xt "39000,23000,39000,27000"
pts [
"39000,23000"
"39000,27000"
]
)
start &3
end &20
sat 32
eat 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 89,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 90,0
va (VaSet
font "courier,12,0"
)
xt "40000,21600,44300,23000"
st "down"
blo "40000,22800"
tm "WireNameMgr"
)
)
on &4
)
*61 (Wire
uid 113,0
shape (OrthoPolyLine
uid 114,0
va (VaSet
vasetType 3
)
xt "-5000,41000,15000,41000"
pts [
"-5000,41000"
"15000,41000"
]
)
start &6
end &8
sat 32
eat 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 117,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 118,0
va (VaSet
font "courier,12,0"
)
xt "-3000,39600,-600,41000"
st "up"
blo "-3000,40800"
tm "WireNameMgr"
)
)
on &7
)
*62 (Wire
uid 361,0
optionalChildren [
*63 (BdJunction
uid 837,0
ps "OnConnectorStrategy"
shape (Circle
uid 838,0
va (VaSet
vasetType 1
)
xt "38600,42600,39400,43400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 362,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "39000,33000,39000,57000"
pts [
"39000,33000"
"39000,57000"
]
)
end &14
es 0
sat 16
eat 32
sty 1
sl "(i)"
stc 0
st 0
sf 1
si 0
tg (WTG
uid 365,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 366,0
va (VaSet
font "courier,12,0"
)
xt "40000,33600,45200,35000"
st "carry(i)"
blo "40000,34800"
tm "WireNameMgr"
)
)
on &37
)
*64 (Wire
uid 371,0
shape (OrthoPolyLine
uid 372,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "39000,43000,47382,43000"
pts [
"39000,43000"
"47382,43000"
]
)
start &63
end &27
sat 32
eat 32
sty 1
sl "(i)"
stc 0
st 0
sf 1
si 0
tg (WTG
uid 373,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 374,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "41000,41600,46200,43000"
st "carry(i)"
blo "41000,42800"
tm "WireNameMgr"
)
)
on &37
)
*65 (Wire
uid 377,0
optionalChildren [
*66 (BdJunction
uid 839,0
ps "OnConnectorStrategy"
shape (Circle
uid 840,0
va (VaSet
vasetType 1
)
xt "44600,46600,45400,47400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 378,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "31000,47000,47381,47000"
pts [
"31000,47000"
"47381,47000"
]
)
start &8
end &26
sat 2
eat 32
sty 1
sl "(i)"
stc 0
st 0
sf 1
si 0
tg (WTG
uid 381,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 382,0
va (VaSet
font "courier,12,0"
)
xt "33000,45600,38300,47000"
st "toInc(i)"
blo "33000,46800"
tm "WireNameMgr"
)
)
on &38
)
*67 (Wire
uid 387,0
shape (OrthoPolyLine
uid 388,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "41000,47000,45000,60000"
pts [
"41000,60000"
"45000,60000"
"45000,47000"
]
)
start &16
end &66
sat 32
eat 32
sty 1
sl "(i)"
stc 0
st 0
sf 1
si 0
tg (WTG
uid 389,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 390,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "43000,58600,48300,60000"
st "toInc(i)"
blo "43000,59800"
tm "WireNameMgr"
)
)
on &38
)
*68 (Wire
uid 393,0
optionalChildren [
*69 (BdJunction
uid 841,0
ps "OnConnectorStrategy"
shape (Circle
uid 842,0
va (VaSet
vasetType 1
)
xt "10600,44600,11400,45400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 394,0
va (VaSet
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xt "3000,45000,15000,45000"
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sat 16
eat 1
sty 1
sl "(i)"
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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va (VaSet
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st "countInt(i)"
blo "5000,44800"
tm "WireNameMgr"
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)
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va (VaSet
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xt "69000,51000,70250,51000"
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end &44
ss 0
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sat 32
eat 32
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st 0
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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va (VaSet
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st "clock"
blo "67000,48800"
tm "WireNameMgr"
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shape (OrthoPolyLine
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va (VaSet
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xt "69000,53000,70250,53000"
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end &48
ss 0
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sat 32
eat 32
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st 0
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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va (VaSet
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blo "67000,52800"
tm "WireNameMgr"
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on &5
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va (VaSet
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xt "69000,49000,70250,49000"
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start &31
end &47
ss 0
es 0
sat 32
eat 32
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sf 1
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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st "enable"
blo "67000,50800"
tm "WireNameMgr"
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va (VaSet
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pts [
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)
end &45
sat 16
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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st "newCounter"
blo "63000,44800"
tm "WireNameMgr"
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start &25
sat 32
eat 16
sty 1
sl "(i)"
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
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blo "54000,44800"
tm "WireNameMgr"
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]
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sat 16
eat 16
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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st "carry"
blo "37000,69800"
tm "WireNameMgr"
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va (VaSet
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xt "45000,71000,53000,71000"
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]
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sat 16
eat 16
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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xt "47000,69600,51000,71000"
st "toInc"
blo "47000,70800"
tm "WireNameMgr"
)
)
on &38
)
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uid 509,0
shape (OrthoPolyLine
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va (VaSet
vasetType 3
lineWidth 2
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xt "37000,63000,37000,67000"
pts [
"37000,63000"
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)
start &15
sat 32
eat 16
sty 1
sl "(i+1)"
stc 0
st 0
sf 1
si 0
tg (WTG
uid 513,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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xt "30000,64600,37700,66000"
st "carry(i+1)"
blo "30000,65800"
tm "WireNameMgr"
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)
on &37
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uid 571,0
shape (OrthoPolyLine
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va (VaSet
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)
xt "98000,45000,106000,45000"
pts [
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)
start &54
end &40
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 577,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "100000,43600,105600,44900"
st "countOut"
blo "100000,44600"
tm "WireNameMgr"
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)
on &2
)
*79 (Wire
uid 587,0
shape (OrthoPolyLine
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va (VaSet
vasetType 3
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)
xt "-13000,22000,89750,49000"
pts [
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"-13000,49000"
"3000,49000"
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)
start &59
sat 32
eat 16
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 591,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "-4000,47600,2100,49000"
st "countInt"
blo "-4000,48800"
tm "WireNameMgr"
)
)
on &41
)
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va (VaSet
vasetType 3
lineWidth 2
)
xt "11000,45000,35000,57000"
pts [
"11000,45000"
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"35000,53000"
"35000,57000"
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)
start &69
end &13
sat 32
eat 32
sty 1
sl "(i)"
stc 0
st 0
sf 1
si 0
tg (WTG
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ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
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font "courier,12,0"
)
xt "33600,48100,35000,56300"
st "countInt(i)"
blo "34800,56300"
tm "WireNameMgr"
)
)
on &41
)
]
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grid (Grid
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isActive 1
xSpacing 1000
xySpacing 1000
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yShown 1
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stg "VerticalLayoutStrategy"
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va (VaSet
)
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tm "PackageList"
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)
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va (VaSet
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xt "20000,3200,32000,5200"
st "`resetall
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)
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uid 50,0
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tm "BdCompilerDirectivesTextMgr"
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va (VaSet
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tm "BdCompilerDirectivesTextMgr"
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colour 1
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yMargin 49
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paperType "A4"
titlesVisible 0
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xt "200,200,2600,1200"
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Text
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tm "CommentText"
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)
defaultRequirementText (RequirementText
shape (ZoomableIcon
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lineColor "0,0,32768"
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xt "0,0,1500,1750"
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iconMaskName "reqTracerRequirement.msk"
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autoResize 1
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xt "450,2150,1450,3050"
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Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
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)
)
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shape (RectFrame
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vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 2
)
xt "0,0,20000,20000"
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ps "TopLeftStrategy"
text (Text
va (VaSet
)
xt "1000,1000,3700,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
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vasetType 1
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lineWidth 2
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xt "0,0,8000,10000"
)
ttg (MlTextGroup
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stg "VerticalLayoutStrategy"
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va (VaSet
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xt "800,2700,8100,4100"
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blo "800,3900"
tm "BdLibraryNameMgr"
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va (VaSet
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blo "800,5300"
tm "BlkNameMgr"
)
*93 (Text
va (VaSet
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st "I0"
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tm "InstanceNameMgr"
)
]
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ga (GenericAssociation
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matrix (Matrix
text (MLText
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xt "800,12700,800,12700"
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header ""
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elements [
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)
)
defaultMWComponent (MWC
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va (VaSet
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xt "-600,0,8600,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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xt "-100,3000,2600,4000"
st "Library"
blo "-100,3800"
)
*95 (Text
va (VaSet
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xt "-100,4000,5900,5000"
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blo "-100,4800"
)
*96 (Text
va (VaSet
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xt "-100,5000,900,6000"
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tm "InstanceNameMgr"
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ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
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xt "-7100,1000,-7100,1000"
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header ""
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elements [
]
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prms (Property
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pname "params"
ptn "String"
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visOptions (mwParamsVisibilityOptions
)
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va (VaSet
vasetType 1
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lineColor "0,32896,0"
lineWidth 2
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xt "-350,0,8350,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
)
xt "150,3000,2850,4000"
st "Library"
blo "150,3800"
tm "BdLibraryNameMgr"
)
*98 (Text
va (VaSet
)
xt "150,4000,5650,5000"
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blo "150,4800"
tm "CptNameMgr"
)
*99 (Text
va (VaSet
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xt "150,5000,1150,6000"
st "I0"
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tm "InstanceNameMgr"
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]
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ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
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xt "-6850,1000,-6850,1000"
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header ""
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elements [
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va (VaSet
vasetType 1
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xt "-850,0,8850,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
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xt "-350,3000,2350,4000"
st "Library"
blo "-350,3800"
)
*101 (Text
va (VaSet
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xt "-350,4000,5750,5000"
st "VhdlComponent"
blo "-350,4800"
)
*102 (Text
va (VaSet
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xt "-350,5000,650,6000"
st "I0"
blo "-350,5800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
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)
xt "-7350,1000,-7350,1000"
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header ""
)
elements [
]
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entityPath ""
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archPath ""
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shape (Rectangle
va (VaSet
vasetType 1
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lineColor "0,32896,0"
lineWidth 2
)
xt "-1500,0,9500,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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st "Library"
blo "-1000,3800"
)
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va (VaSet
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xt "-1000,4000,6100,5000"
st "VerilogComponent"
blo "-1000,4800"
)
*105 (Text
va (VaSet
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xt "-1000,5000,0,6000"
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blo "-1000,5800"
tm "InstanceNameMgr"
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ga (GenericAssociation
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matrix (Matrix
text (MLText
va (VaSet
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font "courier,9,0"
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xt "-8000,1000,-8000,1000"
)
header ""
)
elements [
]
)
entityPath ""
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defaultHdlText (HdlText
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va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
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ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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va (VaSet
)
xt "3050,3700,4650,4700"
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blo "3050,4500"
tm "HdlTextNameMgr"
)
*107 (Text
va (VaSet
)
xt "3050,4700,3850,5700"
st "1"
blo "3050,5500"
tm "HdlTextNumberMgr"
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]
)
)
defaultEmbeddedText (EmbeddedText
commentText (CommentText
ps "CenterOffsetStrategy"
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va (VaSet
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fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,18000,5000"
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text (MLText
va (VaSet
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xt "200,200,2200,1100"
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Text
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tm "HdlTextMgr"
wrapOption 3
visibleHeight 4600
visibleWidth 17600
)
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)
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vasetType 1
fg "65535,65535,0"
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xt "-1000,-1000,1000,1000"
radius 1000
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name (Text
va (VaSet
)
xt "-400,-600,600,400"
st "G"
blo "-400,200"
)
)
defaultRipper (Ripper
ps "OnConnectorStrategy"
shape (Line2D
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"1000,1000"
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va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
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)
defaultBdJunction (BdJunction
ps "OnConnectorStrategy"
shape (Circle
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vasetType 1
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xt "-400,-400,400,400"
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ro 270
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tg (WTG
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stg "STSignalDisplayStrategy"
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xt "-3000,-500,-3000,-500"
ju 2
blo "-3000,-500"
tm "WireNameMgr"
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s (Text
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ju 2
blo "-3000,-500"
tm "SignalTypeMgr"
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)
defaultPortIoOut (PortIoOut
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va (VaSet
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ro 270
xt "500,-375,2000,375"
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(Line
sl 0
ro 270
xt "0,0,500,0"
pts [
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tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
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xt "3000,-500,3000,-500"
blo "3000,-500"
tm "WireNameMgr"
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s (Text
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blo "3000,-500"
tm "SignalTypeMgr"
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defaultPortIoInOut (PortIoInOut
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va (VaSet
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fg "0,0,32768"
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xt "500,-375,2000,375"
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(Line
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xt "0,0,500,0"
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tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
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va (VaSet
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xt "3000,-500,3000,-500"
blo "3000,-500"
tm "WireNameMgr"
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s (Text
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blo "3000,-500"
tm "SignalTypeMgr"
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defaultPortIoBuffer (PortIoBuffer
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xt "500,-375,2000,375"
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(Line
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xt "0,0,500,0"
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tg (WTG
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stg "STSignalDisplayStrategy"
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xt "3000,-500,3000,-500"
blo "3000,-500"
tm "WireNameMgr"
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blo "3000,-500"
tm "SignalTypeMgr"
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defaultSignal (Wire
shape (OrthoPolyLine
va (VaSet
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ss 0
es 0
sat 32
eat 32
stc 0
st 0
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sty 1
stc 0
st 0
sf 1
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tm "WireNameMgr"
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decl (Decl
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