mirror of
https://github.com/Klagarge/Cursor.git
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1666 lines
21 KiB
Plaintext
1666 lines
21 KiB
Plaintext
|
DocumentHdrVersion "1.1"
|
||
|
Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "NUMERIC_STD"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "26.1"
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appVersion "2018.1 (Build 12)"
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model (Symbol
|
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commonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
suid 6,0
|
||
|
usingSuid 1
|
||
|
emptyRow *1 (LEmptyRow
|
||
|
)
|
||
|
uid 95,0
|
||
|
optionalChildren [
|
||
|
*2 (RefLabelRowHdr
|
||
|
)
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||
|
*3 (TitleRowHdr
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||
|
)
|
||
|
*4 (FilterRowHdr
|
||
|
)
|
||
|
*5 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*6 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*7 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*8 (NameColHdr
|
||
|
tm "NameColHdrMgr"
|
||
|
)
|
||
|
*9 (ModeColHdr
|
||
|
tm "ModeColHdrMgr"
|
||
|
)
|
||
|
*10 (TypeColHdr
|
||
|
tm "TypeColHdrMgr"
|
||
|
)
|
||
|
*11 (BoundsColHdr
|
||
|
tm "BoundsColHdrMgr"
|
||
|
)
|
||
|
*12 (InitColHdr
|
||
|
tm "InitColHdrMgr"
|
||
|
)
|
||
|
*13 (EolColHdr
|
||
|
tm "EolColHdrMgr"
|
||
|
)
|
||
|
*14 (LogPort
|
||
|
port (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "acc"
|
||
|
t "unsigned"
|
||
|
b "(bitNb-1 DOWNTO 0)"
|
||
|
o 7
|
||
|
suid 1,0
|
||
|
)
|
||
|
)
|
||
|
uid 81,0
|
||
|
)
|
||
|
*15 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "clear"
|
||
|
t "std_ulogic"
|
||
|
o 8
|
||
|
suid 2,0
|
||
|
)
|
||
|
)
|
||
|
uid 83,0
|
||
|
)
|
||
|
*16 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "clock"
|
||
|
t "std_ulogic"
|
||
|
o 1
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
uid 85,0
|
||
|
)
|
||
|
*17 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "enable"
|
||
|
t "std_ulogic"
|
||
|
o 5
|
||
|
suid 4,0
|
||
|
)
|
||
|
)
|
||
|
uid 87,0
|
||
|
)
|
||
|
*18 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "reset"
|
||
|
t "std_ulogic"
|
||
|
o 3
|
||
|
suid 5,0
|
||
|
)
|
||
|
)
|
||
|
uid 89,0
|
||
|
)
|
||
|
*19 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "step"
|
||
|
t "unsigned"
|
||
|
b "(bitNb-1 DOWNTO 0)"
|
||
|
o 6
|
||
|
suid 6,0
|
||
|
)
|
||
|
)
|
||
|
uid 91,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 108,0
|
||
|
optionalChildren [
|
||
|
*20 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
emptyMRCItem *21 (MRCItem
|
||
|
litem &1
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 110,0
|
||
|
optionalChildren [
|
||
|
*22 (MRCItem
|
||
|
litem &2
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 111,0
|
||
|
)
|
||
|
*23 (MRCItem
|
||
|
litem &3
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 112,0
|
||
|
)
|
||
|
*24 (MRCItem
|
||
|
litem &4
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 113,0
|
||
|
)
|
||
|
*25 (MRCItem
|
||
|
litem &14
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 82,0
|
||
|
)
|
||
|
*26 (MRCItem
|
||
|
litem &15
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 84,0
|
||
|
)
|
||
|
*27 (MRCItem
|
||
|
litem &16
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 86,0
|
||
|
)
|
||
|
*28 (MRCItem
|
||
|
litem &17
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 88,0
|
||
|
)
|
||
|
*29 (MRCItem
|
||
|
litem &18
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 90,0
|
||
|
)
|
||
|
*30 (MRCItem
|
||
|
litem &19
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 92,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 114,0
|
||
|
optionalChildren [
|
||
|
*31 (MRCItem
|
||
|
litem &5
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 115,0
|
||
|
)
|
||
|
*32 (MRCItem
|
||
|
litem &7
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 116,0
|
||
|
)
|
||
|
*33 (MRCItem
|
||
|
litem &8
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 117,0
|
||
|
)
|
||
|
*34 (MRCItem
|
||
|
litem &9
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 118,0
|
||
|
)
|
||
|
*35 (MRCItem
|
||
|
litem &10
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 119,0
|
||
|
)
|
||
|
*36 (MRCItem
|
||
|
litem &11
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 120,0
|
||
|
)
|
||
|
*37 (MRCItem
|
||
|
litem &12
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 121,0
|
||
|
)
|
||
|
*38 (MRCItem
|
||
|
litem &13
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 122,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 109,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 94,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *39 (LEmptyRow
|
||
|
)
|
||
|
uid 124,0
|
||
|
optionalChildren [
|
||
|
*40 (RefLabelRowHdr
|
||
|
)
|
||
|
*41 (TitleRowHdr
|
||
|
)
|
||
|
*42 (FilterRowHdr
|
||
|
)
|
||
|
*43 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*44 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*45 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*46 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*47 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*48 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*49 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*50 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
*51 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "bitNb"
|
||
|
type "positive"
|
||
|
value "8"
|
||
|
)
|
||
|
uid 220,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 136,0
|
||
|
optionalChildren [
|
||
|
*52 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
emptyMRCItem *53 (MRCItem
|
||
|
litem &39
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 138,0
|
||
|
optionalChildren [
|
||
|
*54 (MRCItem
|
||
|
litem &40
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 139,0
|
||
|
)
|
||
|
*55 (MRCItem
|
||
|
litem &41
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 140,0
|
||
|
)
|
||
|
*56 (MRCItem
|
||
|
litem &42
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 141,0
|
||
|
)
|
||
|
*57 (MRCItem
|
||
|
litem &51
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 221,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 142,0
|
||
|
optionalChildren [
|
||
|
*58 (MRCItem
|
||
|
litem &43
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 143,0
|
||
|
)
|
||
|
*59 (MRCItem
|
||
|
litem &45
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 144,0
|
||
|
)
|
||
|
*60 (MRCItem
|
||
|
litem &46
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 145,0
|
||
|
)
|
||
|
*61 (MRCItem
|
||
|
litem &47
|
||
|
pos 3
|
||
|
dimension 100
|
||
|
uid 146,0
|
||
|
)
|
||
|
*62 (MRCItem
|
||
|
litem &48
|
||
|
pos 4
|
||
|
dimension 50
|
||
|
uid 147,0
|
||
|
)
|
||
|
*63 (MRCItem
|
||
|
litem &49
|
||
|
pos 5
|
||
|
dimension 50
|
||
|
uid 148,0
|
||
|
)
|
||
|
*64 (MRCItem
|
||
|
litem &50
|
||
|
pos 6
|
||
|
dimension 80
|
||
|
uid 149,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 137,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 123,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds/accumulator/symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds/accumulator/symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds/accumulator"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds/accumulator"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "08/28/19"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "Wed"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "Wednesday"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "28"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "accumulator"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_author"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_date"
|
||
|
value "08/28/19"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_group"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_host"
|
||
|
value "Aphelia"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_time"
|
||
|
value "13:46:19"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "Aphelia"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "sequential"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Concatenation"
|
||
|
value "$HDS_LIBS_DIR/Sequential/concat"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/Libraries/sequential/work"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "08"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "accumulator"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "Aug"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "August"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds/accumulator/symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Sequential/hds/accumulator/symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$DESIGN_SCRATCH_DIR\\$ISE_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME\\win64"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_SimulationPath"
|
||
|
value "$SIMULATION_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_SynplifyPath"
|
||
|
value "$SYNPLIFY_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "13:46:19"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "accumulator"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2018.1 (Build 12)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2019"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "19"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "Vhdl2008LangMgr"
|
||
|
uid 93,0
|
||
|
optionalChildren [
|
||
|
*65 (SymbolBody
|
||
|
uid 8,0
|
||
|
optionalChildren [
|
||
|
*66 (CptPort
|
||
|
uid 51,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 52,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "23000,6625,23750,7375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 53,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 54,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "20400,6500,22000,7500"
|
||
|
st "acc"
|
||
|
ju 2
|
||
|
blo "22000,7300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 55,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "44000,6500,66000,7400"
|
||
|
st "acc : OUT unsigned (bitNb-1 DOWNTO 0)"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "acc"
|
||
|
t "unsigned"
|
||
|
b "(bitNb-1 DOWNTO 0)"
|
||
|
o 7
|
||
|
suid 1,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*67 (CptPort
|
||
|
uid 56,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 57,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "14250,10625,15000,11375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 58,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 59,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "16000,10500,18100,11500"
|
||
|
st "clear"
|
||
|
blo "16000,11300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 60,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "44000,2000,59000,2900"
|
||
|
st "clear : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "clear"
|
||
|
t "std_ulogic"
|
||
|
o 8
|
||
|
suid 2,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*68 (CptPort
|
||
|
uid 61,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 62,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "14250,12625,15000,13375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 63,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 64,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "16000,12500,18100,13500"
|
||
|
st "clock"
|
||
|
blo "16000,13300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 65,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "44000,2900,59000,3800"
|
||
|
st "clock : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "clock"
|
||
|
t "std_ulogic"
|
||
|
o 1
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*69 (CptPort
|
||
|
uid 66,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 67,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "14250,8625,15000,9375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 68,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 69,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "16000,8500,18600,9500"
|
||
|
st "enable"
|
||
|
blo "16000,9300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 70,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "44000,3800,59000,4700"
|
||
|
st "enable : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "enable"
|
||
|
t "std_ulogic"
|
||
|
o 5
|
||
|
suid 4,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*70 (CptPort
|
||
|
uid 71,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 72,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "14250,13625,15000,14375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 73,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 74,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "16000,13500,18100,14500"
|
||
|
st "reset"
|
||
|
blo "16000,14300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 75,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
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||
|
)
|
||
|
xt "44000,4700,59000,5600"
|
||
|
st "reset : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "reset"
|
||
|
t "std_ulogic"
|
||
|
o 3
|
||
|
suid 5,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*71 (CptPort
|
||
|
uid 76,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 77,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "14250,6625,15000,7375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 78,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 79,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "16000,6500,17800,7500"
|
||
|
st "step"
|
||
|
blo "16000,7300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 80,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "44000,5600,67000,6500"
|
||
|
st "step : IN unsigned (bitNb-1 DOWNTO 0) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "step"
|
||
|
t "unsigned"
|
||
|
b "(bitNb-1 DOWNTO 0)"
|
||
|
o 6
|
||
|
suid 6,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
]
|
||
|
shape (Rectangle
|
||
|
uid 196,0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
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|
lineColor "0,32896,0"
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||
|
lineWidth 2
|
||
|
)
|
||
|
xt "15000,6000,23000,16000"
|
||
|
)
|
||
|
biTextGroup (BiTextGroup
|
||
|
uid 10,0
|
||
|
ps "CenterOffsetStrategy"
|
||
|
stg "VerticalLayoutStrategy"
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||
|
first (Text
|
||
|
uid 11,0
|
||
|
va (VaSet
|
||
|
font "courier,8,1"
|
||
|
)
|
||
|
xt "15300,16000,20800,16900"
|
||
|
st "sequential"
|
||
|
blo "15300,16700"
|
||
|
)
|
||
|
second (Text
|
||
|
uid 12,0
|
||
|
va (VaSet
|
||
|
font "courier,8,1"
|
||
|
)
|
||
|
xt "15300,16900,21300,17800"
|
||
|
st "accumulator"
|
||
|
blo "15300,17600"
|
||
|
)
|
||
|
)
|
||
|
gi *72 (GenericInterface
|
||
|
uid 13,0
|
||
|
ps "CenterOffsetStrategy"
|
||
|
matrix (Matrix
|
||
|
uid 14,0
|
||
|
text (MLText
|
||
|
uid 15,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
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||
|
)
|
||
|
xt "15000,3600,25500,6300"
|
||
|
st "Generic Declarations
|
||
|
|
||
|
bitNb positive 8 "
|
||
|
)
|
||
|
header "Generic Declarations"
|
||
|
showHdrWhenContentsEmpty 1
|
||
|
)
|
||
|
elements [
|
||
|
(GiElement
|
||
|
name "bitNb"
|
||
|
type "positive"
|
||
|
value "8"
|
||
|
)
|
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|
]
|
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|
)
|
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|
portInstanceVisAsIs 1
|
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|
portInstanceVis (PortSigDisplay
|
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|
sTC 0
|
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|
sF 0
|
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|
)
|
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|
portVis (PortSigDisplay
|
||
|
sTC 0
|
||
|
sF 0
|
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|
)
|
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|
)
|
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|
*73 (Grouping
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||
|
uid 16,0
|
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|
optionalChildren [
|
||
|
*74 (CommentText
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|
uid 18,0
|
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|
shape (Rectangle
|
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|
uid 19,0
|
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|
sl 0
|
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|
va (VaSet
|
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|
vasetType 1
|
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|
fg "65280,65280,46080"
|
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|
)
|
||
|
xt "-2000,-1000,15000,0"
|
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|
)
|
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|
oxt "18000,70000,35000,71000"
|
||
|
text (MLText
|
||
|
uid 20,0
|
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o 0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultCptPortBuffer (CptPort
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Diamond
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
bg "0,0,0"
|
||
|
)
|
||
|
xt "0,0,750,750"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "0,750,3500,1650"
|
||
|
st "Buffer0"
|
||
|
blo "0,1450"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
lang 11
|
||
|
m 3
|
||
|
decl (Decl
|
||
|
n "Buffer0"
|
||
|
t "std_logic_vector"
|
||
|
b "(15 DOWNTO 0)"
|
||
|
o 0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
DeclarativeBlock *88 (SymDeclBlock
|
||
|
uid 1,0
|
||
|
stg "SymDeclLayoutStrategy"
|
||
|
declLabel (Text
|
||
|
uid 2,0
|
||
|
va (VaSet
|
||
|
font "courier,8,1"
|
||
|
)
|
||
|
xt "42000,0,47400,1000"
|
||
|
st "Declarations"
|
||
|
blo "42000,800"
|
||
|
)
|
||
|
portLabel (Text
|
||
|
uid 3,0
|
||
|
va (VaSet
|
||
|
font "courier,8,1"
|
||
|
)
|
||
|
xt "42000,1000,44700,2000"
|
||
|
st "Ports:"
|
||
|
blo "42000,1800"
|
||
|
)
|
||
|
externalLabel (Text
|
||
|
uid 4,0
|
||
|
va (VaSet
|
||
|
font "courier,8,1"
|
||
|
)
|
||
|
xt "42000,7400,44500,8300"
|
||
|
st "User:"
|
||
|
blo "42000,8100"
|
||
|
)
|
||
|
internalLabel (Text
|
||
|
uid 6,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "courier,8,1"
|
||
|
)
|
||
|
xt "42000,0,47800,1000"
|
||
|
st "Internal User:"
|
||
|
blo "42000,800"
|
||
|
)
|
||
|
externalText (MLText
|
||
|
uid 5,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "44000,8300,44000,8300"
|
||
|
tm "SyDeclarativeTextMgr"
|
||
|
)
|
||
|
internalText (MLText
|
||
|
uid 7,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "42000,0,42000,0"
|
||
|
tm "SyDeclarativeTextMgr"
|
||
|
)
|
||
|
)
|
||
|
lastUid 267,0
|
||
|
activeModelName "Symbol"
|
||
|
)
|