diff --git a/.vscode/c_cpp_properties.json b/.vscode/c_cpp_properties.json
new file mode 100644
index 0000000..f0aa866
--- /dev/null
+++ b/.vscode/c_cpp_properties.json
@@ -0,0 +1,21 @@
+{
+    "configurations": [
+        {
+            "name": "Win32",
+            "includePath": [
+                "${workspaceFolder}/**"
+            ],
+            "defines": [
+                "_DEBUG",
+                "UNICODE",
+                "_UNICODE"
+            ],
+            "windowsSdkVersion": "10.0.20348.0",
+            "compilerPath": "C:/Program Files/Microsoft Visual Studio/2022/Community/VC/Tools/MSVC/14.30.30705/bin/Hostx64/x64/cl.exe",
+            "cStandard": "c17",
+            "cppStandard": "c++17",
+            "intelliSenseMode": "windows-msvc-x64"
+        }
+    ],
+    "version": 4
+}
\ No newline at end of file
diff --git a/Cursor/hds/@compteur/compteurt.bd b/Cursor/hds/@compteur/compteurt.bd
new file mode 100644
index 0000000..fbac2f6
--- /dev/null
+++ b/Cursor/hds/@compteur/compteurt.bd
@@ -0,0 +1,3623 @@
+DocumentHdrVersion "1.1"
+Header (DocumentHdr
+version 2
+dialect 11
+dmPackageRefs [
+(DmPackageRef
+library "ieee"
+unitName "std_logic_1164"
+)
+(DmPackageRef
+library "ieee"
+unitName "numeric_std"
+)
+(DmPackageRef
+library "gates"
+unitName "gates"
+)
+(DmPackageRef
+library "ieee"
+unitName "NUMERIC_SIGNED"
+)
+]
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+(Instance
+name "U_0"
+duLibraryName "Cursor"
+duName "compteurUpDownRsyncAll"
+elements [
+]
+mwi 0
+uid 205,0
+)
+(Instance
+name "U_1"
+duLibraryName "gates"
+duName "or2"
+elements [
+(GiElement
+name "delay"
+type "time"
+value "gateDelay"
+)
+]
+mwi 0
+uid 353,0
+)
+(Instance
+name "U_2"
+duLibraryName "Cursor"
+duName "convertissor_position"
+elements [
+]
+mwi 0
+uid 384,0
+)
+]
+libraryRefs [
+"ieee"
+"gates"
+]
+)
+version "32.1"
+appVersion "2019.2 (Build 5)"
+noEmbeddedEditors 1
+model (BlockDiag
+VExpander (VariableExpander
+vvMap [
+(vvPair
+variable "HDLDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
+)
+(vvPair
+variable "HDSDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
+)
+(vvPair
+variable "SideDataDesignDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\compteurt.bd.info"
+)
+(vvPair
+variable "SideDataUserDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\compteurt.bd.user"
+)
+(vvPair
+variable "SourceDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
+)
+(vvPair
+variable "appl"
+value "HDL Designer"
+)
+(vvPair
+variable "arch_name"
+value "compteurt"
+)
+(vvPair
+variable "concat_file"
+value "concatenated"
+)
+(vvPair
+variable "config"
+value "%(unit)_%(view)_config"
+)
+(vvPair
+variable "d"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur"
+)
+(vvPair
+variable "d_logical"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Compteur"
+)
+(vvPair
+variable "date"
+value "14.12.2021"
+)
+(vvPair
+variable "day"
+value "mar."
+)
+(vvPair
+variable "day_long"
+value "mardi"
+)
+(vvPair
+variable "dd"
+value "14"
+)
+(vvPair
+variable "entity_name"
+value "Compteur"
+)
+(vvPair
+variable "ext"
+value "<TBD>"
+)
+(vvPair
+variable "f"
+value "compteurt.bd"
+)
+(vvPair
+variable "f_logical"
+value "compteurt.bd"
+)
+(vvPair
+variable "f_noext"
+value "compteurt"
+)
+(vvPair
+variable "graphical_source_author"
+value "remi"
+)
+(vvPair
+variable "graphical_source_date"
+value "14.12.2021"
+)
+(vvPair
+variable "graphical_source_group"
+value "UNKNOWN"
+)
+(vvPair
+variable "graphical_source_host"
+value "MARVIN"
+)
+(vvPair
+variable "graphical_source_time"
+value "16:00:52"
+)
+(vvPair
+variable "group"
+value "UNKNOWN"
+)
+(vvPair
+variable "host"
+value "MARVIN"
+)
+(vvPair
+variable "language"
+value "VHDL"
+)
+(vvPair
+variable "library"
+value "Cursor"
+)
+(vvPair
+variable "library_downstream_ModelSimCompiler"
+value "$SCRATCH_DIR/Cursor/work"
+)
+(vvPair
+variable "mm"
+value "12"
+)
+(vvPair
+variable "module_name"
+value "Compteur"
+)
+(vvPair
+variable "month"
+value "déc."
+)
+(vvPair
+variable "month_long"
+value "décembre"
+)
+(vvPair
+variable "p"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\@compteur\\compteurt.bd"
+)
+(vvPair
+variable "p_logical"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\Compteur\\compteurt.bd"
+)
+(vvPair
+variable "package_name"
+value "<Undefined Variable>"
+)
+(vvPair
+variable "project_name"
+value "hds"
+)
+(vvPair
+variable "series"
+value "HDL Designer Series"
+)
+(vvPair
+variable "this_ext"
+value "bd"
+)
+(vvPair
+variable "this_file"
+value "compteurt"
+)
+(vvPair
+variable "this_file_logical"
+value "compteurt"
+)
+(vvPair
+variable "time"
+value "16:00:52"
+)
+(vvPair
+variable "unit"
+value "Compteur"
+)
+(vvPair
+variable "user"
+value "remi"
+)
+(vvPair
+variable "version"
+value "2019.2 (Build 5)"
+)
+(vvPair
+variable "view"
+value "compteurt"
+)
+(vvPair
+variable "year"
+value "2021"
+)
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+variable "yy"
+value "21"
+)
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+)
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diff --git a/Cursor/hds/@compteur/interface b/Cursor/hds/@compteur/interface
new file mode 100644
index 0000000..eb964c8
--- /dev/null
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diff --git a/Cursor/hds/@encoder/encoder.sm b/Cursor/hds/@encoder/encoder.sm
new file mode 100644
index 0000000..8e644eb
--- /dev/null
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@@ -0,0 +1,4268 @@
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+visibleHeight 1000
+visibleWidth 17000
+)
+position 1
+ignorePrefs 1
+titleBlock 1
+)
+]
+shape (GroupingShape
+uid 17,0
+va (VaSet
+vasetType 1
+fg "65535,65535,65535"
+lineStyle 2
+lineWidth 2
+)
+xt "32000,44000,73000,49000"
+)
+oxt "14000,66000,55000,71000"
+)
+]
+bg "65535,65535,65535"
+grid (Grid
+origin "0,0"
+isVisible 1
+isActive 1
+xSpacing 1000
+xySpacing 1000
+xShown 1
+yShown 1
+color "65535,0,0"
+)
+packageList *82 (PackageList
+uid 48,0
+stg "VerticalLayoutStrategy"
+textVec [
+*83 (Text
+uid 49,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "0,0,7600,1200"
+st "Package List"
+blo "0,1000"
+)
+*84 (MLText
+uid 50,0
+va (VaSet
+)
+xt "0,1200,19000,8400"
+st "LIBRARY ieee;
+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+LIBRARY gates;
+USE gates.gates.all;
+USE ieee.NUMERIC_SIGNED.all;"
+tm "PackageList"
+)
+]
+)
+windowSize "0,0,1015,690"
+viewArea "0,0,0,0"
+cachedDiagramExtent "0,0,0,0"
+pageBreakOrigin "0,0"
+defaultCommentText (CommentText
+shape (Rectangle
+layer 0
+va (VaSet
+vasetType 1
+fg "65280,65280,46080"
+lineColor "0,0,32768"
+)
+xt "0,0,15000,5000"
+)
+text (MLText
+va (VaSet
+fg "0,0,32768"
+)
+xt "200,200,3200,1400"
+st "
+Text
+"
+tm "CommentText"
+wrapOption 3
+visibleHeight 4600
+visibleWidth 14600
+)
+)
+defaultRequirementText (RequirementText
+shape (ZoomableIcon
+layer 0
+va (VaSet
+vasetType 1
+fg "59904,39936,65280"
+lineColor "0,0,32768"
+)
+xt "0,0,1500,1750"
+iconName "reqTracerRequirement.bmp"
+iconMaskName "reqTracerRequirement.msk"
+)
+autoResize 1
+text (MLText
+va (VaSet
+fg "0,0,32768"
+font "arial,8,0"
+)
+xt "500,2150,1400,3150"
+st "
+Text
+"
+tm "RequirementText"
+wrapOption 3
+visibleHeight 1350
+visibleWidth 1100
+)
+)
+defaultPanel (Panel
+shape (RectFrame
+va (VaSet
+vasetType 1
+fg "65535,65535,65535"
+lineColor "32768,0,0"
+lineWidth 3
+)
+xt "0,0,20000,20000"
+)
+title (TextAssociate
+ps "TopLeftStrategy"
+text (Text
+va (VaSet
+font "Verdana,9,1"
+)
+xt "1000,1000,5000,2200"
+st "Panel0"
+blo "1000,2000"
+tm "PanelText"
+)
+)
+)
+parentGraphicsRef (HdmGraphicsRef
+libraryName "Cursor"
+entityName "Position"
+viewName "position.bd"
+)
+defaultSymbolBody (SymbolBody
+shape (Rectangle
+va (VaSet
+vasetType 1
+fg "0,65535,0"
+lineColor "0,32896,0"
+lineWidth 2
+)
+xt "15000,6000,44000,26000"
+)
+biTextGroup (BiTextGroup
+ps "CenterOffsetStrategy"
+stg "VerticalLayoutStrategy"
+first (Text
+va (VaSet
+font "Verdana,9,1"
+)
+xt "26800,14800,32200,16000"
+st "<library>"
+blo "26800,15800"
+)
+second (Text
+va (VaSet
+font "Verdana,9,1"
+)
+xt "26800,16000,30700,17200"
+st "<cell>"
+blo "26800,17000"
+)
+)
+gi *85 (GenericInterface
+ps "CenterOffsetStrategy"
+matrix (Matrix
+text (MLText
+va (VaSet
+font "Courier New,8,0"
+)
+xt "0,12000,11500,12800"
+st "Generic Declarations"
+)
+header "Generic Declarations"
+showHdrWhenContentsEmpty 1
+)
+elements [
+]
+)
+portInstanceVisAsIs 1
+portInstanceVis (PortSigDisplay
+sIVOD 1
+)
+portVis (PortSigDisplay
+sIVOD 1
+)
+)
+defaultCptPort (CptPort
+ps "OnEdgeStrategy"
+shape (Triangle
+ro 90
+va (VaSet
+vasetType 1
+fg "0,65535,0"
+)
+xt "0,0,750,750"
+)
+tg (CPTG
+ps "CptPortTextPlaceStrategy"
+stg "VerticalLayoutStrategy"
+f (Text
+va (VaSet
+font "Verdana,12,0"
+)
+xt "0,750,2900,2150"
+st "In0"
+blo "0,1950"
+tm "CptPortNameMgr"
+)
+)
+dt (MLText
+va (VaSet
+font "Courier New,8,0"
+)
+)
+thePort (LogicalPort
+lang 11
+decl (Decl
+n "In0"
+t "unsigned"
+b "(15 DOWNTO 0)"
+o 0
+)
+)
+)
+defaultCptPortBuffer (CptPort
+ps "OnEdgeStrategy"
+shape (Diamond
+va (VaSet
+vasetType 1
+fg "65535,65535,65535"
+bg "0,0,0"
+)
+xt "0,0,750,750"
+)
+tg (CPTG
+ps "CptPortTextPlaceStrategy"
+stg "VerticalLayoutStrategy"
+f (Text
+va (VaSet
+font "Verdana,12,0"
+)
+xt "0,750,5300,2150"
+st "Buffer0"
+blo "0,1950"
+tm "CptPortNameMgr"
+)
+)
+dt (MLText
+va (VaSet
+font "Courier New,8,0"
+)
+)
+thePort (LogicalPort
+lang 11
+m 3
+decl (Decl
+n "Buffer0"
+t "unsigned"
+b "(15 DOWNTO 0)"
+o 0
+)
+)
+)
+DeclarativeBlock *86 (SymDeclBlock
+uid 1,0
+stg "SymDeclLayoutStrategy"
+declLabel (Text
+uid 2,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "42000,0,49400,1200"
+st "Declarations"
+blo "42000,1000"
+)
+portLabel (Text
+uid 3,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "42000,1200,45700,2400"
+st "Ports:"
+blo "42000,2200"
+)
+externalLabel (Text
+uid 4,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "42000,7200,45200,8400"
+st "User:"
+blo "42000,8200"
+)
+internalLabel (Text
+uid 6,0
+va (VaSet
+isHidden 1
+font "Verdana,9,1"
+)
+xt "42000,0,50200,1200"
+st "Internal User:"
+blo "42000,1000"
+)
+externalText (MLText
+uid 5,0
+va (VaSet
+font "Courier New,8,0"
+)
+xt "44000,8400,44000,8400"
+tm "SyDeclarativeTextMgr"
+)
+internalText (MLText
+uid 7,0
+va (VaSet
+isHidden 1
+font "Courier New,8,0"
+)
+xt "42000,0,42000,0"
+tm "SyDeclarativeTextMgr"
+)
+)
+lastUid 398,0
+activeModelName "Symbol:CDM"
+)
diff --git a/Cursor/hds/@position/interface b/Cursor/hds/@position/interface
index 3e3cf29..61e39b1 100644
--- a/Cursor/hds/@position/interface
+++ b/Cursor/hds/@position/interface
@@ -506,7 +506,7 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
 )
 (vvPair
 variable "date"
-value "07.12.2021"
+value "14.12.2021"
 )
 (vvPair
 variable "day"
@@ -518,7 +518,7 @@ value "mardi"
 )
 (vvPair
 variable "dd"
-value "07"
+value "14"
 )
 (vvPair
 variable "entity_name"
@@ -546,7 +546,7 @@ value "remi"
 )
 (vvPair
 variable "graphical_source_date"
-value "07.12.2021"
+value "14.12.2021"
 )
 (vvPair
 variable "graphical_source_group"
@@ -558,7 +558,7 @@ value "MARVIN"
 )
 (vvPair
 variable "graphical_source_time"
-value "08:21:37"
+value "16:00:58"
 )
 (vvPair
 variable "group"
@@ -630,7 +630,7 @@ value "interface"
 )
 (vvPair
 variable "time"
-value "08:21:37"
+value "16:00:58"
 )
 (vvPair
 variable "unit"
@@ -697,8 +697,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,3200,61000,4000"
-st "clock    : IN     std_ulogic  ;
-"
+st "clock    : IN     std_ulogic  ;"
 )
 thePort (LogicalPort
 decl (Decl
@@ -742,8 +741,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,4000,61000,4800"
-st "encoderA : IN     std_uLogic  ;
-"
+st "encoderA : IN     std_uLogic  ;"
 )
 thePort (LogicalPort
 decl (Decl
@@ -787,8 +785,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,4800,61000,5600"
-st "encoderB : IN     std_uLogic  ;
-"
+st "encoderB : IN     std_uLogic  ;"
 )
 thePort (LogicalPort
 decl (Decl
@@ -832,8 +829,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,5600,61000,6400"
-st "encoderI : IN     std_uLogic  ;
-"
+st "encoderI : IN     std_uLogic  ;"
 )
 thePort (LogicalPort
 decl (Decl
@@ -878,8 +874,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,7200,66000,8000"
-st "Position : OUT    unsigned (15 DOWNTO 0)
-"
+st "Position : OUT    unsigned (15 DOWNTO 0)"
 )
 thePort (LogicalPort
 lang 11
@@ -927,8 +922,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,2400,61000,3200"
-st "RaZ      : IN     std_ulogic  ;
-"
+st "RaZ      : IN     std_ulogic  ;"
 )
 thePort (LogicalPort
 lang 11
@@ -973,8 +967,7 @@ va (VaSet
 font "Courier New,8,0"
 )
 xt "44000,6400,61000,7200"
-st "reset    : IN     std_ulogic  ;
-"
+st "reset    : IN     std_ulogic  ;"
 )
 thePort (LogicalPort
 decl (Decl
@@ -1692,6 +1685,6 @@ xt "42000,0,42000,0"
 tm "SyDeclarativeTextMgr"
 )
 )
-lastUid 378,0
+lastUid 539,0
 activeModelName "Symbol:CDM"
 )
diff --git a/Cursor/hds/@position/position.bd b/Cursor/hds/@position/position.bd
index ca4f250..b7a3835 100644
--- a/Cursor/hds/@position/position.bd
+++ b/Cursor/hds/@position/position.bd
@@ -11,9 +11,38 @@ unitName "std_logic_1164"
 library "ieee"
 unitName "numeric_std"
 )
+(DmPackageRef
+library "gates"
+unitName "gates"
+)
+(DmPackageRef
+library "ieee"
+unitName "NUMERIC_SIGNED"
+)
+]
+instances [
+(Instance
+name "U_3"
+duLibraryName "Cursor"
+duName "Encoder"
+elements [
+]
+mwi 0
+uid 530,0
+)
+(Instance
+name "U_4"
+duLibraryName "Cursor"
+duName "Compteur"
+elements [
+]
+mwi 0
+uid 629,0
+)
 ]
 libraryRefs [
 "ieee"
+"gates"
 ]
 )
 version "32.1"
@@ -68,7 +97,7 @@ value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\
 )
 (vvPair
 variable "date"
-value "07.12.2021"
+value "14.12.2021"
 )
 (vvPair
 variable "day"
@@ -80,7 +109,7 @@ value "mardi"
 )
 (vvPair
 variable "dd"
-value "07"
+value "14"
 )
 (vvPair
 variable "entity_name"
@@ -108,7 +137,7 @@ value "remi"
 )
 (vvPair
 variable "graphical_source_date"
-value "07.12.2021"
+value "14.12.2021"
 )
 (vvPair
 variable "graphical_source_group"
@@ -120,7 +149,7 @@ value "MARVIN"
 )
 (vvPair
 variable "graphical_source_time"
-value "08:21:37"
+value "16:00:58"
 )
 (vvPair
 variable "group"
@@ -192,7 +221,7 @@ value "position"
 )
 (vvPair
 variable "time"
-value "08:21:37"
+value "16:00:58"
 )
 (vvPair
 variable "unit"
@@ -236,16 +265,16 @@ optionalChildren [
 uid 11,0
 sl 0
 ro 270
-xt "-2000,7625,-500,8375"
+xt "11000,31625,12500,32375"
 )
 (Line
 uid 12,0
 sl 0
 ro 270
-xt "-500,8000,0,8000"
+xt "12500,32000,13000,32000"
 pts [
-"-500,8000"
-"0,8000"
+"12500,32000"
+"13000,32000"
 ]
 )
 ]
@@ -260,10 +289,10 @@ f (Text
 uid 14,0
 va (VaSet
 )
-xt "-6400,7400,-3000,8600"
+xt "6600,31400,10000,32600"
 st "clock"
 ju 2
-blo "-3000,8400"
+blo "10000,32400"
 tm "WireNameMgr"
 )
 )
@@ -281,9 +310,8 @@ uid 22,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,3200,34500,4000"
-st "clock     : std_ulogic
-"
+xt "22000,3200,34000,4000"
+st "clock    : std_ulogic"
 )
 )
 *3 (PortIoIn
@@ -344,9 +372,8 @@ uid 36,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,4000,34500,4800"
-st "encoderA  : std_uLogic
-"
+xt "22000,4000,34000,4800"
+st "encoderA : std_uLogic"
 )
 )
 *5 (PortIoIn
@@ -407,9 +434,8 @@ uid 50,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,4800,34500,5600"
-st "encoderB  : std_uLogic
-"
+xt "22000,4800,34000,5600"
+st "encoderB : std_uLogic"
 )
 )
 *7 (PortIoIn
@@ -425,16 +451,16 @@ optionalChildren [
 uid 53,0
 sl 0
 ro 270
-xt "-2000,19625,-500,20375"
+xt "-2000,17625,-500,18375"
 )
 (Line
 uid 54,0
 sl 0
 ro 270
-xt "-500,20000,0,20000"
+xt "-500,18000,0,18000"
 pts [
-"-500,20000"
-"0,20000"
+"-500,18000"
+"0,18000"
 ]
 )
 ]
@@ -449,10 +475,10 @@ f (Text
 uid 56,0
 va (VaSet
 )
-xt "-8200,19400,-3000,20600"
+xt "-8200,17400,-3000,18600"
 st "encoderI"
 ju 2
-blo "-3000,20400"
+blo "-3000,18400"
 tm "WireNameMgr"
 )
 )
@@ -470,34 +496,14 @@ uid 64,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,5600,34500,6400"
-st "encoderI  : std_uLogic
-"
+xt "22000,5600,34000,6400"
+st "encoderI : std_uLogic"
 )
 )
-*9 (Net
-uid 77,0
-lang 11
-decl (Decl
-n "sig1reset"
-t "std_ulogic"
-o 8
-suid 5,0
-)
-declText (MLText
-uid 78,0
-va (VaSet
-font "Courier New,8,0"
-)
-xt "22000,9200,38000,10000"
-st "SIGNAL sig1reset : std_ulogic
-"
-)
-)
-*10 (Grouping
+*9 (Grouping
 uid 89,0
 optionalChildren [
-*11 (CommentText
+*10 (CommentText
 uid 91,0
 shape (Rectangle
 uid 92,0
@@ -529,7 +535,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*12 (CommentText
+*11 (CommentText
 uid 94,0
 shape (Rectangle
 uid 95,0
@@ -561,7 +567,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*13 (CommentText
+*12 (CommentText
 uid 97,0
 shape (Rectangle
 uid 98,0
@@ -593,7 +599,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*14 (CommentText
+*13 (CommentText
 uid 100,0
 shape (Rectangle
 uid 101,0
@@ -625,7 +631,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*15 (CommentText
+*14 (CommentText
 uid 103,0
 shape (Rectangle
 uid 104,0
@@ -656,7 +662,7 @@ visibleWidth 20000
 ignorePrefs 1
 titleBlock 1
 )
-*16 (CommentText
+*15 (CommentText
 uid 106,0
 shape (Rectangle
 uid 107,0
@@ -688,7 +694,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*17 (CommentText
+*16 (CommentText
 uid 109,0
 shape (Rectangle
 uid 110,0
@@ -719,7 +725,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*18 (CommentText
+*17 (CommentText
 uid 112,0
 shape (Rectangle
 uid 113,0
@@ -751,7 +757,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*19 (CommentText
+*18 (CommentText
 uid 115,0
 shape (Rectangle
 uid 116,0
@@ -783,7 +789,7 @@ position 1
 ignorePrefs 1
 titleBlock 1
 )
-*20 (CommentText
+*19 (CommentText
 uid 118,0
 shape (Rectangle
 uid 119,0
@@ -828,7 +834,7 @@ xt "23000,44000,64000,49000"
 )
 oxt "14000,66000,55000,71000"
 )
-*21 (PortIoOut
+*20 (PortIoOut
 uid 193,0
 shape (CompositeShape
 uid 194,0
@@ -841,16 +847,16 @@ optionalChildren [
 uid 195,0
 sl 0
 ro 270
-xt "58500,1625,60000,2375"
+xt "53500,21625,55000,22375"
 )
 (Line
 uid 196,0
 sl 0
 ro 270
-xt "58000,2000,58500,2000"
+xt "53000,22000,53500,22000"
 pts [
-"58000,2000"
-"58500,2000"
+"53000,22000"
+"53500,22000"
 ]
 )
 ]
@@ -865,14 +871,14 @@ f (Text
 uid 198,0
 va (VaSet
 )
-xt "61000,1500,65800,2700"
+xt "56000,21500,60800,22700"
 st "Position"
-blo "61000,2500"
+blo "56000,22500"
 tm "WireNameMgr"
 )
 )
 )
-*22 (Net
+*21 (Net
 uid 205,0
 lang 11
 decl (Decl
@@ -887,12 +893,11 @@ uid 206,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,7200,40000,8000"
-st "Position  : unsigned(15 DOWNTO 0)
-"
+xt "22000,7200,39500,8000"
+st "Position : unsigned(15 DOWNTO 0)"
 )
 )
-*23 (PortIoIn
+*22 (PortIoIn
 uid 207,0
 shape (CompositeShape
 uid 208,0
@@ -905,16 +910,16 @@ optionalChildren [
 uid 209,0
 sl 0
 ro 270
-xt "-2000,25625,-500,26375"
+xt "11000,28625,12500,29375"
 )
 (Line
 uid 210,0
 sl 0
 ro 270
-xt "-500,26000,0,26000"
+xt "12500,29000,13000,29000"
 pts [
-"-500,26000"
-"0,26000"
+"12500,29000"
+"13000,29000"
 ]
 )
 ]
@@ -929,15 +934,15 @@ f (Text
 uid 212,0
 va (VaSet
 )
-xt "-5700,25500,-3000,26700"
+xt "7300,28500,10000,29700"
 st "RaZ"
 ju 2
-blo "-3000,26500"
+blo "10000,29500"
 tm "WireNameMgr"
 )
 )
 )
-*24 (Net
+*23 (Net
 uid 219,0
 lang 11
 decl (Decl
@@ -951,12 +956,11 @@ uid 220,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,2400,34500,3200"
-st "RaZ       : std_ulogic
-"
+xt "22000,2400,34000,3200"
+st "RaZ      : std_ulogic"
 )
 )
-*25 (PortIoIn
+*24 (PortIoIn
 uid 223,0
 shape (CompositeShape
 uid 224,0
@@ -969,16 +973,16 @@ optionalChildren [
 uid 225,0
 sl 0
 ro 270
-xt "-2000,27625,-500,28375"
+xt "11000,33625,12500,34375"
 )
 (Line
 uid 226,0
 sl 0
 ro 270
-xt "-500,28000,0,28000"
+xt "12500,34000,13000,34000"
 pts [
-"-500,28000"
-"0,28000"
+"12500,34000"
+"13000,34000"
 ]
 )
 ]
@@ -993,15 +997,15 @@ f (Text
 uid 228,0
 va (VaSet
 )
-xt "-6300,27500,-3000,28700"
+xt "6700,33500,10000,34700"
 st "reset"
 ju 2
-blo "-3000,28500"
+blo "10000,34500"
 tm "WireNameMgr"
 )
 )
 )
-*26 (Net
+*25 (Net
 uid 235,0
 decl (Decl
 n "reset"
@@ -1014,27 +1018,223 @@ uid 236,0
 va (VaSet
 font "Courier New,8,0"
 )
-xt "22000,6400,34500,7200"
-st "reset     : std_ulogic
-"
+xt "22000,6400,34000,7200"
+st "reset    : std_ulogic"
 )
 )
-*27 (Wire
+*26 (Blk
+uid 530,0
+shape (Rectangle
+uid 531,0
+va (VaSet
+vasetType 1
+fg "39936,56832,65280"
+lineColor "0,0,32768"
+lineWidth 2
+)
+xt "14000,10000,22000,26000"
+)
+oxt "0,0,8000,10000"
+ttg (MlTextGroup
+uid 532,0
+ps "CenterOffsetStrategy"
+stg "VerticalLayoutStrategy"
+textVec [
+*27 (Text
+uid 533,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "15600,13200,19300,14400"
+st "Cursor"
+blo "15600,14200"
+tm "BdLibraryNameMgr"
+)
+*28 (Text
+uid 534,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "15600,14400,20100,15600"
+st "Encoder"
+blo "15600,15400"
+tm "BlkNameMgr"
+)
+*29 (Text
+uid 535,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "15600,15600,18100,16800"
+st "U_3"
+blo "15600,16600"
+tm "InstanceNameMgr"
+)
+]
+)
+ga (GenericAssociation
+uid 536,0
+ps "EdgeToEdgeStrategy"
+matrix (Matrix
+uid 537,0
+text (MLText
+uid 538,0
+va (VaSet
+font "Courier New,8,0"
+)
+xt "15600,23200,15600,23200"
+)
+header ""
+)
+elements [
+]
+)
+viewicon (ZoomableIcon
+uid 539,0
+sl 0
+va (VaSet
+vasetType 1
+fg "49152,49152,49152"
+)
+xt "14250,24250,15750,25750"
+iconName "StateMachineViewIcon.png"
+iconMaskName "StateMachineViewIcon.msk"
+ftype 3
+)
+viewiconposition 0
+)
+*30 (Net
+uid 540,0
+decl (Decl
+n "up"
+t "std_uLogic"
+o 8
+suid 11,0
+)
+declText (MLText
+uid 541,0
+va (VaSet
+font "Courier New,8,0"
+)
+xt "22000,10000,37500,10800"
+st "SIGNAL up       : std_uLogic"
+)
+)
+*31 (Net
+uid 548,0
+decl (Decl
+n "down"
+t "std_uLogic"
+o 9
+suid 12,0
+)
+declText (MLText
+uid 549,0
+va (VaSet
+font "Courier New,8,0"
+)
+xt "22000,9200,37500,10000"
+st "SIGNAL down     : std_uLogic"
+)
+)
+*32 (Blk
+uid 629,0
+shape (Rectangle
+uid 630,0
+va (VaSet
+vasetType 1
+fg "39936,56832,65280"
+lineColor "0,0,32768"
+lineWidth 2
+)
+xt "32000,10000,48000,37000"
+)
+oxt "0,0,8000,10000"
+ttg (MlTextGroup
+uid 631,0
+ps "CenterOffsetStrategy"
+stg "VerticalLayoutStrategy"
+textVec [
+*33 (Text
+uid 632,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "33600,13200,37300,14400"
+st "Cursor"
+blo "33600,14200"
+tm "BdLibraryNameMgr"
+)
+*34 (Text
+uid 633,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "33600,14400,39000,15600"
+st "Compteur"
+blo "33600,15400"
+tm "BlkNameMgr"
+)
+*35 (Text
+uid 634,0
+va (VaSet
+font "Verdana,9,1"
+)
+xt "33600,15600,36100,16800"
+st "U_4"
+blo "33600,16600"
+tm "InstanceNameMgr"
+)
+]
+)
+ga (GenericAssociation
+uid 635,0
+ps "EdgeToEdgeStrategy"
+matrix (Matrix
+uid 636,0
+text (MLText
+uid 637,0
+va (VaSet
+font "Courier New,8,0"
+)
+xt "33600,23200,33600,23200"
+)
+header ""
+)
+elements [
+]
+)
+viewicon (ZoomableIcon
+uid 638,0
+sl 0
+va (VaSet
+vasetType 1
+fg "49152,49152,49152"
+)
+xt "32250,35250,33750,36750"
+iconName "BlockDiagram.png"
+iconMaskName "BlockDiagram.msk"
+ftype 1
+)
+viewiconposition 0
+)
+*36 (Wire
 uid 15,0
 shape (OrthoPolyLine
 uid 16,0
 va (VaSet
 vasetType 3
 )
-xt "0,8000,10000,8000"
+xt "13000,32000,32000,32000"
 pts [
-"0,8000"
-"10000,8000"
+"13000,32000"
+"32000,32000"
 ]
 )
 start &1
+end &32
 sat 32
-eat 16
+eat 1
 st 0
 sf 1
 si 0
@@ -1047,30 +1247,31 @@ uid 20,0
 va (VaSet
 isHidden 1
 )
-xt "2000,6800,5400,8000"
+xt "15000,30800,18400,32000"
 st "clock"
-blo "2000,7800"
+blo "15000,31800"
 tm "WireNameMgr"
 )
 )
 on &2
 )
-*28 (Wire
+*37 (Wire
 uid 29,0
 shape (OrthoPolyLine
 uid 30,0
 va (VaSet
 vasetType 3
 )
-xt "0,12000,10000,12000"
+xt "0,12000,14000,12000"
 pts [
 "0,12000"
-"10000,12000"
+"14000,12000"
 ]
 )
 start &3
+end &26
 sat 32
-eat 16
+eat 1
 st 0
 sf 1
 si 0
@@ -1091,22 +1292,23 @@ tm "WireNameMgr"
 )
 on &4
 )
-*29 (Wire
+*38 (Wire
 uid 43,0
 shape (OrthoPolyLine
 uid 44,0
 va (VaSet
 vasetType 3
 )
-xt "0,16000,10000,16000"
+xt "0,16000,14000,16000"
 pts [
 "0,16000"
-"10000,16000"
+"14000,16000"
 ]
 )
 start &5
+end &26
 sat 32
-eat 16
+eat 1
 st 0
 sf 1
 si 0
@@ -1127,17 +1329,17 @@ tm "WireNameMgr"
 )
 on &6
 )
-*30 (Wire
+*39 (Wire
 uid 57,0
 shape (OrthoPolyLine
 uid 58,0
 va (VaSet
 vasetType 3
 )
-xt "0,20000,10000,20000"
+xt "0,18000,10000,18000"
 pts [
-"0,20000"
-"10000,20000"
+"0,18000"
+"10000,18000"
 ]
 )
 start &7
@@ -1155,50 +1357,15 @@ uid 62,0
 va (VaSet
 isHidden 1
 )
-xt "2000,18800,7200,20000"
+xt "2000,16800,7200,18000"
 st "encoderI"
-blo "2000,19800"
+blo "2000,17800"
 tm "WireNameMgr"
 )
 )
 on &8
 )
-*31 (Wire
-uid 71,0
-shape (OrthoPolyLine
-uid 72,0
-va (VaSet
-vasetType 3
-)
-xt "0,24000,10000,24000"
-pts [
-"0,24000"
-"10000,24000"
-]
-)
-sat 16
-eat 16
-st 0
-sf 1
-si 0
-tg (WTG
-uid 75,0
-ps "ConnStartEndStrategy"
-stg "STSignalDisplayStrategy"
-f (Text
-uid 76,0
-va (VaSet
-isHidden 1
-)
-xt "2000,22800,7500,24000"
-st "sig1reset"
-blo "2000,23800"
-tm "WireNameMgr"
-)
-)
-on &9
-)
-*32 (Wire
+*40 (Wire
 uid 199,0
 shape (OrthoPolyLine
 uid 200,0
@@ -1206,14 +1373,15 @@ va (VaSet
 vasetType 3
 lineWidth 2
 )
-xt "48000,2000,58000,2000"
+xt "48000,22000,53000,22000"
 pts [
-"48000,2000"
-"58000,2000"
+"48000,22000"
+"53000,22000"
 ]
 )
-end &21
-sat 16
+start &32
+end &20
+sat 2
 eat 32
 sty 1
 st 0
@@ -1228,30 +1396,31 @@ uid 204,0
 va (VaSet
 isHidden 1
 )
-xt "50000,800,59800,2000"
+xt "45000,20800,54800,22000"
 st "Position : (15:0)"
-blo "50000,1800"
+blo "45000,21800"
 tm "WireNameMgr"
 )
 )
-on &22
+on &21
 )
-*33 (Wire
+*41 (Wire
 uid 213,0
 shape (OrthoPolyLine
 uid 214,0
 va (VaSet
 vasetType 3
 )
-xt "0,26000,10000,26000"
+xt "13000,29000,32000,29000"
 pts [
-"0,26000"
-"10000,26000"
+"13000,29000"
+"32000,29000"
 ]
 )
-start &23
+start &22
+end &32
 sat 32
-eat 16
+eat 1
 st 0
 sf 1
 si 0
@@ -1264,30 +1433,31 @@ uid 218,0
 va (VaSet
 isHidden 1
 )
-xt "2000,24800,4700,26000"
+xt "15000,27800,17700,29000"
 st "RaZ"
-blo "2000,25800"
+blo "15000,28800"
 tm "WireNameMgr"
 )
 )
-on &24
+on &23
 )
-*34 (Wire
+*42 (Wire
 uid 229,0
 shape (OrthoPolyLine
 uid 230,0
 va (VaSet
 vasetType 3
 )
-xt "0,28000,10000,28000"
+xt "13000,34000,32000,34000"
 pts [
-"0,28000"
-"10000,28000"
+"13000,34000"
+"32000,34000"
 ]
 )
-start &25
+start &24
+end &32
 sat 32
-eat 16
+eat 1
 st 0
 sf 1
 si 0
@@ -1300,13 +1470,155 @@ uid 234,0
 va (VaSet
 isHidden 1
 )
-xt "2000,26800,5300,28000"
+xt "15000,32800,18300,34000"
 st "reset"
-blo "2000,27800"
+blo "15000,33800"
 tm "WireNameMgr"
 )
 )
-on &26
+on &25
+)
+*43 (Wire
+uid 542,0
+shape (OrthoPolyLine
+uid 543,0
+va (VaSet
+vasetType 3
+)
+xt "22000,15000,32000,15000"
+pts [
+"32000,15000"
+"22000,15000"
+]
+)
+start &32
+end &26
+sat 1
+eat 2
+stc 0
+sf 1
+si 0
+tg (WTG
+uid 546,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 547,0
+va (VaSet
+)
+xt "29250,13800,31150,15000"
+st "up"
+blo "29250,14800"
+tm "WireNameMgr"
+)
+)
+on &30
+)
+*44 (Wire
+uid 550,0
+shape (OrthoPolyLine
+uid 551,0
+va (VaSet
+vasetType 3
+)
+xt "22000,17000,32000,17000"
+pts [
+"32000,17000"
+"22000,17000"
+]
+)
+start &32
+end &26
+sat 1
+eat 2
+stc 0
+sf 1
+si 0
+tg (WTG
+uid 554,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 555,0
+va (VaSet
+)
+xt "28250,15800,31450,17000"
+st "down"
+blo "28250,16800"
+tm "WireNameMgr"
+)
+)
+on &31
+)
+*45 (Wire
+uid 556,0
+shape (OrthoPolyLine
+uid 557,0
+va (VaSet
+vasetType 3
+)
+xt "9000,21000,14000,21000"
+pts [
+"14000,21000"
+"9000,21000"
+]
+)
+start &26
+sat 1
+eat 16
+stc 0
+sf 1
+si 0
+tg (WTG
+uid 562,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 563,0
+va (VaSet
+)
+xt "9250,19800,12650,21000"
+st "clock"
+blo "9250,20800"
+tm "WireNameMgr"
+)
+)
+on &2
+)
+*46 (Wire
+uid 564,0
+shape (OrthoPolyLine
+uid 565,0
+va (VaSet
+vasetType 3
+)
+xt "9000,23000,14000,23000"
+pts [
+"14000,23000"
+"9000,23000"
+]
+)
+start &26
+sat 1
+eat 16
+stc 0
+sf 1
+si 0
+tg (WTG
+uid 570,0
+ps "ConnStartEndStrategy"
+stg "STSignalDisplayStrategy"
+f (Text
+uid 571,0
+va (VaSet
+)
+xt "9250,21800,12550,23000"
+st "reset"
+blo "9250,22800"
+tm "WireNameMgr"
+)
+)
+on &25
 )
 ]
 bg "65535,65535,65535"
@@ -1320,11 +1632,11 @@ xShown 1
 yShown 1
 color "26368,26368,26368"
 )
-packageList *35 (PackageList
+packageList *47 (PackageList
 uid 121,0
 stg "VerticalLayoutStrategy"
 textVec [
-*36 (Text
+*48 (Text
 uid 122,0
 va (VaSet
 font "Verdana,9,1"
@@ -1333,14 +1645,17 @@ xt "0,0,7600,1200"
 st "Package List"
 blo "0,1000"
 )
-*37 (MLText
+*49 (MLText
 uid 123,0
 va (VaSet
 )
-xt "0,1200,17500,4800"
+xt "0,1200,19000,8400"
 st "LIBRARY ieee;
   USE ieee.std_logic_1164.all;
-  USE ieee.numeric_std.all;"
+  USE ieee.numeric_std.all;
+LIBRARY gates;
+USE gates.gates.all;
+USE ieee.NUMERIC_SIGNED.all;"
 tm "PackageList"
 )
 ]
@@ -1349,7 +1664,7 @@ compDirBlock (MlTextGroup
 uid 124,0
 stg "VerticalLayoutStrategy"
 textVec [
-*38 (Text
+*50 (Text
 uid 125,0
 va (VaSet
 isHidden 1
@@ -1359,7 +1674,7 @@ xt "20000,0,30800,1200"
 st "Compiler Directives"
 blo "20000,1000"
 )
-*39 (Text
+*51 (Text
 uid 126,0
 va (VaSet
 isHidden 1
@@ -1369,7 +1684,7 @@ xt "20000,1200,33100,2400"
 st "Pre-module directives:"
 blo "20000,2200"
 )
-*40 (MLText
+*52 (MLText
 uid 127,0
 va (VaSet
 isHidden 1
@@ -1379,7 +1694,7 @@ st "`resetall
 `timescale 1ns/10ps"
 tm "BdCompilerDirectivesTextMgr"
 )
-*41 (Text
+*53 (Text
 uid 128,0
 va (VaSet
 isHidden 1
@@ -1389,7 +1704,7 @@ xt "20000,4800,33700,6000"
 st "Post-module directives:"
 blo "20000,5800"
 )
-*42 (MLText
+*54 (MLText
 uid 129,0
 va (VaSet
 isHidden 1
@@ -1397,7 +1712,7 @@ isHidden 1
 xt "20000,0,20000,0"
 tm "BdCompilerDirectivesTextMgr"
 )
-*43 (Text
+*55 (Text
 uid 130,0
 va (VaSet
 isHidden 1
@@ -1407,7 +1722,7 @@ xt "20000,6000,33200,7200"
 st "End-module directives:"
 blo "20000,7000"
 )
-*44 (MLText
+*56 (MLText
 uid 131,0
 va (VaSet
 isHidden 1
@@ -1418,12 +1733,12 @@ tm "BdCompilerDirectivesTextMgr"
 ]
 associable 1
 )
-windowSize "0,0,1016,690"
-viewArea "-8500,0,63996,49312"
-cachedDiagramExtent "-8500,0,65800,49000"
+windowSize "5,0,1542,920"
+viewArea "-23700,-7198,73166,51410"
+cachedDiagramExtent "-8500,0,64000,49000"
 hasePageBreakOrigin 1
-pageBreakOrigin "-9000,0"
-lastUid 236,0
+pageBreakOrigin "-82000,0"
+lastUid 642,0
 defaultCommentText (CommentText
 shape (Rectangle
 layer 0
@@ -1513,7 +1828,7 @@ ttg (MlTextGroup
 ps "CenterOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*45 (Text
+*57 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1522,7 +1837,7 @@ st "<library>"
 blo "1300,4200"
 tm "BdLibraryNameMgr"
 )
-*46 (Text
+*58 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1531,7 +1846,7 @@ st "<block>"
 blo "1300,5400"
 tm "BlkNameMgr"
 )
-*47 (Text
+*59 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1582,7 +1897,7 @@ ttg (MlTextGroup
 ps "CenterOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*48 (Text
+*60 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1590,7 +1905,7 @@ xt "-350,3200,3750,4400"
 st "Library"
 blo "-350,4200"
 )
-*49 (Text
+*61 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1598,7 +1913,7 @@ xt "-350,4400,8350,5600"
 st "MWComponent"
 blo "-350,5400"
 )
-*50 (Text
+*62 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1647,7 +1962,7 @@ ttg (MlTextGroup
 ps "CenterOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*51 (Text
+*63 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1656,7 +1971,7 @@ st "Library"
 blo "0,4200"
 tm "BdLibraryNameMgr"
 )
-*52 (Text
+*64 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1665,7 +1980,7 @@ st "SaComponent"
 blo "0,5400"
 tm "CptNameMgr"
 )
-*53 (Text
+*65 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1719,7 +2034,7 @@ ttg (MlTextGroup
 ps "CenterOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*54 (Text
+*66 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1727,7 +2042,7 @@ xt "-500,3200,3600,4400"
 st "Library"
 blo "-500,4200"
 )
-*55 (Text
+*67 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1735,7 +2050,7 @@ xt "-500,4400,8500,5600"
 st "VhdlComponent"
 blo "-500,5400"
 )
-*56 (Text
+*68 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1780,7 +2095,7 @@ ttg (MlTextGroup
 ps "CenterOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*57 (Text
+*69 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1788,7 +2103,7 @@ xt "-1150,3200,2950,4400"
 st "Library"
 blo "-1150,4200"
 )
-*58 (Text
+*70 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1796,7 +2111,7 @@ xt "-1150,4400,9150,5600"
 st "VerilogComponent"
 blo "-1150,5400"
 )
-*59 (Text
+*71 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1837,7 +2152,7 @@ ttg (MlTextGroup
 ps "CenterOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*60 (Text
+*72 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -1846,7 +2161,7 @@ st "eb1"
 blo "2800,4800"
 tm "HdlTextNameMgr"
 )
-*61 (Text
+*73 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -2249,7 +2564,7 @@ decls (MlTextGroup
 ps "BottomRightOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*62 (Text
+*74 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -2257,7 +2572,7 @@ xt "11200,20000,22000,21200"
 st "Frame Declarations"
 blo "11200,21000"
 )
-*63 (MLText
+*75 (MLText
 va (VaSet
 )
 xt "11200,21200,11200,21200"
@@ -2309,7 +2624,7 @@ decls (MlTextGroup
 ps "BottomRightOffsetStrategy"
 stg "VerticalLayoutStrategy"
 textVec [
-*64 (Text
+*76 (Text
 va (VaSet
 font "Verdana,9,1"
 )
@@ -2317,7 +2632,7 @@ xt "11200,20000,22000,21200"
 st "Frame Declarations"
 blo "11200,21000"
 )
-*65 (MLText
+*77 (MLText
 va (VaSet
 )
 xt "11200,21200,11200,21200"
@@ -2463,46 +2778,46 @@ tm "BdDeclarativeTextMgr"
 )
 commonDM (CommonDM
 ldm (LogicalDM
-suid 8,0
+suid 12,0
 usingSuid 1
-emptyRow *66 (LEmptyRow
+emptyRow *78 (LEmptyRow
 )
 uid 134,0
 optionalChildren [
-*67 (RefLabelRowHdr
+*79 (RefLabelRowHdr
 )
-*68 (TitleRowHdr
+*80 (TitleRowHdr
 )
-*69 (FilterRowHdr
+*81 (FilterRowHdr
 )
-*70 (RefLabelColHdr
+*82 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
-*71 (RowExpandColHdr
+*83 (RowExpandColHdr
 tm "RowExpandColHdrMgr"
 )
-*72 (GroupColHdr
+*84 (GroupColHdr
 tm "GroupColHdrMgr"
 )
-*73 (NameColHdr
+*85 (NameColHdr
 tm "BlockDiagramNameColHdrMgr"
 )
-*74 (ModeColHdr
+*86 (ModeColHdr
 tm "BlockDiagramModeColHdrMgr"
 )
-*75 (TypeColHdr
+*87 (TypeColHdr
 tm "BlockDiagramTypeColHdrMgr"
 )
-*76 (BoundsColHdr
+*88 (BoundsColHdr
 tm "BlockDiagramBoundsColHdrMgr"
 )
-*77 (InitColHdr
+*89 (InitColHdr
 tm "BlockDiagramInitColHdrMgr"
 )
-*78 (EolColHdr
+*90 (EolColHdr
 tm "BlockDiagramEolColHdrMgr"
 )
-*79 (LeafLogPort
+*91 (LeafLogPort
 port (LogicalPort
 decl (Decl
 n "encoderA"
@@ -2513,7 +2828,7 @@ suid 2,0
 )
 uid 79,0
 )
-*80 (LeafLogPort
+*92 (LeafLogPort
 port (LogicalPort
 decl (Decl
 n "encoderB"
@@ -2524,7 +2839,7 @@ suid 3,0
 )
 uid 81,0
 )
-*81 (LeafLogPort
+*93 (LeafLogPort
 port (LogicalPort
 decl (Decl
 n "encoderI"
@@ -2535,7 +2850,7 @@ suid 4,0
 )
 uid 83,0
 )
-*82 (LeafLogPort
+*94 (LeafLogPort
 port (LogicalPort
 decl (Decl
 n "clock"
@@ -2546,20 +2861,7 @@ suid 1,0
 )
 uid 85,0
 )
-*83 (LeafLogPort
-port (LogicalPort
-lang 11
-m 4
-decl (Decl
-n "sig1reset"
-t "std_ulogic"
-o 8
-suid 5,0
-)
-)
-uid 87,0
-)
-*84 (LeafLogPort
+*95 (LeafLogPort
 port (LogicalPort
 lang 11
 m 1
@@ -2573,7 +2875,7 @@ suid 6,0
 )
 uid 190,0
 )
-*85 (LeafLogPort
+*96 (LeafLogPort
 port (LogicalPort
 lang 11
 decl (Decl
@@ -2585,17 +2887,41 @@ suid 7,0
 )
 uid 192,0
 )
-*86 (LeafLogPort
+*97 (LeafLogPort
 port (LogicalPort
 decl (Decl
 n "reset"
 t "std_ulogic"
-o 6
+o 8
 suid 8,0
 )
 )
 uid 222,0
 )
+*98 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "up"
+t "std_uLogic"
+o 8
+suid 11,0
+)
+)
+uid 572,0
+)
+*99 (LeafLogPort
+port (LogicalPort
+m 4
+decl (Decl
+n "down"
+t "std_uLogic"
+o 9
+suid 12,0
+)
+)
+uid 574,0
+)
 ]
 )
 pdm (PhysicalDM
@@ -2603,7 +2929,7 @@ displayShortBounds 1
 editShortBounds 1
 uid 147,0
 optionalChildren [
-*87 (Sheet
+*100 (Sheet
 sheetRow (SheetRow
 headerVa (MVa
 cellColor "49152,49152,49152"
@@ -2620,80 +2946,86 @@ cellColor "39936,56832,65280"
 fontColor "0,0,0"
 font "Tahoma,10,0"
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 dimension 23
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 pos 2
 hidden 1
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 pos 1
 dimension 20
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 pos 3
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-dimension 20
-uid 88,0
-)
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 dimension 20
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 pos 5
 dimension 20
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 pos 6
 dimension 20
 uid 221,0
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+dimension 20
+uid 573,0
+)
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+pos 8
+dimension 20
+uid 575,0
+)
 ]
 )
 sheetCol (SheetCol
@@ -2705,50 +3037,50 @@ textAngle 90
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 uid 153,0
 optionalChildren [
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 pos 0
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 )
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 dimension 100
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 dimension 50
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 )
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 pos 7
 dimension 80
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 genericsCommonDM (CommonDM
 ldm (LogicalDM
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 uid 163,0
 optionalChildren [
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 )
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 )
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+*126 (RefLabelColHdr
 tm "RefLabelColHdrMgr"
 )
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 tm "RowExpandColHdrMgr"
 )
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+*128 (GroupColHdr
 tm "GroupColHdrMgr"
 )
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 tm "GenericNameColHdrMgr"
 )
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+*130 (TypeColHdr
 tm "GenericTypeColHdrMgr"
 )
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+*131 (InitColHdr
 tm "GenericValueColHdrMgr"
 )
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+*132 (PragmaColHdr
 tm "GenericPragmaColHdrMgr"
 )
-*119 (EolColHdr
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 tm "GenericEolColHdrMgr"
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@@ -2809,7 +3141,7 @@ displayShortBounds 1
 editShortBounds 1
 uid 175,0
 optionalChildren [
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 sheetRow (SheetRow
 headerVa (MVa
 cellColor "49152,49152,49152"
@@ -2826,27 +3158,27 @@ cellColor "39936,56832,65280"
 fontColor "0,0,0"
 font "Tahoma,10,0"
 )
-emptyMRCItem *121 (MRCItem
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 )
 uid 177,0
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 pos 1
 dimension 23
 uid 179,0
 )
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 pos 2
 hidden 1
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 uid 181,0
 optionalChildren [
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 pos 0
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 dimension 100
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 dimension 50
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 pos 5
 dimension 50
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 )
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 pos 6
 dimension 80
 uid 188,0
diff --git a/Cursor/hds/_compteur._epf b/Cursor/hds/_compteur._epf
new file mode 100644
index 0000000..029b6c7
--- /dev/null
+++ b/Cursor/hds/_compteur._epf
@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom compteurt
+DEFAULT_FILE atom @compteur/compteurt.bd
diff --git a/Cursor/hds/_compteurupdownrsyncall._epf b/Cursor/hds/_compteurupdownrsyncall._epf
new file mode 100644
index 0000000..fc18b00
--- /dev/null
+++ b/Cursor/hds/_compteurupdownrsyncall._epf
@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom struct
+DEFAULT_FILE atom compteur@up@down@rsync@all/struct.bd
diff --git a/Cursor/hds/_convertissor_position._epf b/Cursor/hds/_convertissor_position._epf
new file mode 100644
index 0000000..578877b
--- /dev/null
+++ b/Cursor/hds/_convertissor_position._epf
@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom fsm
+DEFAULT_FILE atom convertissor_position/fsm.sm
diff --git a/Cursor/hds/_cpt1bit._epf b/Cursor/hds/_cpt1bit._epf
new file mode 100644
index 0000000..9f6cde7
--- /dev/null
+++ b/Cursor/hds/_cpt1bit._epf
@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom struct
+DEFAULT_FILE atom cpt1bit/struct.bd
diff --git a/Cursor/hds/_cpt4bit._epf b/Cursor/hds/_cpt4bit._epf
new file mode 100644
index 0000000..59e8d18
--- /dev/null
+++ b/Cursor/hds/_cpt4bit._epf
@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom struct
+DEFAULT_FILE atom cpt4bit/struct.bd
diff --git a/Cursor/hds/_encoder._epf b/Cursor/hds/_encoder._epf
new file mode 100644
index 0000000..ba06e1b
--- /dev/null
+++ b/Cursor/hds/_encoder._epf
@@ -0,0 +1,2 @@
+DEFAULT_ARCHITECTURE atom encoder
+DEFAULT_FILE atom @encoder/encoder.sm
diff --git a/Cursor/hds/compteur@up@down@rsync@all/interface b/Cursor/hds/compteur@up@down@rsync@all/interface
new file mode 100644
index 0000000..020a1d0
--- /dev/null
+++ b/Cursor/hds/compteur@up@down@rsync@all/interface
@@ -0,0 +1,1654 @@
+DocumentHdrVersion "1.1"
+Header (DocumentHdr
+version 2
+dialect 11
+dmPackageRefs [
+(DmPackageRef
+library "ieee"
+unitName "std_logic_1164"
+)
+(DmPackageRef
+library "ieee"
+unitName "numeric_std"
+)
+(DmPackageRef
+library "gates"
+unitName "gates"
+)
+(DmPackageRef
+library "ieee"
+unitName "NUMERIC_SIGNED"
+)
+]
+libraryRefs [
+"ieee"
+"gates"
+]
+)
+version "27.1"
+appVersion "2019.2 (Build 5)"
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+ldm (LogicalDM
+suid 24,0
+usingSuid 1
+emptyRow *1 (LEmptyRow
+)
+uid 95,0
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+)
+*3 (TitleRowHdr
+)
+*4 (FilterRowHdr
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+)
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+)
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+tm "GroupColHdrMgr"
+)
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+)
+*9 (ModeColHdr
+tm "ModeColHdrMgr"
+)
+*10 (TypeColHdr
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+)
+*11 (BoundsColHdr
+tm "BoundsColHdrMgr"
+)
+*12 (InitColHdr
+tm "InitColHdrMgr"
+)
+*13 (EolColHdr
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+)
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+port (LogicalPort
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+)
+)
+uid 379,0
+)
+*15 (LogPort
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+o 7
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+)
+)
+uid 381,0
+)
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+m 1
+decl (Decl
+n "position20bit"
+t "integer"
+b "(19 DOWNTO 0)"
+o 10
+suid 21,0
+)
+)
+uid 383,0
+)
+*17 (LogPort
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+)
+)
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+)
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+)
+)
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+)
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+)
+)
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+)
+]
+)
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+)
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+)
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+)
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+)
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+)
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+fixedCol 3
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+vaOverrides [
+]
+)
+]
+)
+uid 123,0
+type 1
+)
+VExpander (VariableExpander
+vvMap [
+(vvPair
+variable "HDLDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
+)
+(vvPair
+variable "HDSDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
+)
+(vvPair
+variable "SideDataDesignDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\compteur@up@down@rsync@all\\interface.info"
+)
+(vvPair
+variable "SideDataUserDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\compteur@up@down@rsync@all\\interface.user"
+)
+(vvPair
+variable "SourceDir"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
+)
+(vvPair
+variable "appl"
+value "HDL Designer"
+)
+(vvPair
+variable "arch_name"
+value "interface"
+)
+(vvPair
+variable "concat_file"
+value "concatenated"
+)
+(vvPair
+variable "config"
+value "%(unit)_%(view)_config"
+)
+(vvPair
+variable "d"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\compteur@up@down@rsync@all"
+)
+(vvPair
+variable "d_logical"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\compteurUpDownRsyncAll"
+)
+(vvPair
+variable "date"
+value "14.12.2021"
+)
+(vvPair
+variable "day"
+value "mar."
+)
+(vvPair
+variable "day_long"
+value "mardi"
+)
+(vvPair
+variable "dd"
+value "14"
+)
+(vvPair
+variable "entity_name"
+value "compteurUpDownRsyncAll"
+)
+(vvPair
+variable "ext"
+value "<TBD>"
+)
+(vvPair
+variable "f"
+value "interface"
+)
+(vvPair
+variable "f_logical"
+value "interface"
+)
+(vvPair
+variable "f_noext"
+value "interface"
+)
+(vvPair
+variable "graphical_source_author"
+value "remi"
+)
+(vvPair
+variable "graphical_source_date"
+value "14.12.2021"
+)
+(vvPair
+variable "graphical_source_group"
+value "UNKNOWN"
+)
+(vvPair
+variable "graphical_source_host"
+value "MARVIN"
+)
+(vvPair
+variable "graphical_source_time"
+value "14:51:42"
+)
+(vvPair
+variable "group"
+value "UNKNOWN"
+)
+(vvPair
+variable "host"
+value "MARVIN"
+)
+(vvPair
+variable "language"
+value "VHDL"
+)
+(vvPair
+variable "library"
+value "Cursor"
+)
+(vvPair
+variable "library_downstream_ModelSimCompiler"
+value "$SCRATCH_DIR/Cursor/work"
+)
+(vvPair
+variable "mm"
+value "12"
+)
+(vvPair
+variable "module_name"
+value "compteurUpDownRsyncAll"
+)
+(vvPair
+variable "month"
+value "déc."
+)
+(vvPair
+variable "month_long"
+value "décembre"
+)
+(vvPair
+variable "p"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\compteur@up@down@rsync@all\\interface"
+)
+(vvPair
+variable "p_logical"
+value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\compteurUpDownRsyncAll\\interface"
+)
+(vvPair
+variable "package_name"
+value "<Undefined Variable>"
+)
+(vvPair
+variable "project_name"
+value "hds"
+)
+(vvPair
+variable "series"
+value "HDL Designer Series"
+)
+(vvPair
+variable "this_ext"
+value "<TBD>"
+)
+(vvPair
+variable "this_file"
+value "interface"
+)
+(vvPair
+variable "this_file_logical"
+value "interface"
+)
+(vvPair
+variable "time"
+value "14:51:42"
+)
+(vvPair
+variable "unit"
+value "compteurUpDownRsyncAll"
+)
+(vvPair
+variable "user"
+value "remi"
+)
+(vvPair
+variable "version"
+value "2019.2 (Build 5)"
+)
+(vvPair
+variable "view"
+value "interface"
+)
+(vvPair
+variable "year"
+value "2021"
+)
+(vvPair
+variable "yy"
+value "21"
+)
+]
+)
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+optionalChildren [
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+uid 349,0
+ps "OnEdgeStrategy"
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+ro 90
+va (VaSet
+vasetType 1
+fg "0,65535,0"
+)
+xt "14250,23625,15000,24375"
+)
+tg (CPTG
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diff --git a/Cursor/hds/compteur@up@down@rsync@all/struct.bd b/Cursor/hds/compteur@up@down@rsync@all/struct.bd
new file mode 100644
index 0000000..d3a0ff8
--- /dev/null
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+)
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+"23000,17000"
+"26250,17000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,19000"
+"26250,19000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"22000,29000"
+"26250,29000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"34000,15250"
+"34000,13000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"34000,35250"
+"34000,33750"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,37000"
+"26250,37000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"22000,50000"
+"26250,50000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,39000"
+"26250,39000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"22000,49000"
+"26250,49000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"34000,55250"
+"34000,53750"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"22000,70000"
+"26250,70000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,57000"
+"26250,57000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,59000"
+"26250,59000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"22000,69000"
+"26250,69000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+pts [
+"34000,75250"
+"34000,73750"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"22000,90000"
+"26250,90000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,77000"
+"26250,77000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+"23000,79000"
+"26250,79000"
+]
+)
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+)
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+)
+)
+on &8
+)
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+va (VaSet
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+)
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+pts [
+"22000,89000"
+"26250,89000"
+]
+)
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+)
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+)
+)
+on &2
+)
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+)
+xt "34000,93750,34000,95250"
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+"34000,95250"
+"34000,93750"
+]
+)
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+end &62
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+)
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+)
+)
+on &26
+)
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+)
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+"22000,110000"
+"26250,110000"
+]
+)
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+)
+xt "23000,108800,26300,110000"
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+)
+)
+on &10
+)
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+)
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+pts [
+"23000,97000"
+"26250,97000"
+]
+)
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+)
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+)
+)
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+)
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+)
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+pts [
+"23000,99000"
+"26250,99000"
+]
+)
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+)
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+)
+)
+on &8
+)
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+)
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+"22000,109000"
+"26250,109000"
+]
+)
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+)
+xt "23000,107800,26400,109000"
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+)
+)
+on &2
+)
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+)
+xt "34000,113750,34000,118000"
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+"34000,118000"
+"34000,113750"
+]
+)
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+)
+xt "32800,113100,34000,115000"
+st "en"
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+tm "WireNameMgr"
+)
+)
+on &6
+)
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+)
+xt "15000,24000,18000,24000"
+pts [
+"15000,24000"
+"18000,24000"
+]
+)
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+)
+xt "17000,22800,18900,24000"
+st "up"
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+tm "WireNameMgr"
+)
+s (Text
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+)
+xt "17000,24000,17000,24000"
+blo "17000,24000"
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+)
+)
+on &24
+)
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+)
+xt "40750,9000,58000,105000"
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+"40750,105000"
+"58000,105000"
+"58000,9000"
+]
+)
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+end &90
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+va (VaSet
+)
+xt "42750,103800,49850,105000"
+st "dbus0(3:0)"
+blo "42750,104800"
+tm "WireNameMgr"
+)
+)
+on &4
+)
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+)
+xt "40750,9000,55000,85000"
+pts [
+"40750,85000"
+"55000,85000"
+"55000,9000"
+]
+)
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+end &91
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+)
+xt "42750,83800,49850,85000"
+st "dbus0(7:4)"
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+)
+)
+on &4
+)
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+va (VaSet
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+)
+xt "40750,9000,52000,65000"
+pts [
+"40750,65000"
+"52000,65000"
+"52000,9000"
+]
+)
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+end &92
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+stg "STSignalDisplayStrategy"
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+)
+xt "42750,63800,50550,65000"
+st "dbus0(11:8)"
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+tm "WireNameMgr"
+)
+)
+on &4
+)
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+shape (OrthoPolyLine
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+va (VaSet
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+lineWidth 2
+)
+xt "40750,9000,49000,45000"
+pts [
+"40750,45000"
+"49000,45000"
+"49000,9000"
+]
+)
+start &41
+end &93
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+eat 32
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+f (Text
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+va (VaSet
+)
+xt "42750,43800,51250,45000"
+st "dbus0(15:12)"
+blo "42750,44800"
+tm "WireNameMgr"
+)
+)
+on &4
+)
+*130 (Wire
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+shape (OrthoPolyLine
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+lineWidth 2
+)
+xt "40750,9000,46000,25000"
+pts [
+"40750,25000"
+"46000,25000"
+"46000,9000"
+]
+)
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+end &94
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+sf 1
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+stg "STSignalDisplayStrategy"
+f (Text
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+va (VaSet
+)
+xt "42750,23800,51250,25000"
+st "dbus0(19:16)"
+blo "42750,24800"
+tm "WireNameMgr"
+)
+)
+on &4
+)
+]
+bg "65535,65535,65535"
+grid (Grid
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+isVisible 1
+isActive 1
+xSpacing 1000
+xySpacing 1000
+xShown 1
+yShown 1
+color "26368,26368,26368"
+)
+packageList *131 (PackageList
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diff --git a/Cursor/hds/convertissor_position/fsm.sm b/Cursor/hds/convertissor_position/fsm.sm
new file mode 100644
index 0000000..fc6ba10
--- /dev/null
+++ b/Cursor/hds/convertissor_position/fsm.sm
@@ -0,0 +1,4013 @@
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diff --git a/Cursor/hds/cpt1bit/symbol.sb b/Cursor/hds/cpt1bit/symbol.sb
new file mode 100644
index 0000000..8729cc5
--- /dev/null
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diff --git a/Cursor/hds/cpt4bit/symbol.sb b/Cursor/hds/cpt4bit/symbol.sb
new file mode 100644
index 0000000..fea1f7f
--- /dev/null
+++ b/Cursor/hds/cpt4bit/symbol.sb
@@ -0,0 +1,1715 @@
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diff --git a/Cursor/hds/test/interface b/Cursor/hds/test/interface
new file mode 100644
index 0000000..4b68490
--- /dev/null
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@@ -0,0 +1,1458 @@
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+)
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+)
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+)
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+)
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+)
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+)
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+)
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+)
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+"
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+)
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+"
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+)
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+)
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+)
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+  USE ieee.std_logic_1164.all;
+  USE ieee.numeric_std.all;
+LIBRARY gates;
+USE gates.gates.all;
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+)
+]
+)
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+)
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+)
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+)
+)
+)
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+)
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diff --git a/Prefs/hds_user/v2019.2/hds_user_prefs b/Prefs/hds_user/v2019.2/hds_user_prefs
index fc7bad9..9244d6e 100644
--- a/Prefs/hds_user/v2019.2/hds_user_prefs
+++ b/Prefs/hds_user/v2019.2/hds_user_prefs
@@ -2554,7 +2554,7 @@ second ""
 )
 (pair
 first "hierLevel"
-second "1"
+second "3"
 )
 (pair
 first "onPulldownMenu"
@@ -4181,7 +4181,7 @@ hdsWorkspaceLocation ""
 relativeLibraryRootDir ""
 vmLabelLatestDontAskAgain 0
 vmLabelWorkspaceDontAskAgain 0
-logWindowGeometry "600x389+980+96"
+logWindowGeometry "600x200+920+0"
 diagramBrowserTabNo 0
 showInsertPortHint 0
 showContentFirstTime 0
@@ -6211,27 +6211,26 @@ activeSidePanelTab 2
 activeLibraryTab 2
 sidePanelSize 278
 showUnixHiddenFiles 0
-componentBrowserXpos 1173
-componentBrowserYpos 526
-componentBrowserWidth 300
-componentBrowserHeight 340
+componentBrowserXpos 158
+componentBrowserYpos 308
+componentBrowserWidth 483
+componentBrowserHeight 491
 componentBrowserLibraryNames [
 "Board"
 "gates"
 "Common"
 "io"
 "sequential"
-"Cursor_test"
-"Cursor"
+"LCD_test"
+"synopsys"
+"verilog"
+"vital2000"
 "LCD"
 "Memory"
-"ieee"
 "std"
-"vital2000"
-"verilog"
-"LCD_test"
 "Memory_test"
-"synopsys"
+"ieee"
+"Cursor"
 ]
 )
 (SmPreferences
diff --git a/Prefs/hds_user/v2019.2/tasks/modelsim_flow.tsk b/Prefs/hds_user/v2019.2/tasks/modelsim_flow.tsk
index 35db922..089b6c8 100644
--- a/Prefs/hds_user/v2019.2/tasks/modelsim_flow.tsk
+++ b/Prefs/hds_user/v2019.2/tasks/modelsim_flow.tsk
@@ -29,7 +29,7 @@ onShortcutBar 1
 onPulldownMenu 1
 onToolbar 1
 enabled 1
-hierDepth 1
+hierDepth 3
 subTasks [
 (HDSTaskRef
 TaskName "Generate"
diff --git a/TODO.txt b/TODO.txt
new file mode 100644
index 0000000..e69de29