DocumentHdrVersion "1.1" Header (DocumentHdr version 2 dialect 11 dmPackageRefs [ (DmPackageRef library "ieee" unitName "std_logic_1164" ) (DmPackageRef library "ieee" unitName "numeric_std" ) ] libraryRefs [ "ieee" ] ) version "26.1" appVersion "2018.1 (Build 12)" model (Symbol commonDM (CommonDM ldm (LogicalDM suid 60,0 usingSuid 1 emptyRow *1 (LEmptyRow ) uid 137,0 optionalChildren [ *2 (RefLabelRowHdr ) *3 (TitleRowHdr ) *4 (FilterRowHdr ) *5 (RefLabelColHdr tm "RefLabelColHdrMgr" ) *6 (RowExpandColHdr tm "RowExpandColHdrMgr" ) *7 (GroupColHdr tm "GroupColHdrMgr" ) *8 (NameColHdr tm "NameColHdrMgr" ) *9 (ModeColHdr tm "ModeColHdrMgr" ) *10 (TypeColHdr tm "TypeColHdrMgr" ) *11 (BoundsColHdr tm "BoundsColHdrMgr" ) *12 (InitColHdr tm "InitColHdrMgr" ) *13 (EolColHdr tm "EolColHdrMgr" ) *14 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "addressA" t "std_ulogic_vector" b "(addressBitNb-1 DOWNTO 0)" o 1 suid 49,0 ) ) uid 646,0 ) *15 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "addressB" t "std_ulogic_vector" b "(addressBitNb-1 DOWNTO 0)" o 2 suid 50,0 ) ) uid 648,0 ) *16 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "clockA" t "std_ulogic" o 3 suid 51,0 ) ) uid 650,0 ) *17 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "clockB" t "std_ulogic" o 4 suid 52,0 ) ) uid 652,0 ) *18 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "dataInA" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" o 5 suid 53,0 ) ) uid 654,0 ) *19 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "dataInB" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" o 6 suid 54,0 ) ) uid 656,0 ) *20 (LogPort port (LogicalPort lang 11 decl (Decl n "dataOutA" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" posAdd 0 o 7 suid 55,0 ) ) uid 658,0 ) *21 (LogPort port (LogicalPort lang 11 decl (Decl n "dataOutB" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" o 8 suid 56,0 ) ) uid 660,0 ) *22 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "enA" t "std_ulogic" o 9 suid 57,0 ) ) uid 662,0 ) *23 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "enB" t "std_ulogic" o 10 suid 58,0 ) ) uid 664,0 ) *24 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "writeEnA" t "std_ulogic" o 11 suid 59,0 ) ) uid 666,0 ) *25 (LogPort port (LogicalPort lang 11 m 1 decl (Decl n "writeEnB" t "std_ulogic" o 12 suid 60,0 ) ) uid 668,0 ) ] ) pdm (PhysicalDM displayShortBounds 1 editShortBounds 1 uid 150,0 optionalChildren [ *26 (Sheet sheetRow (SheetRow headerVa (MVa cellColor "49152,49152,49152" fontColor "0,0,0" font "courier,10,0" ) cellVa (MVa cellColor "65535,65535,65535" fontColor "0,0,0" font "courier,10,0" ) groupVa (MVa cellColor "39936,56832,65280" fontColor "0,0,0" font "courier,10,0" ) emptyMRCItem *27 (MRCItem litem &1 pos 12 dimension 20 ) uid 152,0 optionalChildren [ *28 (MRCItem litem &2 pos 0 dimension 20 uid 153,0 ) *29 (MRCItem litem &3 pos 1 dimension 23 uid 154,0 ) *30 (MRCItem litem &4 pos 2 hidden 1 dimension 20 uid 155,0 ) *31 (MRCItem litem &14 pos 0 dimension 20 uid 647,0 ) *32 (MRCItem litem &15 pos 1 dimension 20 uid 649,0 ) *33 (MRCItem litem &16 pos 2 dimension 20 uid 651,0 ) *34 (MRCItem litem &17 pos 3 dimension 20 uid 653,0 ) *35 (MRCItem litem &18 pos 4 dimension 20 uid 655,0 ) *36 (MRCItem litem &19 pos 5 dimension 20 uid 657,0 ) *37 (MRCItem litem &20 pos 6 dimension 20 uid 659,0 ) *38 (MRCItem litem &21 pos 7 dimension 20 uid 661,0 ) *39 (MRCItem litem &22 pos 8 dimension 20 uid 663,0 ) *40 (MRCItem litem &23 pos 9 dimension 20 uid 665,0 ) *41 (MRCItem litem &24 pos 10 dimension 20 uid 667,0 ) *42 (MRCItem litem &25 pos 11 dimension 20 uid 669,0 ) ] ) sheetCol (SheetCol propVa (MVa cellColor "0,49152,49152" fontColor "0,0,0" font "courier,10,0" textAngle 90 ) uid 156,0 optionalChildren [ *43 (MRCItem litem &5 pos 0 dimension 20 uid 157,0 ) *44 (MRCItem litem &7 pos 1 dimension 50 uid 158,0 ) *45 (MRCItem litem &8 pos 2 dimension 100 uid 159,0 ) *46 (MRCItem litem &9 pos 3 dimension 50 uid 160,0 ) *47 (MRCItem litem &10 pos 4 dimension 100 uid 161,0 ) *48 (MRCItem litem &11 pos 5 dimension 100 uid 162,0 ) *49 (MRCItem litem &12 pos 6 dimension 50 uid 163,0 ) *50 (MRCItem litem &13 pos 7 dimension 80 uid 164,0 ) ] ) fixedCol 4 fixedRow 2 name "Ports" uid 151,0 vaOverrides [ ] ) ] ) uid 136,0 ) genericsCommonDM (CommonDM ldm (LogicalDM emptyRow *51 (LEmptyRow ) uid 166,0 optionalChildren [ *52 (RefLabelRowHdr ) *53 (TitleRowHdr ) *54 (FilterRowHdr ) *55 (RefLabelColHdr tm "RefLabelColHdrMgr" ) *56 (RowExpandColHdr tm "RowExpandColHdrMgr" ) *57 (GroupColHdr tm "GroupColHdrMgr" ) *58 (NameColHdr tm "GenericNameColHdrMgr" ) *59 (TypeColHdr tm "GenericTypeColHdrMgr" ) *60 (InitColHdr tm "GenericValueColHdrMgr" ) *61 (PragmaColHdr tm "GenericPragmaColHdrMgr" ) *62 (EolColHdr tm "GenericEolColHdrMgr" ) *63 (LogGeneric generic (GiElement name "addressBitNb" type "positive" value "8" ) uid 215,0 ) *64 (LogGeneric generic (GiElement name "dataBitNb" type "positive" value "8" ) uid 217,0 ) ] ) pdm (PhysicalDM displayShortBounds 1 editShortBounds 1 uid 178,0 optionalChildren [ *65 (Sheet sheetRow (SheetRow headerVa (MVa cellColor "49152,49152,49152" fontColor "0,0,0" font "courier,10,0" ) cellVa (MVa cellColor "65535,65535,65535" fontColor "0,0,0" font "courier,10,0" ) groupVa (MVa cellColor "39936,56832,65280" fontColor "0,0,0" font "courier,10,0" ) emptyMRCItem *66 (MRCItem litem &51 pos 2 dimension 20 ) uid 180,0 optionalChildren [ *67 (MRCItem litem &52 pos 0 dimension 20 uid 181,0 ) *68 (MRCItem litem &53 pos 1 dimension 23 uid 182,0 ) *69 (MRCItem litem &54 pos 2 hidden 1 dimension 20 uid 183,0 ) *70 (MRCItem litem &63 pos 0 dimension 20 uid 216,0 ) *71 (MRCItem litem &64 pos 1 dimension 20 uid 218,0 ) ] ) sheetCol (SheetCol propVa (MVa cellColor "0,49152,49152" fontColor "0,0,0" font "courier,10,0" textAngle 90 ) uid 184,0 optionalChildren [ *72 (MRCItem litem &55 pos 0 dimension 20 uid 185,0 ) *73 (MRCItem litem &57 pos 1 dimension 50 uid 186,0 ) *74 (MRCItem litem &58 pos 2 dimension 100 uid 187,0 ) *75 (MRCItem litem &59 pos 3 dimension 100 uid 188,0 ) *76 (MRCItem litem &60 pos 4 dimension 50 uid 189,0 ) *77 (MRCItem litem &61 pos 5 dimension 50 uid 190,0 ) *78 (MRCItem litem &62 pos 6 dimension 80 uid 191,0 ) ] ) fixedCol 3 fixedRow 2 name "Ports" uid 179,0 vaOverrides [ ] ) ] ) uid 165,0 type 1 ) VExpander (VariableExpander vvMap [ (vvPair variable "HDLDir" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hdl" ) (vvPair variable "HDSDir" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds" ) (vvPair variable "SideDataDesignDir" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/bram_tester/interface.info" ) (vvPair variable "SideDataUserDir" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/bram_tester/interface.user" ) (vvPair variable "SourceDir" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds" ) (vvPair variable "appl" value "HDL Designer" ) (vvPair variable "arch_name" value "interface" ) (vvPair variable "concat_file" value "concatenated" ) (vvPair variable "config" value "%(unit)_%(view)_config" ) (vvPair variable "d" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/bram_tester" ) (vvPair variable "d_logical" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/bram_tester" ) (vvPair variable "date" value "08/28/19" ) (vvPair variable "day" value "Wed" ) (vvPair variable "day_long" value "Wednesday" ) (vvPair variable "dd" value "28" ) (vvPair variable "entity_name" value "bram_tester" ) (vvPair variable "ext" value "" ) (vvPair variable "f" value "interface" ) (vvPair variable "f_logical" value "interface" ) (vvPair variable "f_noext" value "interface" ) (vvPair variable "graphical_source_author" value "francois" ) (vvPair variable "graphical_source_date" value "08/28/19" ) (vvPair variable "graphical_source_group" value "francois" ) (vvPair variable "graphical_source_host" value "Aphelia" ) (vvPair variable "graphical_source_time" value "13:45:28" ) (vvPair variable "group" value "francois" ) (vvPair variable "host" value "Aphelia" ) (vvPair variable "language" value "VHDL" ) (vvPair variable "library" value "memory_test" ) (vvPair variable "library_downstream_ModelSimCompiler" value "$SCRATCH_DIR/Libs/Memory_test/work" ) (vvPair variable "mm" value "08" ) (vvPair variable "module_name" value "bram_tester" ) (vvPair variable "month" value "Aug" ) (vvPair variable "month_long" value "August" ) (vvPair variable "p" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/bram_tester/interface" ) (vvPair variable "p_logical" value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory_test/hds/bram_tester/interface" ) (vvPair variable "package_name" value "" ) (vvPair variable "project_name" value "hds" ) (vvPair variable "series" value "HDL Designer Series" ) (vvPair variable "task_DesignCompilerPath" value "" ) (vvPair variable "task_ISEPath" value "D:\\Labs\\ElN\\BoardTester\\Board\\ise" ) (vvPair variable "task_LeonardoPath" value "" ) (vvPair variable "task_ModelSimPath" value "C:\\EDA\\Modelsim\\win32" ) (vvPair variable "task_NC-SimPath" value "" ) (vvPair variable "task_PrecisionRTLPath" value "" ) (vvPair variable "task_QuestaSimPath" value "" ) (vvPair variable "task_VCSPath" value "" ) (vvPair variable "this_ext" value "" ) (vvPair variable "this_file" value "interface" ) (vvPair variable "this_file_logical" value "interface" ) (vvPair variable "time" value "13:45:28" ) (vvPair variable "unit" value "bram_tester" ) (vvPair variable "user" value "francois" ) (vvPair variable "version" value "2018.1 (Build 12)" ) (vvPair variable "view" value "interface" ) (vvPair variable "year" value "2019" ) (vvPair variable "yy" value "19" ) ] ) LanguageMgr "Vhdl2008LangMgr" uid 135,0 optionalChildren [ *79 (SymbolBody uid 8,0 optionalChildren [ *80 (CptPort uid 586,0 ps "OnEdgeStrategy" shape (Triangle uid 587,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "22625,5250,23375,6000" ) tg (CPTG uid 588,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 589,0 ro 270 va (VaSet font "courier,8,0" ) xt "22550,7000,23450,11000" st "addressA" ju 2 blo "23250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 590,0 va (VaSet font "courier,8,0" ) xt "44000,3800,76000,4700" st "addressA : OUT std_ulogic_vector (addressBitNb-1 DOWNTO 0) ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "addressA" t "std_ulogic_vector" b "(addressBitNb-1 DOWNTO 0)" o 1 suid 49,0 ) ) ) *81 (CptPort uid 591,0 ps "OnEdgeStrategy" shape (Triangle uid 592,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "66625,5250,67375,6000" ) tg (CPTG uid 593,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 594,0 ro 270 va (VaSet font "courier,8,0" ) xt "66550,7000,67450,11000" st "addressB" ju 2 blo "67250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 595,0 va (VaSet font "courier,8,0" ) xt "44000,4700,76000,5600" st "addressB : OUT std_ulogic_vector (addressBitNb-1 DOWNTO 0) ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "addressB" t "std_ulogic_vector" b "(addressBitNb-1 DOWNTO 0)" o 2 suid 50,0 ) ) ) *82 (CptPort uid 596,0 ps "OnEdgeStrategy" shape (Triangle uid 597,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "34625,5250,35375,6000" ) tg (CPTG uid 598,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 599,0 ro 270 va (VaSet font "courier,8,0" ) xt "34550,7000,35450,10000" st "clockA" ju 2 blo "35250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 600,0 va (VaSet font "courier,8,0" ) xt "44000,5600,60000,6500" st "clockA : OUT std_ulogic ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "clockA" t "std_ulogic" o 3 suid 51,0 ) ) ) *83 (CptPort uid 601,0 ps "OnEdgeStrategy" shape (Triangle uid 602,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "54625,5250,55375,6000" ) tg (CPTG uid 603,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 604,0 ro 270 va (VaSet font "courier,8,0" ) xt "54550,7000,55450,10000" st "clockB" ju 2 blo "55250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 605,0 va (VaSet font "courier,8,0" ) xt "44000,6500,60000,7400" st "clockB : OUT std_ulogic ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "clockB" t "std_ulogic" o 4 suid 52,0 ) ) ) *84 (CptPort uid 606,0 ps "OnEdgeStrategy" shape (Triangle uid 607,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "26625,5250,27375,6000" ) tg (CPTG uid 608,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 609,0 ro 270 va (VaSet font "courier,8,0" ) xt "26550,7000,27450,10500" st "dataInA" ju 2 blo "27250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 610,0 va (VaSet font "courier,8,0" ) xt "44000,7400,74500,8300" st "dataInA : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0) ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "dataInA" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" o 5 suid 53,0 ) ) ) *85 (CptPort uid 611,0 ps "OnEdgeStrategy" shape (Triangle uid 612,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "62625,5250,63375,6000" ) tg (CPTG uid 613,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 614,0 ro 270 va (VaSet font "courier,8,0" ) xt "62550,7000,63450,10500" st "dataInB" ju 2 blo "63250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 615,0 va (VaSet font "courier,8,0" ) xt "44000,8300,74500,9200" st "dataInB : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0) ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "dataInB" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" o 6 suid 54,0 ) ) ) *86 (CptPort uid 616,0 ps "OnEdgeStrategy" shape (Triangle uid 617,0 ro 180 va (VaSet vasetType 1 fg "0,65535,0" ) xt "24625,5250,25375,6000" ) tg (CPTG uid 618,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 619,0 ro 270 va (VaSet font "courier,8,0" ) xt "24550,7000,25450,11000" st "dataOutA" ju 2 blo "25250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 620,0 va (VaSet font "courier,8,0" ) xt "44000,2000,74500,2900" st "dataOutA : IN std_ulogic_vector (dataBitNb-1 DOWNTO 0) ; " ) thePort (LogicalPort lang 11 decl (Decl n "dataOutA" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" posAdd 0 o 7 suid 55,0 ) ) ) *87 (CptPort uid 621,0 ps "OnEdgeStrategy" shape (Triangle uid 622,0 ro 180 va (VaSet vasetType 1 fg "0,65535,0" ) xt "64625,5250,65375,6000" ) tg (CPTG uid 623,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 624,0 ro 270 va (VaSet font "courier,8,0" ) xt "64550,7000,65450,11000" st "dataOutB" ju 2 blo "65250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 625,0 va (VaSet font "courier,8,0" ) xt "44000,2900,74500,3800" st "dataOutB : IN std_ulogic_vector (dataBitNb-1 DOWNTO 0) ; " ) thePort (LogicalPort lang 11 decl (Decl n "dataOutB" t "std_ulogic_vector" b "(dataBitNb-1 DOWNTO 0)" o 8 suid 56,0 ) ) ) *88 (CptPort uid 626,0 ps "OnEdgeStrategy" shape (Triangle uid 627,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "32625,5250,33375,6000" ) tg (CPTG uid 628,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 629,0 ro 270 va (VaSet font "courier,8,0" ) xt "32550,7000,33450,8500" st "enA" ju 2 blo "33250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 630,0 va (VaSet font "courier,8,0" ) xt "44000,9200,60000,10100" st "enA : OUT std_ulogic ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "enA" t "std_ulogic" o 9 suid 57,0 ) ) ) *89 (CptPort uid 631,0 ps "OnEdgeStrategy" shape (Triangle uid 632,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "56625,5250,57375,6000" ) tg (CPTG uid 633,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 634,0 ro 270 va (VaSet font "courier,8,0" ) xt "56550,7000,57450,8500" st "enB" ju 2 blo "57250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 635,0 va (VaSet font "courier,8,0" ) xt "44000,10100,60000,11000" st "enB : OUT std_ulogic ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "enB" t "std_ulogic" o 10 suid 58,0 ) ) ) *90 (CptPort uid 636,0 ps "OnEdgeStrategy" shape (Triangle uid 637,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "28625,5250,29375,6000" ) tg (CPTG uid 638,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 639,0 ro 270 va (VaSet font "courier,8,0" ) xt "28550,7000,29450,11000" st "writeEnA" ju 2 blo "29250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 640,0 va (VaSet font "courier,8,0" ) xt "44000,11000,60000,11900" st "writeEnA : OUT std_ulogic ; " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "writeEnA" t "std_ulogic" o 11 suid 59,0 ) ) ) *91 (CptPort uid 641,0 ps "OnEdgeStrategy" shape (Triangle uid 642,0 va (VaSet vasetType 1 fg "0,65535,0" ) xt "60625,5250,61375,6000" ) tg (CPTG uid 643,0 ps "CptPortTextPlaceStrategy" stg "RightVerticalLayoutStrategy" f (Text uid 644,0 ro 270 va (VaSet font "courier,8,0" ) xt "60550,7000,61450,11000" st "writeEnB" ju 2 blo "61250,7000" tm "CptPortNameMgr" ) ) dt (MLText uid 645,0 va (VaSet font "courier,8,0" ) xt "44000,11900,59000,12800" st "writeEnB : OUT std_ulogic " ) thePort (LogicalPort lang 11 m 1 decl (Decl n "writeEnB" t "std_ulogic" o 12 suid 60,0 ) ) ) ] shape (Rectangle uid 9,0 va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "15000,6000,75000,14000" ) biTextGroup (BiTextGroup uid 10,0 ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" first (Text uid 11,0 va (VaSet font "courier,8,1" ) xt "42000,9100,48000,10000" st "memory_test" blo "42000,9800" ) second (Text uid 12,0 va (VaSet font "courier,8,1" ) xt "42000,10000,48000,10900" st "bram_tester" blo "42000,10700" ) ) gi *92 (GenericInterface uid 13,0 ps "CenterOffsetStrategy" matrix (Matrix uid 14,0 text (MLText uid 15,0 va (VaSet font "courier,8,0" ) xt "21000,6000,34000,9600" st "Generic Declarations addressBitNb positive 8 dataBitNb positive 8 " ) header "Generic Declarations" showHdrWhenContentsEmpty 1 ) elements [ (GiElement name "addressBitNb" type "positive" value "8" ) (GiElement name "dataBitNb" type "positive" value "8" ) ] ) portInstanceVisAsIs 1 portInstanceVis (PortSigDisplay sTC 0 sF 0 ) portVis (PortSigDisplay sTC 0 sF 0 ) ) *93 (Grouping uid 16,0 optionalChildren [ *94 (CommentText uid 18,0 shape (Rectangle uid 19,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "36000,48000,53000,49000" ) oxt "18000,70000,35000,71000" text (MLText uid 20,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "36200,48000,52400,49000" st " by %user on %dd %month %year " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 17000 ) position 1 ignorePrefs 1 titleBlock 1 ) *95 (CommentText uid 21,0 shape (Rectangle uid 22,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "53000,44000,57000,45000" ) oxt "35000,66000,39000,67000" text (MLText uid 23,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "53200,44000,56800,45000" st " Project: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *96 (CommentText uid 24,0 shape (Rectangle uid 25,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "36000,46000,53000,47000" ) oxt "18000,68000,35000,69000" text (MLText uid 26,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "36200,46000,52400,47000" st " " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 17000 ) position 1 ignorePrefs 1 titleBlock 1 ) *97 (CommentText uid 27,0 shape (Rectangle uid 28,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,46000,36000,47000" ) oxt "14000,68000,18000,69000" text (MLText uid 29,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "32200,46000,35800,47000" st " Title: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *98 (CommentText uid 30,0 shape (Rectangle uid 31,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "53000,45000,73000,49000" ) oxt "35000,67000,55000,71000" text (MLText uid 32,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "53200,45200,66400,46200" st " " tm "CommentText" wrapOption 3 visibleHeight 4000 visibleWidth 20000 ) ignorePrefs 1 titleBlock 1 ) *99 (CommentText uid 33,0 shape (Rectangle uid 34,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "57000,44000,73000,45000" ) oxt "39000,66000,55000,67000" text (MLText uid 35,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "57200,44000,59000,45000" st " %project_name " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 16000 ) position 1 ignorePrefs 1 titleBlock 1 ) *100 (CommentText uid 36,0 shape (Rectangle uid 37,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,44000,53000,46000" ) oxt "14000,66000,35000,68000" text (MLText uid 38,0 va (VaSet fg "32768,0,0" ) xt "38000,44500,47000,45500" st " " ju 0 tm "CommentText" wrapOption 3 visibleHeight 2000 visibleWidth 21000 ) position 1 ignorePrefs 1 titleBlock 1 ) *101 (CommentText uid 39,0 shape (Rectangle uid 40,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,47000,36000,48000" ) oxt "14000,69000,18000,70000" text (MLText uid 41,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "32200,47000,35200,48000" st " Path: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *102 (CommentText uid 42,0 shape (Rectangle uid 43,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "32000,48000,36000,49000" ) oxt "14000,70000,18000,71000" text (MLText uid 44,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "32200,48000,35800,49000" st " Edited: " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 4000 ) position 1 ignorePrefs 1 titleBlock 1 ) *103 (CommentText uid 45,0 shape (Rectangle uid 46,0 sl 0 va (VaSet vasetType 1 fg "65280,65280,46080" ) xt "36000,47000,53000,48000" ) oxt "18000,69000,35000,70000" text (MLText uid 47,0 va (VaSet fg "0,0,32768" bg "0,0,32768" ) xt "36200,47000,51200,48000" st " %library/%unit/%view " tm "CommentText" wrapOption 3 visibleHeight 1000 visibleWidth 17000 ) position 1 ignorePrefs 1 titleBlock 1 ) ] shape (GroupingShape uid 17,0 va (VaSet vasetType 1 fg "65535,65535,65535" lineStyle 2 lineWidth 2 ) xt "32000,44000,73000,49000" ) oxt "14000,66000,55000,71000" ) ] bg "65535,65535,65535" grid (Grid origin "0,0" isVisible 1 isActive 1 xSpacing 1000 xySpacing 1000 xShown 1 yShown 1 color "26368,26368,26368" ) packageList *104 (PackageList uid 48,0 stg "VerticalLayoutStrategy" textVec [ *105 (Text uid 49,0 va (VaSet font "courier,8,1" ) xt "0,0,5400,1000" st "Package List" blo "0,800" ) *106 (MLText uid 50,0 va (VaSet ) xt "0,1000,18600,4000" st "LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.numeric_std.all;" tm "PackageList" ) ] ) windowSize "0,0,1016,690" viewArea "-500,-500,71230,48820" cachedDiagramExtent "0,0,77000,49000" hasePageBreakOrigin 1 pageBreakOrigin "0,0" defaultCommentText (CommentText shape (Rectangle layer 0 va (VaSet vasetType 1 fg "65280,65280,46080" lineColor "0,0,32768" ) xt "0,0,15000,5000" ) text (MLText va (VaSet fg "0,0,32768" ) xt "200,200,2600,1200" st " Text " tm "CommentText" wrapOption 3 visibleHeight 4600 visibleWidth 14600 ) ) defaultRequirementText (RequirementText shape (ZoomableIcon layer 0 va (VaSet vasetType 1 fg "59904,39936,65280" lineColor "0,0,32768" ) xt "0,0,1500,1750" iconName "reqTracerRequirement.bmp" iconMaskName "reqTracerRequirement.msk" ) autoResize 1 text (MLText va (VaSet fg "0,0,32768" font "courier,8,0" ) xt "450,2150,1450,3050" st " Text " tm "RequirementText" wrapOption 3 visibleHeight 1350 visibleWidth 1100 ) ) defaultPanel (Panel shape (RectFrame va (VaSet vasetType 1 fg "65535,65535,65535" lineColor "32768,0,0" lineWidth 3 ) xt "0,0,20000,20000" ) title (TextAssociate ps "TopLeftStrategy" text (Text va (VaSet font "courier,8,1" ) xt "1000,1000,3800,2000" st "Panel0" blo "1000,1800" tm "PanelText" ) ) ) parentGraphicsRef (HdmGraphicsRef libraryName "Memory_test" entityName "bram_tb" viewName "struct.bd" ) defaultSymbolBody (SymbolBody shape (Rectangle va (VaSet vasetType 1 fg "0,65535,0" lineColor "0,32896,0" lineWidth 2 ) xt "15000,6000,33000,26000" ) biTextGroup (BiTextGroup ps "CenterOffsetStrategy" stg "VerticalLayoutStrategy" first (Text va (VaSet font "courier,8,1" ) xt "22200,15000,25800,16000" st "" blo "22200,15800" ) second (Text va (VaSet font "courier,8,1" ) xt "22200,16000,24800,17000" st "" blo "22200,16800" ) ) gi *107 (GenericInterface ps "CenterOffsetStrategy" matrix (Matrix text (MLText va (VaSet font "courier,8,0" ) xt "0,12000,10500,12900" st "Generic Declarations" ) header "Generic Declarations" showHdrWhenContentsEmpty 1 ) elements [ ] ) portInstanceVisAsIs 1 portInstanceVis (PortSigDisplay sIVOD 1 ) portVis (PortSigDisplay sIVOD 1 ) ) defaultCptPort (CptPort ps "OnEdgeStrategy" shape (Triangle ro 90 va (VaSet vasetType 1 fg "0,65535,0" ) xt "0,0,750,750" ) tg (CPTG ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text va (VaSet font "courier,8,0" ) xt "0,750,1500,1650" st "In0" blo "0,1450" tm "CptPortNameMgr" ) ) dt (MLText va (VaSet font "courier,8,0" ) ) thePort (LogicalPort lang 11 decl (Decl n "In0" t "std_logic_vector" b "(15 DOWNTO 0)" o 0 ) ) ) defaultCptPortBuffer (CptPort ps "OnEdgeStrategy" shape (Diamond va (VaSet vasetType 1 fg "65535,65535,65535" bg "0,0,0" ) xt "0,0,750,750" ) tg (CPTG ps "CptPortTextPlaceStrategy" stg "VerticalLayoutStrategy" f (Text va (VaSet font "courier,8,0" ) xt "0,750,3500,1650" st "Buffer0" blo "0,1450" tm "CptPortNameMgr" ) ) dt (MLText va (VaSet font "courier,8,0" ) ) thePort (LogicalPort lang 11 m 3 decl (Decl n "Buffer0" t "std_logic_vector" b "(15 DOWNTO 0)" o 0 ) ) ) DeclarativeBlock *108 (SymDeclBlock uid 1,0 stg "SymDeclLayoutStrategy" declLabel (Text uid 2,0 va (VaSet font "courier,8,1" ) xt "42000,0,47400,1000" st "Declarations" blo "42000,800" ) portLabel (Text uid 3,0 va (VaSet font "courier,8,1" ) xt "42000,1000,44700,2000" st "Ports:" blo "42000,1800" ) externalLabel (Text uid 4,0 va (VaSet font "courier,8,1" ) xt "42000,12800,44500,13700" st "User:" blo "42000,13500" ) internalLabel (Text uid 6,0 va (VaSet isHidden 1 font "courier,8,1" ) xt "42000,0,47800,1000" st "Internal User:" blo "42000,800" ) externalText (MLText uid 5,0 va (VaSet font "courier,8,0" ) xt "44000,13700,44000,13700" tm "SyDeclarativeTextMgr" ) internalText (MLText uid 7,0 va (VaSet isHidden 1 font "courier,8,0" ) xt "42000,0,42000,0" tm "SyDeclarativeTextMgr" ) ) lastUid 669,0 activeModelName "Symbol:GEN" )