Cursor/Libs/IO/hds/tristate@buffer@u@logic@vector/symbol.sb

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dialect 11
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "gates"
unitName "gates"
)
]
libraryRefs [
"ieee"
"gates"
]
)
version "26.1"
appVersion "2018.1 (Build 12)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 2003,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
uid 101,0
optionalChildren [
*2 (LogPort
port (LogicalPort
decl (Decl
n "in1"
t "std_uLogic_vector"
b "(dataNbBits-1 DOWNTO 0)"
o 1
suid 1,0
)
)
uid 102,0
)
*3 (LogPort
port (LogicalPort
m 1
decl (Decl
n "out1"
t "std_Logic_vector"
b "(dataNbBits-1 DOWNTO 0)"
o 2
suid 2,0
)
)
uid 103,0
)
*4 (RefLabelRowHdr
)
*5 (TitleRowHdr
)
*6 (FilterRowHdr
)
*7 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*8 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*9 (GroupColHdr
tm "GroupColHdrMgr"
)
*10 (NameColHdr
tm "NameColHdrMgr"
)
*11 (ModeColHdr
tm "ModeColHdrMgr"
)
*12 (TypeColHdr
tm "TypeColHdrMgr"
)
*13 (BoundsColHdr
tm "BoundsColHdrMgr"
)
*14 (InitColHdr
tm "InitColHdrMgr"
)
*15 (EolColHdr
tm "EolColHdrMgr"
)
*16 (LogPort
port (LogicalPort
decl (Decl
n "OE"
t "std_ulogic"
o 3
suid 2003,0
)
)
uid 191,0
)
]
)
pdm (PhysicalDM
uid 104,0
optionalChildren [
*17 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "courier,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
)
emptyMRCItem *18 (MRCItem
litem &1
pos 3
dimension 20
)
uid 43,0
optionalChildren [
*19 (MRCItem
litem &4
pos 0
dimension 20
uid 46,0
)
*20 (MRCItem
litem &5
pos 1
dimension 23
uid 48,0
)
*21 (MRCItem
litem &6
pos 2
hidden 1
dimension 20
uid 50,0
)
*22 (MRCItem
litem &2
pos 0
dimension 20
uid 69,0
)
*23 (MRCItem
litem &3
pos 1
dimension 20
uid 70,0
)
*24 (MRCItem
litem &16
pos 2
dimension 20
uid 192,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
)
uid 44,0
optionalChildren [
*25 (MRCItem
litem &7
pos 0
dimension 20
uid 52,0
)
*26 (MRCItem
litem &9
pos 1
dimension 50
uid 56,0
)
*27 (MRCItem
litem &10
pos 2
dimension 100
uid 58,0
)
*28 (MRCItem
litem &11
pos 3
dimension 50
uid 60,0
)
*29 (MRCItem
litem &12
pos 4
dimension 100
uid 62,0
)
*30 (MRCItem
litem &13
pos 5
dimension 100
uid 64,0
)
*31 (MRCItem
litem &14
pos 6
dimension 50
uid 66,0
)
*32 (MRCItem
litem &15
pos 7
dimension 80
uid 68,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 42,0
vaOverrides [
]
)
]
)
uid 100,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *33 (LEmptyRow
)
uid 106,0
optionalChildren [
*34 (RefLabelRowHdr
)
*35 (TitleRowHdr
)
*36 (FilterRowHdr
)
*37 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*38 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*39 (GroupColHdr
tm "GroupColHdrMgr"
)
*40 (NameColHdr
tm "GenericNameColHdrMgr"
)
*41 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*42 (InitColHdr
tm "GenericValueColHdrMgr"
)
*43 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*44 (EolColHdr
tm "GenericEolColHdrMgr"
)
*45 (LogGeneric
generic (GiElement
name "dataNbBits"
type "positive"
value "8"
)
uid 96,0
)
*46 (LogGeneric
generic (GiElement
name "delay"
type "time"
value "gateDelay"
)
uid 97,0
)
]
)
pdm (PhysicalDM
uid 107,0
optionalChildren [
*47 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "courier,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
)
emptyMRCItem *48 (MRCItem
litem &33
pos 2
dimension 20
)
uid 72,0
optionalChildren [
*49 (MRCItem
litem &34
pos 0
dimension 20
uid 75,0
)
*50 (MRCItem
litem &35
pos 1
dimension 23
uid 77,0
)
*51 (MRCItem
litem &36
pos 2
hidden 1
dimension 20
uid 79,0
)
*52 (MRCItem
litem &45
pos 0
dimension 20
uid 98,0
)
*53 (MRCItem
litem &46
pos 1
dimension 20
uid 99,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
)
uid 73,0
optionalChildren [
*54 (MRCItem
litem &37
pos 0
dimension 20
uid 81,0
)
*55 (MRCItem
litem &39
pos 1
dimension 50
uid 85,0
)
*56 (MRCItem
litem &40
pos 2
dimension 100
uid 87,0
)
*57 (MRCItem
litem &41
pos 3
dimension 100
uid 89,0
)
*58 (MRCItem
litem &42
pos 4
dimension 50
uid 91,0
)
*59 (MRCItem
litem &43
pos 5
dimension 50
uid 93,0
)
*60 (MRCItem
litem &44
pos 6
dimension 80
uid 95,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 71,0
vaOverrides [
]
)
]
)
uid 105,0
type 1
)
VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hdl"
)
(vvPair
variable "HDSDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds"
)
(vvPair
variable "SideDataDesignDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds/tristate@buffer@u@logic@vector/symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds/tristate@buffer@u@logic@vector/symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "symbol"
)
(vvPair
variable "concat_file"
value "concatenated"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds/tristate@buffer@u@logic@vector"
)
(vvPair
variable "d_logical"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds/tristateBufferULogicVector"
)
(vvPair
variable "date"
value "08/28/19"
)
(vvPair
variable "day"
value "Wed"
)
(vvPair
variable "day_long"
value "Wednesday"
)
(vvPair
variable "dd"
value "28"
)
(vvPair
variable "entity_name"
value "tristateBufferULogicVector"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "symbol.sb"
)
(vvPair
variable "f_noext"
value "symbol"
)
(vvPair
variable "graphical_source_author"
value "francois"
)
(vvPair
variable "graphical_source_date"
value "08/28/19"
)
(vvPair
variable "graphical_source_group"
value "francois"
)
(vvPair
variable "graphical_source_host"
value "Aphelia"
)
(vvPair
variable "graphical_source_time"
value "13:44:57"
)
(vvPair
variable "group"
value "francois"
)
(vvPair
variable "host"
value "Aphelia"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "io"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/Libraries/IO/work"
)
(vvPair
variable "mm"
value "08"
)
(vvPair
variable "module_name"
value "tristateBufferULogicVector"
)
(vvPair
variable "month"
value "Aug"
)
(vvPair
variable "month_long"
value "August"
)
(vvPair
variable "p"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds/tristate@buffer@u@logic@vector/symbol.sb"
)
(vvPair
variable "p_logical"
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/IO/hds/tristateBufferULogicVector/symbol.sb"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "hds"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "c:\\eda\\modelsim\\win32"
)
(vvPair
variable "task_NC-SimPath"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "sb"
)
(vvPair
variable "this_file"
value "symbol"
)
(vvPair
variable "this_file_logical"
value "symbol"
)
(vvPair
variable "time"
value "13:44:57"
)
(vvPair
variable "unit"
value "tristateBufferULogicVector"
)
(vvPair
variable "user"
value "francois"
)
(vvPair
variable "version"
value "2018.1 (Build 12)"
)
(vvPair
variable "view"
value "symbol"
)
(vvPair
variable "year"
value "2019"
)
(vvPair
variable "yy"
value "19"
)
]
)
LanguageMgr "Vhdl2008LangMgr"
uid 29,0
optionalChildren [
*61 (SymbolBody
uid 8,0
optionalChildren [
*62 (CptPort
uid 16,0
ps "OnEdgeStrategy"
shape (Triangle
uid 17,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "34250,18625,35000,19375"
)
tg (CPTG
uid 38,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 19,0
va (VaSet
isHidden 1
)
xt "35000,18700,43400,19700"
st "in1 : (dataNbBits-1:0)"
blo "35000,19500"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 34,0
va (VaSet
font "courier,8,0"
)
xt "2000,10700,31000,11600"
st "in1  : IN     std_uLogic_vector (dataNbBits-1 DOWNTO 0) ;"
)
thePort (LogicalPort
decl (Decl
n "in1"
t "std_uLogic_vector"
b "(dataNbBits-1 DOWNTO 0)"
o 1
suid 1,0
)
)
)
*63 (CptPort
uid 22,0
ps "OnEdgeStrategy"
shape (Triangle
uid 23,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40000,18625,40750,19375"
)
tg (CPTG
uid 39,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 25,0
va (VaSet
isHidden 1
)
xt "31200,18700,40000,19700"
st "out1 : (dataNbBits-1:0)"
ju 2
blo "40000,19500"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 35,0
va (VaSet
font "courier,8,0"
)
xt "2000,11600,29500,12500"
st "out1 : OUT    std_Logic_vector (dataNbBits-1 DOWNTO 0)"
)
thePort (LogicalPort
m 1
decl (Decl
n "out1"
t "std_Logic_vector"
b "(dataNbBits-1 DOWNTO 0)"
o 2
suid 2,0
)
)
)
*64 (CptPort
uid 186,0
ps "OnEdgeStrategy"
shape (Triangle
uid 187,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36625,16450,37375,17200"
)
tg (CPTG
uid 188,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 189,0
ro 270
va (VaSet
isHidden 1
)
xt "161250,30050,162250,31550"
st "OE"
ju 2
blo "162050,30050"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 190,0
va (VaSet
font "courier,8,0"
)
xt "2000,9800,16000,10700"
st "OE   : IN     std_ulogic  ;"
)
thePort (LogicalPort
decl (Decl
n "OE"
t "std_ulogic"
o 3
suid 2003,0
)
)
)
]
shape (Buf
uid 30,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "35000,16000,40000,22000"
)
showPorts 0
oxt "15000,18000,21000,24000"
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "courier,8,1"
)
xt "35910,21700,36910,22600"
st "io"
blo "35910,22400"
)
second (Text
uid 12,0
va (VaSet
font "courier,8,1"
)
xt "35910,22600,49410,23500"
st "tristateBufferULogicVector"
blo "35910,23300"
)
)
gi *65 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
font "courier,8,0"
)
xt "35000,24800,51000,28400"
st "Generic Declarations

dataNbBits positive 8          
delay      time     gateDelay  "
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
(GiElement
name "dataNbBits"
type "positive"
value "8"
)
(GiElement
name "delay"
type "time"
value "gateDelay"
)
]
)
portInstanceVis (PortSigDisplay
disp 1
sN 0
sTC 0
sT 1
)
portVis (PortSigDisplay
sN 0
)
)
*66 (Grouping
uid 131,0
optionalChildren [
*67 (CommentText
uid 133,0
shape (Rectangle
uid 134,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "36000,45000,53000,46000"
)
oxt "18000,70000,35000,71000"
text (MLText
uid 135,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,45000,50000,46000"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*68 (CommentText
uid 136,0
shape (Rectangle
uid 137,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "53000,41000,57000,42000"
)
oxt "35000,66000,39000,67000"
text (MLText
uid 138,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "53200,41000,56800,42000"
st "
Project:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*69 (CommentText
uid 139,0
shape (Rectangle
uid 140,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "36000,43000,53000,44000"
)
oxt "18000,68000,35000,69000"
text (MLText
uid 141,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,43000,52400,44000"
st "
<enter diagram title here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*70 (CommentText
uid 142,0
shape (Rectangle
uid 143,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,43000,36000,44000"
)
oxt "14000,68000,18000,69000"
text (MLText
uid 144,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "32200,43000,35800,44000"
st "
Title:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*71 (CommentText
uid 145,0
shape (Rectangle
uid 146,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "53000,42000,73000,46000"
)
oxt "35000,67000,55000,71000"
text (MLText
uid 147,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "53200,42200,66400,43200"
st "
<enter comments here>
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 20000
)
ignorePrefs 1
titleBlock 1
)
*72 (CommentText
uid 148,0
shape (Rectangle
uid 149,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "57000,41000,73000,42000"
)
oxt "39000,66000,55000,67000"
text (MLText
uid 150,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "57200,41000,59000,42000"
st "
%project_name
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 16000
)
position 1
ignorePrefs 1
titleBlock 1
)
*73 (CommentText
uid 151,0
shape (Rectangle
uid 152,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,41000,53000,43000"
)
oxt "14000,66000,35000,68000"
text (MLText
uid 153,0
va (VaSet
fg "32768,0,0"
)
xt "38000,41500,47000,42500"
st "
<company name>
"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 2000
visibleWidth 21000
)
position 1
ignorePrefs 1
titleBlock 1
)
*74 (CommentText
uid 154,0
shape (Rectangle
uid 155,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,44000,36000,45000"
)
oxt "14000,69000,18000,70000"
text (MLText
uid 156,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "32200,44000,35200,45000"
st "
Path:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*75 (CommentText
uid 157,0
shape (Rectangle
uid 158,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,45000,36000,46000"
)
oxt "14000,70000,18000,71000"
text (MLText
uid 159,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "32200,45000,35800,46000"
st "
Edited:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*76 (CommentText
uid 160,0
shape (Rectangle
uid 161,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "36000,44000,53000,45000"
)
oxt "18000,69000,35000,70000"
text (MLText
uid 162,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,44000,46400,45000"
st "
%library/%unit/%view
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
]
shape (GroupingShape
uid 132,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "32000,41000,73000,46000"
)
oxt "14000,66000,55000,71000"
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "65535,0,0"
)
packageList *77 (PackageList
uid 5,0
stg "VerticalLayoutStrategy"
textVec [
*78 (Text
uid 40,0
va (VaSet
font "courier,8,1"
)
xt "0,-3000,5400,-2000"
st "Package List"
blo "0,-2200"
)
*79 (MLText
uid 41,0
va (VaSet
)
xt "0,-2000,18600,2000"
st "LIBRARY ieee;
  USE ieee.std_logic_1164.all;
LIBRARY gates;
  USE gates.gates.all;"
tm "PackageList"
)
]
)
windowSize "3,38,1382,918"
viewArea "-1100,-4100,76620,45346"
cachedDiagramExtent "0,-3000,162250,46000"
hasePageBreakOrigin 1
pageBreakOrigin "0,-3000"
defaultCommentText (CommentText
shape (Rectangle
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2600,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 14000
)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
layer 0
va (VaSet
vasetType 1
fg "59904,39936,65280"
lineColor "0,0,32768"
)
xt "0,0,1500,1750"
iconName "reqTracerRequirement.bmp"
iconMaskName "reqTracerRequirement.msk"
)
autoResize 1
text (MLText
va (VaSet
fg "0,0,32768"
font "courier,8,0"
)
xt "450,2150,1450,3050"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "courier,8,1"
)
xt "1350,1100,4150,2100"
st "Panel0"
blo "1350,1900"
tm "PanelText"
)
)
)
parentGraphicsRef (HdmGraphicsRef
libraryName ""
entityName ""
viewName ""
)
defaultSymbolBody (SymbolBody
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,16000,43000,36000"
)
biTextGroup (BiTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
font "courier,8,1"
)
xt "26910,24700,30510,25700"
st "<library>"
blo "26910,25500"
)
second (Text
va (VaSet
font "courier,8,1"
)
xt "26910,25700,29510,26700"
st "<cell>"
blo "26910,26500"
)
)
gi *80 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
)
xt "20000,5000,20000,5000"
)
header "Generic Declarations"
)
elements [
]
)
portInstanceVis (PortSigDisplay
sT 1
sIVOD 1
)
portVis (PortSigDisplay
sIVOD 1
)
)
defaultCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,8,0"
)
xt "0,750,1500,1650"
st "In0"
blo "0,1450"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "courier,8,0"
)
)
thePort (LogicalPort
lang 11
decl (Decl
n "In0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
defaultCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,8,0"
)
xt "0,750,3500,1650"
st "Buffer0"
blo "0,1450"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "courier,8,0"
)
)
thePort (LogicalPort
lang 11
m 3
decl (Decl
n "Buffer0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
DeclarativeBlock *81 (SymDeclBlock
uid 31,0
stg "SymDeclLayoutStrategy"
declLabel (Text
uid 2,0
va (VaSet
font "courier,8,1"
)
xt "0,7800,5400,8800"
st "Declarations"
blo "0,8600"
)
portLabel (Text
uid 2,0
va (VaSet
font "courier,8,1"
)
xt "0,8800,2700,9800"
st "Ports:"
blo "0,9600"
)
externalLabel (Text
uid 2,0
va (VaSet
font "courier,8,1"
)
xt "0,12500,2500,13400"
st "User:"
blo "0,13200"
)
internalLabel (Text
uid 2,0
va (VaSet
isHidden 1
font "courier,8,1"
)
xt "0,15900,5800,16900"
st "Internal User:"
blo "0,16700"
)
externalText (MLText
uid 3,0
va (VaSet
font "courier,8,0"
)
xt "2000,13400,2000,13400"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
uid 4,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "2000,17600,2000,17600"
tm "SyDeclarativeTextMgr"
)
)
lastUid 238,0
activeModelName "Symbol"
)