mirror of
https://github.com/Klagarge/Cursor.git
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1949 lines
23 KiB
Plaintext
1949 lines
23 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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itemName "ALL"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "24.1"
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appVersion "2009.2 (Build 10)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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ordering 1
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suid 24,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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uid 21,0
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optionalChildren [
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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*8 (NameColHdr
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tm "NameColHdrMgr"
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tm "ModeColHdrMgr"
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tm "TypeColHdrMgr"
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)
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tm "BoundsColHdrMgr"
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)
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tm "InitColHdrMgr"
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)
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*13 (EolColHdr
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tm "EolColHdrMgr"
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)
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port (LogicalPort
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m 1
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decl (Decl
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n "A0"
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t "std_ulogic"
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o 5
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suid 1,0
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)
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)
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uid 126,0
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)
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*15 (LogPort
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port (LogicalPort
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decl (Decl
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n "clock"
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t "std_ulogic"
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suid 3,0
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)
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)
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uid 130,0
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)
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*16 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "CS_n"
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t "std_ulogic"
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o 6
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suid 4,0
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)
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)
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uid 132,0
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)
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*17 (LogPort
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port (LogicalPort
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decl (Decl
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n "reset"
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t "std_ulogic"
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o 2
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suid 7,0
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)
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)
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uid 138,0
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)
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*18 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "RST_n"
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t "std_ulogic"
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o 7
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suid 8,0
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)
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)
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uid 140,0
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)
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*19 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "SCL"
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t "std_ulogic"
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o 4
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suid 9,0
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)
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)
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uid 142,0
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)
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*20 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "SI"
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t "std_ulogic"
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o 3
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suid 10,0
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)
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)
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uid 144,0
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)
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*21 (LogPort
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port (LogicalPort
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decl (Decl
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n "data"
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t "std_ulogic_vector"
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b "(dataBitNb-1 DOWNTO 0)"
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o 8
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suid 11,0
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)
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)
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uid 398,0
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)
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*22 (LogPort
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port (LogicalPort
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decl (Decl
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n "send"
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t "std_ulogic"
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o 9
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suid 17,0
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)
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)
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uid 478,0
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)
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*23 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "busy"
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t "std_ulogic"
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o 10
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suid 19,0
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)
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)
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uid 508,0
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)
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]
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)
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pdm (PhysicalDM
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displayShortBounds 1
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editShortBounds 1
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uid 34,0
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optionalChildren [
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*24 (Sheet
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sheetRow (SheetRow
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headerVa (MVa
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cellColor "49152,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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cellVa (MVa
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cellColor "65535,65535,65535"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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groupVa (MVa
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cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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emptyMRCItem *25 (MRCItem
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litem &1
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pos 10
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dimension 20
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)
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uid 36,0
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optionalChildren [
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*26 (MRCItem
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litem &2
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pos 0
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dimension 20
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uid 37,0
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)
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*27 (MRCItem
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litem &3
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pos 1
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dimension 23
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uid 38,0
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)
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*28 (MRCItem
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litem &4
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pos 2
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hidden 1
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dimension 20
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uid 39,0
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)
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*29 (MRCItem
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litem &14
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pos 0
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dimension 20
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uid 127,0
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)
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*30 (MRCItem
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litem &15
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pos 1
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dimension 20
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uid 131,0
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)
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*31 (MRCItem
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litem &16
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pos 2
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dimension 20
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uid 133,0
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)
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*32 (MRCItem
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litem &17
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pos 3
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dimension 20
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uid 139,0
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)
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*33 (MRCItem
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litem &18
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pos 4
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dimension 20
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uid 141,0
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)
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*34 (MRCItem
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litem &19
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pos 5
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dimension 20
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uid 143,0
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)
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*35 (MRCItem
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litem &20
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pos 6
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dimension 20
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uid 145,0
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)
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*36 (MRCItem
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litem &21
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pos 7
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dimension 20
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uid 399,0
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)
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*37 (MRCItem
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litem &22
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pos 8
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dimension 20
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uid 479,0
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)
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*38 (MRCItem
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litem &23
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pos 9
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dimension 20
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uid 509,0
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)
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]
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)
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sheetCol (SheetCol
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propVa (MVa
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cellColor "0,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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uid 40,0
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optionalChildren [
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*39 (MRCItem
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litem &5
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pos 0
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dimension 20
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uid 41,0
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)
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*40 (MRCItem
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litem &7
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pos 1
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dimension 50
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uid 42,0
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)
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*41 (MRCItem
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litem &8
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pos 2
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dimension 100
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uid 43,0
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)
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*42 (MRCItem
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litem &9
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pos 3
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dimension 50
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uid 44,0
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)
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*43 (MRCItem
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litem &10
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pos 4
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dimension 100
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uid 45,0
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)
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*44 (MRCItem
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litem &11
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pos 5
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dimension 100
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uid 46,0
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)
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*45 (MRCItem
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litem &12
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pos 6
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dimension 50
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uid 47,0
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)
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*46 (MRCItem
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litem &13
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pos 7
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dimension 80
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uid 48,0
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)
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]
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)
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fixedCol 4
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fixedRow 2
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name "Ports"
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uid 35,0
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vaOverrides [
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]
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)
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]
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)
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uid 20,0
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)
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genericsCommonDM (CommonDM
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ldm (LogicalDM
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emptyRow *47 (LEmptyRow
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)
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uid 50,0
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optionalChildren [
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*48 (RefLabelRowHdr
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)
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*49 (TitleRowHdr
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)
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*50 (FilterRowHdr
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)
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*51 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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*52 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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*53 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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*54 (NameColHdr
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tm "GenericNameColHdrMgr"
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)
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*55 (TypeColHdr
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tm "GenericTypeColHdrMgr"
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)
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*56 (InitColHdr
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tm "GenericValueColHdrMgr"
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)
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*57 (PragmaColHdr
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tm "GenericPragmaColHdrMgr"
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)
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*58 (EolColHdr
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tm "GenericEolColHdrMgr"
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)
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*59 (LogGeneric
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generic (GiElement
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name "baudRateDivide"
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type "integer"
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value "2"
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)
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uid 170,0
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)
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*60 (LogGeneric
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generic (GiElement
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name "dataBitNb"
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type "positive"
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value "9"
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)
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uid 197,0
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)
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]
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)
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pdm (PhysicalDM
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displayShortBounds 1
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editShortBounds 1
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uid 62,0
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optionalChildren [
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*61 (Sheet
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sheetRow (SheetRow
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headerVa (MVa
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cellColor "49152,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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cellVa (MVa
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cellColor "65535,65535,65535"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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groupVa (MVa
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cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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emptyMRCItem *62 (MRCItem
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litem &47
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pos 2
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dimension 20
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)
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uid 64,0
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optionalChildren [
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*63 (MRCItem
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litem &48
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pos 0
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dimension 20
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uid 65,0
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)
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*64 (MRCItem
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litem &49
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pos 1
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dimension 23
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uid 66,0
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)
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*65 (MRCItem
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litem &50
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pos 2
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hidden 1
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dimension 20
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uid 67,0
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)
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*66 (MRCItem
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litem &59
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pos 1
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dimension 20
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uid 171,0
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)
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*67 (MRCItem
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litem &60
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pos 0
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dimension 20
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uid 198,0
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)
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]
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)
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sheetCol (SheetCol
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propVa (MVa
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cellColor "0,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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uid 68,0
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optionalChildren [
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*68 (MRCItem
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litem &51
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pos 0
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dimension 20
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uid 69,0
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)
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*69 (MRCItem
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litem &53
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pos 1
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dimension 50
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uid 70,0
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)
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*70 (MRCItem
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litem &54
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pos 2
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dimension 100
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uid 71,0
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)
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*71 (MRCItem
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litem &55
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pos 3
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dimension 100
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uid 72,0
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)
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*72 (MRCItem
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litem &56
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pos 4
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dimension 50
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uid 73,0
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)
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*73 (MRCItem
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litem &57
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pos 5
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dimension 50
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uid 74,0
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)
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*74 (MRCItem
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litem &58
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pos 6
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dimension 80
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uid 75,0
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)
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]
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)
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fixedCol 3
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fixedRow 2
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name "Ports"
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uid 63,0
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vaOverrides [
|
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]
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)
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]
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)
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uid 49,0
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type 1
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)
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VExpander (VariableExpander
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|
vvMap [
|
|
(vvPair
|
|
variable " "
|
|
value " "
|
|
)
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds\\lcd@serializer\\symbol.sb.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds\\lcd@serializer\\symbol.sb.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "ADC"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds\\lcd@serializer"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds\\lcdSerializer"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "12.07.2013"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "ven."
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "vendredi"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "12"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "lcdSerializer"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
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|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
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|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
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|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
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|
variable "host"
|
|
value "WE3673"
|
|
)
|
|
(vvPair
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|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
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|
variable "library"
|
|
value "Lcd"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Concatenation"
|
|
value "$HDS_PROJECT_DIR/../libs/SPI/concat"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../libs/SPI/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/$DESIGN_NAME/Lcd/work"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "07"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "lcdSerializer"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "juil."
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
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value "juillet"
|
|
)
|
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|
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variable "p"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds\\lcd@serializer\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "D:\\Labs\\LCD\\..\\Libs\\Lcd\\hds\\lcdSerializer\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_ADMS"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
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value "<TBD>"
|
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|
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|
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variable "task_HDSPath"
|
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value "$HDS_HOME"
|
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|
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(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
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|
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variable "task_ISEPath"
|
|
value "$SCRATCH_DIR\\$DESIGN_NAME\\$ISE_WORK_DIR"
|
|
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|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
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|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
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|
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variable "task_NC"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
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(vvPair
|
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variable "task_QuestaSimPath"
|
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value "<TBD>"
|
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|
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(vvPair
|
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variable "task_VCSPath"
|
|
value "<TBD>"
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|
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|
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variable "this_ext"
|
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value "sb"
|
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variable "this_file"
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value "symbol"
|
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value "symbol"
|
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|
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variable "time"
|
|
value "15:35:23"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "lcdSerializer"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2009.2 (Build 10)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2013"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "13"
|
|
)
|
|
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|
xt "2000,4200,2000,4200"
|
|
tm "SyDeclarativeTextMgr"
|
|
)
|
|
internalText (MLText
|
|
uid 7,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,-7400,0,-7400"
|
|
tm "SyDeclarativeTextMgr"
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|
)
|
|
)
|
|
lastUid 969,0
|
|
activeModelName "Symbol"
|
|
)
|