mirror of
https://github.com/Klagarge/Cursor.git
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2252 lines
28 KiB
Plaintext
2252 lines
28 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "26.1"
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appVersion "2018.1 (Build 12)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 2019,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 313,0
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optionalChildren [
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*2 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "reset"
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t "std_ulogic"
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o 2
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suid 2,0
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)
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)
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uid 315,0
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)
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*3 (LogPort
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port (LogicalPort
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|
m 1
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decl (Decl
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n "txWr1"
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t "std_ulogic"
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o 13
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suid 12,0
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)
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)
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uid 316,0
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)
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*4 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "rxData1"
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t "std_ulogic_vector"
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b "(dataBitNb-1 DOWNTO 0)"
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o 3
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suid 9,0
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)
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)
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|
uid 318,0
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)
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*5 (LogPort
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port (LogicalPort
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|
m 1
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|
decl (Decl
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n "rxRd1"
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t "std_ulogic"
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o 9
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suid 11,0
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)
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)
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|
uid 319,0
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)
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|
*6 (LogPort
|
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port (LogicalPort
|
|
decl (Decl
|
|
n "txFull1"
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|
t "std_ulogic"
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|
o 7
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suid 10,0
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)
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)
|
|
uid 321,0
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)
|
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*7 (LogPort
|
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port (LogicalPort
|
|
decl (Decl
|
|
n "rxEmpty1"
|
|
t "std_ulogic"
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|
o 5
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suid 8,0
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)
|
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)
|
|
uid 322,0
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)
|
|
*8 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
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|
o 1
|
|
suid 1,0
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)
|
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)
|
|
uid 323,0
|
|
)
|
|
*9 (RefLabelRowHdr
|
|
)
|
|
*10 (TitleRowHdr
|
|
)
|
|
*11 (FilterRowHdr
|
|
)
|
|
*12 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*13 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*14 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*15 (NameColHdr
|
|
tm "NameColHdrMgr"
|
|
)
|
|
*16 (ModeColHdr
|
|
tm "ModeColHdrMgr"
|
|
)
|
|
*17 (TypeColHdr
|
|
tm "TypeColHdrMgr"
|
|
)
|
|
*18 (BoundsColHdr
|
|
tm "BoundsColHdrMgr"
|
|
)
|
|
*19 (InitColHdr
|
|
tm "InitColHdrMgr"
|
|
)
|
|
*20 (EolColHdr
|
|
tm "EolColHdrMgr"
|
|
)
|
|
*21 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "txData1"
|
|
t "std_ulogic_vector"
|
|
b "(dataBitNb-1 DOWNTO 0)"
|
|
o 11
|
|
suid 2013,0
|
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)
|
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)
|
|
uid 411,0
|
|
)
|
|
*22 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "rxRd2"
|
|
t "std_ulogic"
|
|
o 10
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suid 2014,0
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)
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)
|
|
uid 413,0
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|
)
|
|
*23 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "rxData2"
|
|
t "std_ulogic_vector"
|
|
b "(dataBitNb-1 DOWNTO 0)"
|
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o 4
|
|
suid 2015,0
|
|
)
|
|
)
|
|
uid 415,0
|
|
)
|
|
*24 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "txData2"
|
|
t "std_ulogic_vector"
|
|
b "(dataBitNb-1 DOWNTO 0)"
|
|
o 12
|
|
suid 2016,0
|
|
)
|
|
)
|
|
uid 417,0
|
|
)
|
|
*25 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "txFull2"
|
|
t "std_ulogic"
|
|
o 8
|
|
suid 2017,0
|
|
)
|
|
)
|
|
uid 419,0
|
|
)
|
|
*26 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "rxEmpty2"
|
|
t "std_ulogic"
|
|
o 6
|
|
suid 2018,0
|
|
)
|
|
)
|
|
uid 421,0
|
|
)
|
|
*27 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "txWr2"
|
|
t "std_ulogic"
|
|
o 14
|
|
suid 2019,0
|
|
)
|
|
)
|
|
uid 423,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 326,0
|
|
optionalChildren [
|
|
*28 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
)
|
|
emptyMRCItem *29 (MRCItem
|
|
litem &1
|
|
pos 14
|
|
dimension 20
|
|
)
|
|
uid 245,0
|
|
optionalChildren [
|
|
*30 (MRCItem
|
|
litem &9
|
|
pos 0
|
|
dimension 20
|
|
uid 248,0
|
|
)
|
|
*31 (MRCItem
|
|
litem &10
|
|
pos 1
|
|
dimension 23
|
|
uid 250,0
|
|
)
|
|
*32 (MRCItem
|
|
litem &11
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 252,0
|
|
)
|
|
*33 (MRCItem
|
|
litem &2
|
|
pos 1
|
|
dimension 20
|
|
uid 272,0
|
|
)
|
|
*34 (MRCItem
|
|
litem &3
|
|
pos 6
|
|
dimension 20
|
|
uid 273,0
|
|
)
|
|
*35 (MRCItem
|
|
litem &4
|
|
pos 3
|
|
dimension 20
|
|
uid 275,0
|
|
)
|
|
*36 (MRCItem
|
|
litem &5
|
|
pos 5
|
|
dimension 20
|
|
uid 276,0
|
|
)
|
|
*37 (MRCItem
|
|
litem &6
|
|
pos 4
|
|
dimension 20
|
|
uid 278,0
|
|
)
|
|
*38 (MRCItem
|
|
litem &7
|
|
pos 2
|
|
dimension 20
|
|
uid 279,0
|
|
)
|
|
*39 (MRCItem
|
|
litem &8
|
|
pos 0
|
|
dimension 20
|
|
uid 280,0
|
|
)
|
|
*40 (MRCItem
|
|
litem &21
|
|
pos 7
|
|
dimension 20
|
|
uid 412,0
|
|
)
|
|
*41 (MRCItem
|
|
litem &22
|
|
pos 8
|
|
dimension 20
|
|
uid 414,0
|
|
)
|
|
*42 (MRCItem
|
|
litem &23
|
|
pos 9
|
|
dimension 20
|
|
uid 416,0
|
|
)
|
|
*43 (MRCItem
|
|
litem &24
|
|
pos 10
|
|
dimension 20
|
|
uid 418,0
|
|
)
|
|
*44 (MRCItem
|
|
litem &25
|
|
pos 11
|
|
dimension 20
|
|
uid 420,0
|
|
)
|
|
*45 (MRCItem
|
|
litem &26
|
|
pos 12
|
|
dimension 20
|
|
uid 422,0
|
|
)
|
|
*46 (MRCItem
|
|
litem &27
|
|
pos 13
|
|
dimension 20
|
|
uid 424,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 246,0
|
|
optionalChildren [
|
|
*47 (MRCItem
|
|
litem &12
|
|
pos 0
|
|
dimension 20
|
|
uid 254,0
|
|
)
|
|
*48 (MRCItem
|
|
litem &14
|
|
pos 1
|
|
dimension 50
|
|
uid 258,0
|
|
)
|
|
*49 (MRCItem
|
|
litem &15
|
|
pos 2
|
|
dimension 100
|
|
uid 260,0
|
|
)
|
|
*50 (MRCItem
|
|
litem &16
|
|
pos 3
|
|
dimension 50
|
|
uid 262,0
|
|
)
|
|
*51 (MRCItem
|
|
litem &17
|
|
pos 4
|
|
dimension 100
|
|
uid 264,0
|
|
)
|
|
*52 (MRCItem
|
|
litem &18
|
|
pos 5
|
|
dimension 100
|
|
uid 266,0
|
|
)
|
|
*53 (MRCItem
|
|
litem &19
|
|
pos 6
|
|
dimension 50
|
|
uid 268,0
|
|
)
|
|
*54 (MRCItem
|
|
litem &20
|
|
pos 7
|
|
dimension 80
|
|
uid 270,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 244,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 312,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *55 (LEmptyRow
|
|
)
|
|
uid 328,0
|
|
optionalChildren [
|
|
*56 (RefLabelRowHdr
|
|
)
|
|
*57 (TitleRowHdr
|
|
)
|
|
*58 (FilterRowHdr
|
|
)
|
|
*59 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*60 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*61 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*62 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*63 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*64 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*65 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*66 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
*67 (LogGeneric
|
|
generic (GiElement
|
|
name "dataBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 308,0
|
|
)
|
|
*68 (LogGeneric
|
|
generic (GiElement
|
|
name "fifoDepth"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 309,0
|
|
)
|
|
*69 (LogGeneric
|
|
generic (GiElement
|
|
name "firstWordFallThrough"
|
|
type "boolean"
|
|
value "false"
|
|
e "first byte written into the FIFO immediately appears on the output"
|
|
)
|
|
uid 566,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
uid 329,0
|
|
optionalChildren [
|
|
*70 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
)
|
|
emptyMRCItem *71 (MRCItem
|
|
litem &55
|
|
pos 2
|
|
dimension 20
|
|
)
|
|
uid 284,0
|
|
optionalChildren [
|
|
*72 (MRCItem
|
|
litem &56
|
|
pos 0
|
|
dimension 20
|
|
uid 287,0
|
|
)
|
|
*73 (MRCItem
|
|
litem &57
|
|
pos 1
|
|
dimension 23
|
|
uid 289,0
|
|
)
|
|
*74 (MRCItem
|
|
litem &58
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 291,0
|
|
)
|
|
*75 (MRCItem
|
|
litem &67
|
|
pos 0
|
|
dimension 20
|
|
uid 310,0
|
|
)
|
|
*76 (MRCItem
|
|
litem &68
|
|
pos 1
|
|
dimension 20
|
|
uid 311,0
|
|
)
|
|
*77 (MRCItem
|
|
litem &69
|
|
pos 2
|
|
dimension 20
|
|
uid 565,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "courier,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 285,0
|
|
optionalChildren [
|
|
*78 (MRCItem
|
|
litem &59
|
|
pos 0
|
|
dimension 20
|
|
uid 293,0
|
|
)
|
|
*79 (MRCItem
|
|
litem &61
|
|
pos 1
|
|
dimension 50
|
|
uid 297,0
|
|
)
|
|
*80 (MRCItem
|
|
litem &62
|
|
pos 2
|
|
dimension 100
|
|
uid 299,0
|
|
)
|
|
*81 (MRCItem
|
|
litem &63
|
|
pos 3
|
|
dimension 100
|
|
uid 301,0
|
|
)
|
|
*82 (MRCItem
|
|
litem &64
|
|
pos 4
|
|
dimension 50
|
|
uid 303,0
|
|
)
|
|
*83 (MRCItem
|
|
litem &65
|
|
pos 5
|
|
dimension 50
|
|
uid 305,0
|
|
)
|
|
*84 (MRCItem
|
|
litem &66
|
|
pos 6
|
|
dimension 80
|
|
uid 307,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 283,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 327,0
|
|
type 1
|
|
)
|
|
VExpander (VariableExpander
|
|
vvMap [
|
|
(vvPair
|
|
variable " "
|
|
value " "
|
|
)
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds/fifo@bridge/symbol.sb.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds/fifo@bridge/symbol.sb.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_%(view)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds/fifo@bridge"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds/fifoBridge"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "08/28/19"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "Wed"
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "Wednesday"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "28"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "fifoBridge"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_author"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_date"
|
|
value "08/28/19"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_group"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_host"
|
|
value "Aphelia"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_time"
|
|
value "13:45:15"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "Aphelia"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "Memory"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Concatenation"
|
|
value "U:/ELN_Board/Synthesis"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Generic_1_file"
|
|
value "D:\\Users\\FCo HEVs\\Projets\\OCT\\Technique\\VHDL\\Synthesis"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../Demo/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSim"
|
|
value "D:\\Users\\ELN_labs\\VHDL_comp"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/Libs/Memory/work"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_SpyGlass"
|
|
value "D:\\Users\\FCo HEVs\\Projets\\OCT\\Technique\\VHDL\\Synthesis"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "08"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "fifoBridge"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "Aug"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "August"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds/fifo@bridge/symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "/home/francois/Documents/HEVs/Kart/eln_kart/04-Controller/../Libs/Memory/hds/fifoBridge/symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$ISE_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_NC-SimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "sb"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "13:45:15"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "fifoBridge"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "francois"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2018.1 (Build 12)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2019"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "19"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "Vhdl2008LangMgr"
|
|
uid 51,0
|
|
optionalChildren [
|
|
*85 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*86 (CptPort
|
|
uid 173,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 174,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,32625,40000,33375"
|
|
)
|
|
tg (CPTG
|
|
uid 175,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 176,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,32400,44400,33600"
|
|
st "clock"
|
|
blo "41000,33400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 177,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,7800,18000,8700"
|
|
st "clock : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 1
|
|
suid 1,0
|
|
)
|
|
)
|
|
)
|
|
*87 (CptPort
|
|
uid 178,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 179,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,34625,40000,35375"
|
|
)
|
|
tg (CPTG
|
|
uid 180,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 181,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,34400,44300,35600"
|
|
st "reset"
|
|
blo "41000,35400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 182,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,8700,18000,9600"
|
|
st "reset : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 2
|
|
suid 2,0
|
|
)
|
|
)
|
|
)
|
|
*88 (CptPort
|
|
uid 215,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 216,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,6625,40000,7375"
|
|
)
|
|
tg (CPTG
|
|
uid 217,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 218,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,6400,46600,7600"
|
|
st "rxEmpty1"
|
|
blo "41000,7400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 219,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,11400,18000,12300"
|
|
st "rxEmpty1 : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "rxEmpty1"
|
|
t "std_ulogic"
|
|
o 5
|
|
suid 8,0
|
|
)
|
|
)
|
|
)
|
|
*89 (CptPort
|
|
uid 220,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 448,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,4625,40000,5375"
|
|
)
|
|
tg (CPTG
|
|
uid 222,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 223,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,4400,45800,5600"
|
|
st "rxData1"
|
|
blo "41000,5400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 224,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,9600,32500,10500"
|
|
st "rxData1 : IN std_ulogic_vector (dataBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "rxData1"
|
|
t "std_ulogic_vector"
|
|
b "(dataBitNb-1 DOWNTO 0)"
|
|
o 3
|
|
suid 9,0
|
|
)
|
|
)
|
|
)
|
|
*90 (CptPort
|
|
uid 225,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 226,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,12625,40000,13375"
|
|
)
|
|
tg (CPTG
|
|
uid 227,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 228,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
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xt "41000,12400,45200,13600"
|
|
st "txFull1"
|
|
blo "41000,13400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 229,0
|
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va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,13200,18000,14100"
|
|
st "txFull1 : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "txFull1"
|
|
t "std_ulogic"
|
|
o 7
|
|
suid 10,0
|
|
)
|
|
)
|
|
)
|
|
*91 (CptPort
|
|
uid 230,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 231,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,8625,40000,9375"
|
|
)
|
|
tg (CPTG
|
|
uid 232,0
|
|
ps "CptPortTextPlaceStrategy"
|
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stg "VerticalLayoutStrategy"
|
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f (Text
|
|
uid 233,0
|
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va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,8400,44700,9600"
|
|
st "rxRd1"
|
|
blo "41000,9400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 234,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,15000,18000,15900"
|
|
st "rxRd1 : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "rxRd1"
|
|
t "std_ulogic"
|
|
o 9
|
|
suid 11,0
|
|
)
|
|
)
|
|
)
|
|
*92 (CptPort
|
|
uid 235,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 236,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,14625,40000,15375"
|
|
)
|
|
tg (CPTG
|
|
uid 237,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
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f (Text
|
|
uid 238,0
|
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va (VaSet
|
|
font "courier,9,0"
|
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)
|
|
xt "41000,14400,44700,15600"
|
|
st "txWr1"
|
|
blo "41000,15400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 239,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
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)
|
|
xt "2000,18600,18000,19500"
|
|
st "txWr1 : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "txWr1"
|
|
t "std_ulogic"
|
|
o 13
|
|
suid 12,0
|
|
)
|
|
)
|
|
)
|
|
*93 (CptPort
|
|
uid 376,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 449,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,10625,40000,11375"
|
|
)
|
|
tg (CPTG
|
|
uid 378,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 379,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,10400,45800,11600"
|
|
st "txData1"
|
|
blo "41000,11400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 380,0
|
|
va (VaSet
|
|
font "courier,8,0"
|
|
)
|
|
xt "2000,16800,32500,17700"
|
|
st "txData1 : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "txData1"
|
|
t "std_ulogic_vector"
|
|
b "(dataBitNb-1 DOWNTO 0)"
|
|
o 11
|
|
suid 2013,0
|
|
)
|
|
)
|
|
)
|
|
*94 (CptPort
|
|
uid 381,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 382,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "39250,22625,40000,23375"
|
|
)
|
|
tg (CPTG
|
|
uid 383,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 384,0
|
|
va (VaSet
|
|
font "courier,9,0"
|
|
)
|
|
xt "41000,22400,44700,23600"
|
|
st "rxRd2"
|
|
blo "41000,23400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 385,0
|
|
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