FILE_NAMING_RULE: %(unit).psl
DESCRIPTION_START
This is the default template used for the creation of PSL Vunit (Verilog) files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
//
// PSL Vunit(Verilog Syntax)
//
// Created:
//          by - %(user).%(group) (%(host))
//          at - %(time) %(date)
//
// using Mentor Graphics HDL Designer(TM) %(version)
//

vunit %(view) (%(unit))
{
    default clock = ClockName;
    
}