architecture studentVersion of ex_24_1_1 is

  signal counter : unsigned(counterBitNb-1 downto 0);

begin

  process(clock, reset) begin
    if reset = '1' then 
      counter <= (others => '0');
    elsif rising_edge(clock) then 
      if en = '1' then
        if up_down = '1' then
          counter <= counter + 1;
        else
          counter <= counter -1;
        end if;
      end if;
    end if;
  end process;

  position <= counter;
end studentVersion;