-- VHDL Entity WaveformGenerator.lowpass.symbol
--
-- Created:
--          by - remi.heredero.UNKNOWN (WE2330808)
--          at - 15:16:08 01.03.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;

ENTITY lowpass IS
    GENERIC( 
        signalBitNb : positive := 16;
        shiftBitNb  : positive := 12
    );
    PORT( 
        lowpassOut : OUT    unsigned (signalBitNb-1 DOWNTO 0);
        clock      : IN     std_ulogic;
        reset      : IN     std_ulogic;
        lowpassIn  : IN     unsigned (signalBitNb-1 DOWNTO 0)
    );

-- Declarations

END lowpass ;

