--
-- VHDL Architecture WaveformGenerator.waveformGen.struct
--
-- Created:
--          by - remi.heredero.UNKNOWN (WE2330808)
--          at - 15:15:34 01.03.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;

LIBRARY WaveformGenerator;

ARCHITECTURE struct OF waveformGen IS

    -- Architecture declarations

    -- Internal signal declarations

    -- Implicit buffer signal declarations
    SIGNAL polygon_internal  : unsigned (signalBitNb-1 DOWNTO 0);
    SIGNAL sawtooth_internal : unsigned (phaseBitNb-1 DOWNTO 0);
    SIGNAL triangle_internal : unsigned (signalBitNb-1 DOWNTO 0);


    -- Component Declarations
    COMPONENT lowpass
    GENERIC (
        signalBitNb : positive := 16;
        shiftBitNb  : positive := 6
    );
    PORT (
        lowpassOut : OUT    unsigned (signalBitNb-1 DOWNTO 0);
        clock      : IN     std_ulogic ;
        reset      : IN     std_ulogic ;
        lowpassIn  : IN     unsigned (signalBitNb-1 DOWNTO 0)
    );
    END COMPONENT;
    COMPONENT sawtoothGen
    GENERIC (
        bitNb : positive := 16
    );
    PORT (
        sawtooth : OUT    unsigned (bitNb-1 DOWNTO 0);
        clock    : IN     std_ulogic ;
        reset    : IN     std_ulogic ;
        step     : IN     unsigned (bitNb-1 DOWNTO 0);
        en       : IN     std_ulogic 
    );
    END COMPONENT;
    COMPONENT sawtoothToSquare
    GENERIC (
        bitNb : positive := 16
    );
    PORT (
        square   : OUT    unsigned (bitNb-1 DOWNTO 0);
        sawtooth : IN     unsigned (bitNb-1 DOWNTO 0)
    );
    END COMPONENT;
    COMPONENT sawtoothToTriangle
    GENERIC (
        bitNb : positive := 16
    );
    PORT (
        triangle : OUT    unsigned (bitNb-1 DOWNTO 0);
        sawtooth : IN     unsigned (bitNb-1 DOWNTO 0)
    );
    END COMPONENT;
    COMPONENT triangleToPolygon
    GENERIC (
        bitNb : positive := 16
    );
    PORT (
        polygon  : OUT    unsigned (bitNb-1 DOWNTO 0);
        triangle : IN     unsigned (bitNb-1 DOWNTO 0)
    );
    END COMPONENT;

    -- Optional embedded configurations
    -- pragma synthesis_off
    FOR ALL : lowpass USE ENTITY WaveformGenerator.lowpass;
    FOR ALL : sawtoothGen USE ENTITY WaveformGenerator.sawtoothGen;
    FOR ALL : sawtoothToSquare USE ENTITY WaveformGenerator.sawtoothToSquare;
    FOR ALL : sawtoothToTriangle USE ENTITY WaveformGenerator.sawtoothToTriangle;
    FOR ALL : triangleToPolygon USE ENTITY WaveformGenerator.triangleToPolygon;
    -- pragma synthesis_on


BEGIN

    -- Instance port mappings.
    I_lp : lowpass
        GENERIC MAP (
            signalBitNb => signalBitNb,
            shiftBitNb  => 10
        )
        PORT MAP (
            lowpassOut => sine,
            clock      => clock,
            reset      => reset,
            lowpassIn  => polygon_internal
        );
    I_saw : sawtoothGen
        GENERIC MAP (
            bitNb => phaseBitNb
        )
        PORT MAP (
            sawtooth => sawtooth_internal,
            clock    => clock,
            reset    => reset,
            step     => step,
            en       => en
        );
    I_square : sawtoothToSquare
        GENERIC MAP (
            bitNb => signalBitNb
        )
        PORT MAP (
            square   => square,
            sawtooth => sawtooth_internal
        );
    I_tri : sawtoothToTriangle
        GENERIC MAP (
            bitNb => signalBitNb
        )
        PORT MAP (
            triangle => triangle_internal,
            sawtooth => sawtooth_internal
        );
    I_poly : triangleToPolygon
        GENERIC MAP (
            bitNb => signalBitNb
        )
        PORT MAP (
            polygon  => polygon_internal,
            triangle => triangle_internal
        );

    -- Implicit buffered output assignments
    polygon  <= polygon_internal;
    sawtooth <= sawtooth_internal;
    triangle <= triangle_internal;

END struct;
