28 lines
629 B
Plaintext
28 lines
629 B
Plaintext
|
-- VHDL Entity SplineInterpolator.sineTable.symbol
|
||
|
|
--
|
||
|
|
-- Created:
|
||
|
|
-- by - francois.francois (Aphelia)
|
||
|
|
-- at - 13:00:46 02/19/19
|
||
|
|
--
|
||
|
|
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
|
||
|
|
--
|
||
|
|
LIBRARY ieee;
|
||
|
|
USE ieee.std_logic_1164.all;
|
||
|
|
USE ieee.numeric_std.all;
|
||
|
|
|
||
|
|
ENTITY sineTable IS
|
||
|
|
GENERIC(
|
||
|
|
inputBitNb : positive := 16;
|
||
|
|
outputBitNb : positive := 16;
|
||
|
|
tableAddressBitNb : positive := 3
|
||
|
|
);
|
||
|
|
PORT(
|
||
|
|
sine : OUT signed (outputBitNb-1 DOWNTO 0);
|
||
|
|
phase : IN unsigned (inputBitNb-1 DOWNTO 0)
|
||
|
|
);
|
||
|
|
|
||
|
|
-- Declarations
|
||
|
|
|
||
|
|
END sineTable ;
|
||
|
|
|