2090 lines
26 KiB
Plaintext
2090 lines
26 KiB
Plaintext
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DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "AhbLite"
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unitName "ahbLite"
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)
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]
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libraryRefs [
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"ieee"
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"AhbLite"
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]
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)
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version "24.1"
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appVersion "2009.2 (Build 10)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 2067,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 320,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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||
|
*4 (FilterRowHdr
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)
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||
|
*5 (RefLabelColHdr
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|
tm "RefLabelColHdrMgr"
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)
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|
*6 (RowExpandColHdr
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|
tm "RowExpandColHdrMgr"
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)
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|
*7 (GroupColHdr
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|
tm "GroupColHdrMgr"
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)
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|
*8 (NameColHdr
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tm "NameColHdrMgr"
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)
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|
*9 (ModeColHdr
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tm "ModeColHdrMgr"
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)
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|
*10 (TypeColHdr
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tm "TypeColHdrMgr"
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)
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|
*11 (BoundsColHdr
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||
|
tm "BoundsColHdrMgr"
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|
)
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|
*12 (InitColHdr
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|
tm "InitColHdrMgr"
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|
)
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|
*13 (EolColHdr
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|
tm "EolColHdrMgr"
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|
)
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|
*14 (LogPort
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|
port (LogicalPort
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decl (Decl
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|
n "hAddr"
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|
t "unsigned"
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|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
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|
o 1
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suid 2051,0
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)
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)
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uid 2524,0
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|
)
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|
*15 (LogPort
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port (LogicalPort
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|
decl (Decl
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|
n "hWData"
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|
t "std_ulogic_vector"
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||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
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|
o 3
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suid 2053,0
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)
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)
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|
uid 2526,0
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)
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|
*16 (LogPort
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
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||
|
n "hRData"
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|
t "std_ulogic_vector"
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||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
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||
|
o 6
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|
suid 2054,0
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||
|
)
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||
|
)
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||
|
uid 2528,0
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||
|
)
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|
*17 (LogPort
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|
port (LogicalPort
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||
|
decl (Decl
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||
|
n "hWrite"
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||
|
t "std_uLogic"
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|
o 4
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|
suid 2055,0
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|
)
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)
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|
uid 2530,0
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||
|
)
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|
*18 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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||
|
n "hTrans"
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||
|
t "std_ulogic_vector"
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|
b "(ahbTransBitNb-1 DOWNTO 0)"
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|
o 2
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|
suid 2059,0
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)
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|
)
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|
uid 2538,0
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|
)
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|
*19 (LogPort
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
|
||
|
n "hReady"
|
||
|
t "std_uLogic"
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||
|
o 7
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|
suid 2061,0
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|
)
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|
)
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|
uid 2542,0
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||
|
)
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||
|
*20 (LogPort
|
||
|
port (LogicalPort
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||
|
m 1
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|
decl (Decl
|
||
|
n "hResp"
|
||
|
t "std_uLogic"
|
||
|
o 9
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|
suid 2062,0
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|
)
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|
)
|
||
|
uid 2544,0
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||
|
)
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||
|
*21 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hClk"
|
||
|
t "std_uLogic"
|
||
|
o 5
|
||
|
suid 2063,0
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||
|
)
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|
)
|
||
|
uid 2546,0
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||
|
)
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||
|
*22 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hReset_n"
|
||
|
t "std_uLogic"
|
||
|
o 8
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|
suid 2064,0
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|
)
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|
)
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|
uid 2548,0
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||
|
)
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|
*23 (LogPort
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||
|
port (LogicalPort
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||
|
m 1
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||
|
decl (Decl
|
||
|
n "TxD"
|
||
|
t "std_ulogic"
|
||
|
o 10
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|
suid 2065,0
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||
|
)
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)
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||
|
uid 2656,0
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||
|
)
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|
*24 (LogPort
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||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hSel"
|
||
|
t "std_uLogic"
|
||
|
o 11
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||
|
suid 2066,0
|
||
|
)
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||
|
)
|
||
|
uid 2697,0
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||
|
)
|
||
|
*25 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "RxD"
|
||
|
t "std_ulogic"
|
||
|
o 12
|
||
|
suid 2067,0
|
||
|
)
|
||
|
)
|
||
|
uid 2844,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 333,0
|
||
|
optionalChildren [
|
||
|
*26 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *27 (MRCItem
|
||
|
litem &1
|
||
|
pos 12
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 254,0
|
||
|
optionalChildren [
|
||
|
*28 (MRCItem
|
||
|
litem &2
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 257,0
|
||
|
)
|
||
|
*29 (MRCItem
|
||
|
litem &3
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 259,0
|
||
|
)
|
||
|
*30 (MRCItem
|
||
|
litem &4
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 261,0
|
||
|
)
|
||
|
*31 (MRCItem
|
||
|
litem &14
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 2525,0
|
||
|
)
|
||
|
*32 (MRCItem
|
||
|
litem &15
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 2527,0
|
||
|
)
|
||
|
*33 (MRCItem
|
||
|
litem &16
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 2529,0
|
||
|
)
|
||
|
*34 (MRCItem
|
||
|
litem &17
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 2531,0
|
||
|
)
|
||
|
*35 (MRCItem
|
||
|
litem &18
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 2539,0
|
||
|
)
|
||
|
*36 (MRCItem
|
||
|
litem &19
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 2543,0
|
||
|
)
|
||
|
*37 (MRCItem
|
||
|
litem &20
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
uid 2545,0
|
||
|
)
|
||
|
*38 (MRCItem
|
||
|
litem &21
|
||
|
pos 7
|
||
|
dimension 20
|
||
|
uid 2547,0
|
||
|
)
|
||
|
*39 (MRCItem
|
||
|
litem &22
|
||
|
pos 8
|
||
|
dimension 20
|
||
|
uid 2549,0
|
||
|
)
|
||
|
*40 (MRCItem
|
||
|
litem &23
|
||
|
pos 9
|
||
|
dimension 20
|
||
|
uid 2657,0
|
||
|
)
|
||
|
*41 (MRCItem
|
||
|
litem &24
|
||
|
pos 10
|
||
|
dimension 20
|
||
|
uid 2698,0
|
||
|
)
|
||
|
*42 (MRCItem
|
||
|
litem &25
|
||
|
pos 11
|
||
|
dimension 20
|
||
|
uid 2845,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 255,0
|
||
|
optionalChildren [
|
||
|
*43 (MRCItem
|
||
|
litem &5
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 263,0
|
||
|
)
|
||
|
*44 (MRCItem
|
||
|
litem &7
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 267,0
|
||
|
)
|
||
|
*45 (MRCItem
|
||
|
litem &8
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 269,0
|
||
|
)
|
||
|
*46 (MRCItem
|
||
|
litem &9
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 271,0
|
||
|
)
|
||
|
*47 (MRCItem
|
||
|
litem &10
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 273,0
|
||
|
)
|
||
|
*48 (MRCItem
|
||
|
litem &11
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 275,0
|
||
|
)
|
||
|
*49 (MRCItem
|
||
|
litem &12
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 277,0
|
||
|
)
|
||
|
*50 (MRCItem
|
||
|
litem &13
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 279,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 253,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 319,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *51 (LEmptyRow
|
||
|
)
|
||
|
uid 335,0
|
||
|
optionalChildren [
|
||
|
*52 (RefLabelRowHdr
|
||
|
)
|
||
|
*53 (TitleRowHdr
|
||
|
)
|
||
|
*54 (FilterRowHdr
|
||
|
)
|
||
|
*55 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*56 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*57 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*58 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*59 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*60 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*61 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*62 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
*63 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "txFifoDepth"
|
||
|
type "positive"
|
||
|
value "8"
|
||
|
)
|
||
|
uid 2658,0
|
||
|
)
|
||
|
*64 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "rxFifoDepth"
|
||
|
type "positive"
|
||
|
value "1"
|
||
|
)
|
||
|
uid 2791,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 336,0
|
||
|
optionalChildren [
|
||
|
*65 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *66 (MRCItem
|
||
|
litem &51
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 293,0
|
||
|
optionalChildren [
|
||
|
*67 (MRCItem
|
||
|
litem &52
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 296,0
|
||
|
)
|
||
|
*68 (MRCItem
|
||
|
litem &53
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 298,0
|
||
|
)
|
||
|
*69 (MRCItem
|
||
|
litem &54
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 300,0
|
||
|
)
|
||
|
*70 (MRCItem
|
||
|
litem &63
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 2659,0
|
||
|
)
|
||
|
*71 (MRCItem
|
||
|
litem &64
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 2792,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 294,0
|
||
|
optionalChildren [
|
||
|
*72 (MRCItem
|
||
|
litem &55
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 302,0
|
||
|
)
|
||
|
*73 (MRCItem
|
||
|
litem &57
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 306,0
|
||
|
)
|
||
|
*74 (MRCItem
|
||
|
litem &58
|
||
|
pos 2
|
||
|
dimension 199
|
||
|
uid 308,0
|
||
|
)
|
||
|
*75 (MRCItem
|
||
|
litem &59
|
||
|
pos 3
|
||
|
dimension 100
|
||
|
uid 310,0
|
||
|
)
|
||
|
*76 (MRCItem
|
||
|
litem &60
|
||
|
pos 4
|
||
|
dimension 50
|
||
|
uid 312,0
|
||
|
)
|
||
|
*77 (MRCItem
|
||
|
litem &61
|
||
|
pos 5
|
||
|
dimension 50
|
||
|
uid 314,0
|
||
|
)
|
||
|
*78 (MRCItem
|
||
|
litem &62
|
||
|
pos 6
|
||
|
dimension 309
|
||
|
uid 316,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 292,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 334,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable " "
|
||
|
value " "
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart\\symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart\\symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "asm_file"
|
||
|
value "nanoTest.asm"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahbUart"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "03.03.2015"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "mar."
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "mardi"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "03"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "ahbUart"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "WE3673"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "AhbLiteComponents"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Concatenation"
|
||
|
value "U:/ELN_Board/Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Generic_1_file"
|
||
|
value "U:\\ELN_Board\\Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_HdsLintPlugin"
|
||
|
value "$HDS_PROJECT_DIR/../NanoBlaze/designcheck"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSim"
|
||
|
value "D:\\Users\\ELN_labs\\VHDL_comp"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/Libs/AhbLiteComponents/work"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_SpyGlass"
|
||
|
value "U:\\ELN_Board\\Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "03"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "ahbUart"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "mars"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "mars"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahb@uart\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "D:\\Labs\\SEm_labs\\..\\Libs\\AhbLiteComponents\\hds\\ahbUart\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds-beamer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ADMS"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_DesignCompilerPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$ISE_SCRATCH_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_LeonardoPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME\\win32"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC-SimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_PrecisionRTLPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_QuestaSimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_VCSPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "08:32:23"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "ahbUart"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2009.2 (Build 10)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2015"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "15"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "VhdlLangMgr"
|
||
|
uid 51,0
|
||
|
optionalChildren [
|
||
|
*79 (SymbolBody
|
||
|
uid 8,0
|
||
|
optionalChildren [
|
||
|
*80 (CptPort
|
||
|
uid 2452,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2683,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "46250,19625,47000,20375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2454,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2455,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "48000,19300,52500,20700"
|
||
|
st "hAddr"
|
||
|
blo "48000,20500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2456,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,12200,33500,13000"
|
||
|
st "hAddr : IN unsigned ( ahbAddressBitNb-1 DOWNTO 0 ) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hAddr"
|
||
|
t "unsigned"
|
||
|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
|
||
|
o 1
|
||
|
suid 2051,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*81 (CptPort
|
||
|
uid 2464,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2684,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "46250,21625,47000,22375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2466,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2467,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "48000,21300,53900,22700"
|
||
|
st "hWData"
|
||
|
blo "48000,22500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2468,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,16200,35500,17000"
|
||
|
st "hWData : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hWData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 3
|
||
|
suid 2053,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*82 (CptPort
|
||
|
uid 2469,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2685,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "46250,29625,47000,30375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2471,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2472,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "48000,29300,53400,30700"
|
||
|
st "hRData"
|
||
|
blo "48000,30500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2473,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,18600,35500,19400"
|
||
|
st "hRData : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hRData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 6
|
||
|
suid 2054,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*83 (CptPort
|
||
|
uid 2474,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2686,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "46250,25625,47000,26375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2476,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2477,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "48000,25300,53000,26700"
|
||
|
st "hWrite"
|
||
|
blo "48000,26500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2478,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,17000,19000,17800"
|
||
|
st "hWrite : IN std_uLogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hWrite"
|
||
|
t "std_uLogic"
|
||
|
o 4
|
||
|
suid 2055,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*84 (CptPort
|
||
|
uid 2494,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2687,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "46250,23625,47000,24375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2496,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2497,0
|
||
|
va (VaSet
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font "Verdana,12,0"
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)
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xt "48000,23300,53100,24700"
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st "hTrans"
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blo "48000,24500"
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tm "CptPortNameMgr"
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)
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dt (MLText
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uid 2498,0
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va (VaSet
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font "Courier New,8,0"
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)
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st "hTrans : IN std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0) ;"
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)
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thePort (LogicalPort
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||
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decl (Decl
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n "hTrans"
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||
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t "std_ulogic_vector"
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||
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b "(ahbTransBitNb-1 DOWNTO 0)"
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||
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suid 2059,0
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)
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)
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)
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*85 (CptPort
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uid 2504,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2688,0
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ro 270
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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)
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tg (CPTG
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uid 2506,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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uid 2507,0
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va (VaSet
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)
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st "hReady"
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blo "48000,32500"
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tm "CptPortNameMgr"
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)
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dt (MLText
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uid 2508,0
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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m 1
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decl (Decl
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n "hReady"
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t "std_uLogic"
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suid 2061,0
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)
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)
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)
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*86 (CptPort
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uid 2509,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2689,0
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ro 270
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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)
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tg (CPTG
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uid 2511,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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uid 2512,0
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va (VaSet
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)
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st "hResp"
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blo "48000,34500"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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uid 2513,0
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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m 1
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decl (Decl
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n "hResp"
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t "std_uLogic"
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suid 2062,0
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)
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)
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)
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*87 (CptPort
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uid 2514,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2690,0
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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)
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tg (CPTG
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||
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uid 2516,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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uid 2517,0
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va (VaSet
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font "Verdana,12,0"
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)
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st "hClk"
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blo "48000,38500"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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||
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uid 2518,0
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va (VaSet
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font "Courier New,8,0"
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)
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st "hClk : IN std_uLogic ;"
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)
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thePort (LogicalPort
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decl (Decl
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n "hClk"
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t "std_uLogic"
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suid 2063,0
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)
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||
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)
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)
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*88 (CptPort
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uid 2519,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2691,0
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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)
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tg (CPTG
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||
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uid 2521,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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uid 2522,0
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va (VaSet
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font "Verdana,12,0"
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)
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st "hReset_n"
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blo "48000,40500"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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uid 2523,0
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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decl (Decl
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n "hReset_n"
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t "std_uLogic"
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o 8
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suid 2064,0
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||
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)
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||
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)
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)
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*89 (CptPort
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uid 2651,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2652,0
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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)
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tg (CPTG
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uid 2653,0
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ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
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f (Text
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uid 2654,0
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va (VaSet
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font "Verdana,12,0"
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)
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st "TxD"
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ju 2
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blo "62000,20500"
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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||
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uid 2655,0
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va (VaSet
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font "Courier New,8,0"
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)
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st "TxD : OUT std_ulogic ;"
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)
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thePort (LogicalPort
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m 1
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decl (Decl
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|
n "TxD"
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t "std_ulogic"
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o 10
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||
|
suid 2065,0
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||
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)
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||
|
)
|
||
|
)
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||
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*90 (CptPort
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uid 2692,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2693,0
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ro 90
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||
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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)
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tg (CPTG
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uid 2694,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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uid 2695,0
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va (VaSet
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font "Verdana,12,0"
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)
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st "hSel"
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blo "48000,28500"
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tm "CptPortNameMgr"
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)
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)
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||
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dt (MLText
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||
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uid 2696,0
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va (VaSet
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font "Courier New,8,0"
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)
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st "hSel : IN std_uLogic ;"
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)
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thePort (LogicalPort
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||
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decl (Decl
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|
n "hSel"
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t "std_uLogic"
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o 11
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||
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suid 2066,0
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)
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||
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)
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||
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)
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*91 (CptPort
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uid 2839,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2869,0
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ro 270
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va (VaSet
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fg "0,65535,0"
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)
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)
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tg (CPTG
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uid 2841,0
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ps "CptPortTextPlaceStrategy"
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f (Text
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uid 2842,0
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va (VaSet
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)
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st "RxD"
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ju 2
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blo "62000,22500"
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tm "CptPortNameMgr"
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)
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)
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||
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dt (MLText
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uid 2843,0
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va (VaSet
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font "Courier New,8,0"
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)
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)
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thePort (LogicalPort
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decl (Decl
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|
n "RxD"
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t "std_ulogic"
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o 12
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||
|
suid 2067,0
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)
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||
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)
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||
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)
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shape (Rectangle
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uid 9,0
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va (VaSet
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biTextGroup (BiTextGroup
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uid 10,0
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stg "VerticalLayoutStrategy"
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uid 11,0
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va (VaSet
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second (Text
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uid 12,0
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va (VaSet
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)
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st "ahbUart"
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blo "47100,43500"
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)
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gi *92 (GenericInterface
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uid 13,0
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ps "CenterOffsetStrategy"
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matrix (Matrix
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uid 14,0
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text (MLText
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uid 15,0
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va (VaSet
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font "Courier New,8,0"
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)
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st "Generic Declarations
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|
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txFifoDepth positive 8
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rxFifoDepth positive 1
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"
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)
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header "Generic Declarations"
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|
showHdrWhenContentsEmpty 1
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)
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elements [
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(GiElement
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name "txFifoDepth"
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type "positive"
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value "8"
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name "rxFifoDepth"
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value "1"
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)
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)
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portInstanceVis (PortSigDisplay
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sTC 0
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sT 1
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)
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portVis (PortSigDisplay
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sTC 0
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sF 0
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)
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*93 (Grouping
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uid 136,0
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uid 138,0
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shape (Rectangle
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uid 139,0
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sl 0
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va (VaSet
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text (MLText
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uid 140,0
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va (VaSet
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)
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tm "CommentText"
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uid 141,0
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shape (Rectangle
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uid 142,0
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sl 0
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va (VaSet
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uid 143,0
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va (VaSet
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)
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Project:
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tm "CommentText"
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)
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uid 144,0
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shape (Rectangle
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uid 145,0
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va (VaSet
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fg "65280,65280,46080"
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)
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)
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oxt "18000,68000,35000,69000"
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text (MLText
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uid 146,0
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va (VaSet
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bg "0,0,32768"
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)
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<enter diagram title here>
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tm "CommentText"
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externalText (MLText
|
||
|
uid 5,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,22000,2000,22000"
|
||
|
tm "SyDeclarativeTextMgr"
|
||
|
)
|
||
|
internalText (MLText
|
||
|
uid 7,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "0,9400,0,9400"
|
||
|
tm "SyDeclarativeTextMgr"
|
||
|
)
|
||
|
)
|
||
|
lastUid 2869,0
|
||
|
okToSyncOnLoad 1
|
||
|
OkToSyncGenericsOnLoad 1
|
||
|
activeModelName "Symbol"
|
||
|
)
|