3698 lines
45 KiB
Plaintext
3698 lines
45 KiB
Plaintext
|
DocumentHdrVersion "1.1"
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||
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Header (DocumentHdr
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|
version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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|
)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "AhbLite"
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unitName "ahbLite"
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)
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]
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instances [
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(Instance
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|
name "I_tester"
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duLibraryName "AhbLiteComponents_test"
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|
duName "ahbUart_tester"
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|
elements [
|
||
|
(GiElement
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||
|
name "clockFrequency"
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|
type "real"
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||
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value "clockFrequency"
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)
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]
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mwi 0
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|
uid 12657,0
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||
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)
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(Instance
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||
|
name "I_DUT"
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|
duLibraryName "AhbLiteComponents"
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||
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duName "ahbUart"
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|
elements [
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||
|
(GiElement
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||
|
name "txFifoDepth"
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||
|
type "positive"
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||
|
value "txFifoDepth"
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||
|
)
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||
|
(GiElement
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||
|
name "rxFifoDepth"
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||
|
type "positive"
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||
|
value "rxFifoDepth"
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||
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)
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||
|
]
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||
|
mwi 0
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||
|
uid 13707,0
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||
|
)
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]
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libraryRefs [
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"ieee"
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"AhbLite"
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]
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)
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|
version "32.1"
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appVersion "2019.2 (Build 5)"
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|
noEmbeddedEditors 1
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|
model (BlockDiag
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||
|
VExpander (VariableExpander
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||
|
vvMap [
|
||
|
(vvPair
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||
|
variable " "
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||
|
value " "
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||
|
)
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||
|
(vvPair
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||
|
variable "HDLDir"
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||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hdl"
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|
)
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||
|
(vvPair
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||
|
variable "HDSDir"
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||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
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)
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||
|
(vvPair
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||
|
variable "SideDataDesignDir"
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|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@uart_tb\\struct.bd.info"
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|
)
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||
|
(vvPair
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||
|
variable "SideDataUserDir"
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|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@uart_tb\\struct.bd.user"
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||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
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||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
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|
)
|
||
|
(vvPair
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||
|
variable "appl"
|
||
|
value "HDL Designer"
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||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "struct"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "asm_file"
|
||
|
value "beamer.asm"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@uart_tb"
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||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbUart_tb"
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||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "28.04.2023"
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||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "ven."
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||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "vendredi"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "28"
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||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "ahbUart_tb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "struct.bd"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "struct.bd"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "struct"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_author"
|
||
|
value "axel.amand"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_date"
|
||
|
value "28.04.2023"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_host"
|
||
|
value "WE7860"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_time"
|
||
|
value "15:07:00"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "WE7860"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "AhbLiteComponents_test"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSim"
|
||
|
value "D:\\Users\\ELN_labs\\VHDL_comp"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/AhbLiteComponents_test"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "04"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "ahbUart_tb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "avr."
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "avril"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@uart_tb\\struct.bd"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbUart_tb\\struct.bd"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ADMS"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_AsmPath"
|
||
|
value "$HDS_LIBS_DIR\\NanoBlaze\\hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_DesignCompilerPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$ISE_SCRATCH_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_LeonardoPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME\\win32"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC-SimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_PrecisionRTLPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_QuestaSimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_VCSPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "bd"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "struct"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "struct"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "15:07:00"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "ahbUart_tb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "axel.amand"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2019.2 (Build 5)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "struct"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2023"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "23"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "Vhdl2008LangMgr"
|
||
|
uid 198,0
|
||
|
optionalChildren [
|
||
|
*1 (Grouping
|
||
|
uid 1487,0
|
||
|
optionalChildren [
|
||
|
*2 (CommentText
|
||
|
uid 1489,0
|
||
|
shape (Rectangle
|
||
|
uid 1490,0
|
||
|
sl 0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65280,65280,46080"
|
||
|
)
|
||
|
xt "119000,85000,138000,87000"
|
||
|
)
|
||
|
oxt "45000,22000,64000,24000"
|
||
|
text (MLText
|
||
|
uid 1491,0
|
||
|
va (VaSet
|
||
|
fg "0,0,32768"
|
||
|
bg "0,0,32768"
|
||
|
)
|
||
|
xt "119200,85400,134600,86600"
|
||
|
st "
|
||
|
<enter project name here>
|
||
|
"
|
||
|
tm "CommentText"
|
||
|
wrapOption 3
|
||
|
visibleHeight 1600
|
||
|
visibleWidth 18600
|
||
|
)
|
||
|
position 1
|
||
|
ignorePrefs 1
|
||
|
)
|
||
|
*3 (CommentText
|
||
|
uid 1492,0
|
||
|
shape (Rectangle
|
||
|
uid 1493,0
|
||
|
sl 0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65280,65280,46080"
|
||
|
)
|
||
|
xt "87000,85000,113000,87000"
|
||
|
)
|
||
|
oxt "13000,22000,39000,24000"
|
||
|
text (MLText
|
||
|
uid 1494,0
|
||
|
va (VaSet
|
||
|
fg "32768,0,0"
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||
|
font "Arial,12,1"
|
||
|
)
|
||
|
xt "94250,85250,105750,86750"
|
||
|
st "
|
||
|
<company name>
|
||
|
"
|
||
|
ju 0
|
||
|
tm "CommentText"
|
||
|
wrapOption 3
|
||
|
visibleHeight 1600
|
||
|
visibleWidth 25600
|
||
|
)
|
||
|
position 1
|
||
|
ignorePrefs 1
|
||
|
)
|
||
|
*4 (CommentText
|
||
|
uid 1495,0
|
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|
shape (Rectangle
|
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uid 1496,0
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|
sl 0
|
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|
va (VaSet
|
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|
vasetType 1
|
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|
fg "65280,65280,46080"
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|
)
|
||
|
xt "92000,91000,113000,93000"
|
||
|
)
|
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|
oxt "18000,28000,39000,30000"
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|
text (MLText
|
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|
uid 1497,0
|
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|
va (VaSet
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fg "0,0,32768"
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bg "0,0,32768"
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|
)
|
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|
xt "92200,91400,105900,92600"
|
||
|
st "
|
||
|
by %user on %dd %month %year
|
||
|
"
|
||
|
tm "CommentText"
|
||
|
wrapOption 3
|
||
|
visibleHeight 1600
|
||
|
visibleWidth 20600
|
||
|
)
|
||
|
position 1
|
||
|
ignorePrefs 1
|
||
|
)
|
||
|
*5 (CommentText
|
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|
uid 1498,0
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|
shape (Rectangle
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uid 1499,0
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sl 0
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va (VaSet
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|
vasetType 1
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fg "65280,65280,46080"
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)
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xt "113000,85000,119000,87000"
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oxt "39000,22000,45000,24000"
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|
text (MLText
|
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|
uid 1500,0
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|
va (VaSet
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|
fg "0,0,32768"
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|
bg "0,0,32768"
|
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|
)
|
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|
xt "113200,85400,117900,86600"
|
||
|
st "
|
||
|
Project:
|
||
|
"
|
||
|
tm "CommentText"
|
||
|
wrapOption 3
|
||
|
visibleHeight 1600
|
||
|
visibleWidth 5600
|
||
|
)
|
||
|
position 1
|
||
|
ignorePrefs 1
|
||
|
)
|
||
|
*6 (CommentText
|
||
|
uid 1501,0
|
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|
shape (Rectangle
|
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|
uid 1502,0
|
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|
sl 0
|
||
|
va (VaSet
|
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|
vasetType 1
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|
fg "65280,65280,46080"
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)
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|
xt "92000,87000,113000,89000"
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|
)
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|
oxt "18000,24000,39000,26000"
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|
text (MLText
|
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|
uid 1503,0
|
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|
va (VaSet
|
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|
fg "0,0,32768"
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|
bg "0,0,32768"
|
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|
)
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|
xt "92200,87400,107400,88600"
|
||
|
st "
|
||
|
<enter diagram title here>
|
||
|
"
|
||
|
tm "CommentText"
|
||
|
wrapOption 3
|
||
|
visibleHeight 1600
|
||
|
visibleWidth 20600
|
||
|
)
|
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|
position 1
|
||
|
ignorePrefs 1
|
||
|
)
|
||
|
*7 (CommentText
|
||
|
uid 1504,0
|
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|
shape (Rectangle
|
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|
uid 1505,0
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|
sl 0
|
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|
va (VaSet
|
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|
vasetType 1
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|
fg "65280,65280,46080"
|
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|
)
|
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|
xt "87000,87000,92000,89000"
|
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|
)
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|
oxt "13000,24000,18000,26000"
|
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|
text (MLText
|
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|
uid 1506,0
|
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|
va (VaSet
|
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tm "CommentText"
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tm "CommentText"
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tm "CommentText"
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va (VaSet
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)
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tm "CommentText"
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oxt "13000,28000,18000,30000"
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text (MLText
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uid 1518,0
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va (VaSet
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bg "0,0,32768"
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)
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xt "87200,91400,91500,92600"
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st "
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tm "CommentText"
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visibleWidth 4600
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position 1
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ignorePrefs 1
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shape (GroupingShape
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uid 1488,0
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va (VaSet
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lineStyle 2
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)
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xt "87000,85000,138000,93000"
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)
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oxt "13000,22000,64000,30000"
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*12 (Net
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uid 12555,0
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decl (Decl
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n "hReset_n"
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t "std_uLogic"
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suid 108,0
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)
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declText (MLText
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uid 12556,0
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va (VaSet
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font "Courier New,9,0"
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)
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"
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)
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)
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*13 (Net
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uid 12563,0
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decl (Decl
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|
n "hClk"
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|
t "std_uLogic"
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o 4
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||
|
suid 109,0
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|
)
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declText (MLText
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uid 12564,0
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va (VaSet
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font "Courier New,9,0"
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)
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xt "0,0,15500,1200"
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st "SIGNAL hClk : std_uLogic
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"
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)
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)
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*14 (Net
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uid 12571,0
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decl (Decl
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|
n "hResp"
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|
t "std_uLogic"
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|
o 8
|
||
|
suid 110,0
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|
)
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|
declText (MLText
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uid 12572,0
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va (VaSet
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isHidden 1
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|
font "Courier New,9,0"
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)
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xt "0,0,15500,1200"
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st "SIGNAL hResp : std_uLogic
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"
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|
)
|
||
|
)
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||
|
*15 (Net
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||
|
uid 12579,0
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||
|
decl (Decl
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||
|
n "hReady"
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|
t "std_uLogic"
|
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|
o 6
|
||
|
suid 111,0
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|
)
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||
|
declText (MLText
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||
|
uid 12580,0
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|
va (VaSet
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isHidden 1
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|
font "Courier New,9,0"
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)
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xt "0,0,15500,1200"
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|
st "SIGNAL hReady : std_uLogic
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||
|
"
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||
|
)
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|
)
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||
|
*16 (Net
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uid 12587,0
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|
decl (Decl
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||
|
n "hRData"
|
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|
t "std_ulogic_vector"
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||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 5
|
||
|
suid 112,0
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|
)
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||
|
declText (MLText
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||
|
uid 12588,0
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|
va (VaSet
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|
isHidden 1
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|
font "Courier New,9,0"
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|
)
|
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|
xt "0,0,32000,1200"
|
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|
st "SIGNAL hRData : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0)
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|
"
|
||
|
)
|
||
|
)
|
||
|
*17 (Net
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|
uid 12595,0
|
||
|
decl (Decl
|
||
|
n "hSel"
|
||
|
t "std_uLogic"
|
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|
o 9
|
||
|
suid 113,0
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|
)
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||
|
declText (MLText
|
||
|
uid 12596,0
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|
va (VaSet
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|
isHidden 1
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|
font "Courier New,9,0"
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|
)
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|
xt "0,0,15500,1200"
|
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|
st "SIGNAL hSel : std_uLogic
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*18 (Net
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|
uid 12603,0
|
||
|
decl (Decl
|
||
|
n "hWrite"
|
||
|
t "std_uLogic"
|
||
|
o 12
|
||
|
suid 114,0
|
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|
)
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||
|
declText (MLText
|
||
|
uid 12604,0
|
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|
va (VaSet
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|
isHidden 1
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|
font "Courier New,9,0"
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|
)
|
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|
xt "0,0,15500,1200"
|
||
|
st "SIGNAL hWrite : std_uLogic
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*19 (Net
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|
uid 12611,0
|
||
|
decl (Decl
|
||
|
n "hTrans"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbTransBitNb-1 DOWNTO 0)"
|
||
|
o 10
|
||
|
suid 115,0
|
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|
)
|
||
|
declText (MLText
|
||
|
uid 12612,0
|
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|
va (VaSet
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|
isHidden 1
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|
font "Courier New,9,0"
|
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|
)
|
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|
xt "0,0,32500,1200"
|
||
|
st "SIGNAL hTrans : std_ulogic_vector(ahbTransBitNb-1 DOWNTO 0)
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*20 (Net
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|
uid 12619,0
|
||
|
decl (Decl
|
||
|
n "hWData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 11
|
||
|
suid 116,0
|
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|
)
|
||
|
declText (MLText
|
||
|
uid 12620,0
|
||
|
va (VaSet
|
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|
isHidden 1
|
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|
font "Courier New,9,0"
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|
)
|
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|
xt "0,0,32000,1200"
|
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|
st "SIGNAL hWData : std_ulogic_vector(ahbDataBitNb-1 DOWNTO 0)
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*21 (Net
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|
uid 12627,0
|
||
|
decl (Decl
|
||
|
n "hAddr"
|
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|
t "unsigned"
|
||
|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
|
||
|
o 3
|
||
|
suid 117,0
|
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|
)
|
||
|
declText (MLText
|
||
|
uid 12628,0
|
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|
va (VaSet
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|
isHidden 1
|
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|
font "Courier New,9,0"
|
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|
)
|
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|
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|
||
|
st "SIGNAL hAddr : unsigned( ahbAddressBitNb-1 DOWNTO 0 )
|
||
|
"
|
||
|
)
|
||
|
)
|
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|
*22 (Blk
|
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|
uid 12657,0
|
||
|
shape (Rectangle
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|
uid 12658,0
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|
va (VaSet
|
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|
vasetType 1
|
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|
fg "39936,56832,65280"
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|
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|
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|
)
|
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|
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|
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|
)
|
||
|
oxt "0,0,8000,10000"
|
||
|
ttg (MlTextGroup
|
||
|
uid 12659,0
|
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|
ps "CenterOffsetStrategy"
|
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|
stg "VerticalLayoutStrategy"
|
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|
textVec [
|
||
|
*23 (Text
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|
uid 12660,0
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|
va (VaSet
|
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|
font "Verdana,12,0"
|
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|
)
|
||
|
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|
||
|
st "AhbLiteComponents_test"
|
||
|
blo "57400,76100"
|
||
|
tm "BdLibraryNameMgr"
|
||
|
)
|
||
|
*24 (Text
|
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|
uid 12661,0
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|
va (VaSet
|
||
|
font "Verdana,12,0"
|
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|
)
|
||
|
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|
||
|
st "ahbUart_tester"
|
||
|
blo "57400,77500"
|
||
|
tm "BlkNameMgr"
|
||
|
)
|
||
|
*25 (Text
|
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|
uid 12662,0
|
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|
va (VaSet
|
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|
font "Verdana,12,0"
|
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|
)
|
||
|
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|
||
|
st "I_tester"
|
||
|
blo "57400,78900"
|
||
|
tm "InstanceNameMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
ga (GenericAssociation
|
||
|
uid 12663,0
|
||
|
ps "EdgeToEdgeStrategy"
|
||
|
matrix (Matrix
|
||
|
uid 12664,0
|
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|
text (MLText
|
||
|
uid 12665,0
|
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|
va (VaSet
|
||
|
font "Courier New,8,0"
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|
)
|
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|
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|
||
|
st "clockFrequency = clockFrequency ( real ) "
|
||
|
)
|
||
|
header ""
|
||
|
)
|
||
|
elements [
|
||
|
(GiElement
|
||
|
name "clockFrequency"
|
||
|
type "real"
|
||
|
value "clockFrequency"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
viewicon (ZoomableIcon
|
||
|
uid 12742,0
|
||
|
sl 0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "49152,49152,49152"
|
||
|
)
|
||
|
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|
||
|
iconName "BlockDiagram.png"
|
||
|
iconMaskName "BlockDiagram.msk"
|
||
|
ftype 1
|
||
|
)
|
||
|
viewiconposition 0
|
||
|
)
|
||
|
*26 (Net
|
||
|
uid 13297,0
|
||
|
decl (Decl
|
||
|
n "RxD"
|
||
|
t "std_ulogic"
|
||
|
o 1
|
||
|
suid 118,0
|
||
|
)
|
||
|
declText (MLText
|
||
|
uid 13298,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Courier New,9,0"
|
||
|
)
|
||
|
xt "0,0,15500,1200"
|
||
|
st "SIGNAL RxD : std_ulogic
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*27 (Net
|
||
|
uid 13305,0
|
||
|
decl (Decl
|
||
|
n "TxD"
|
||
|
t "std_ulogic"
|
||
|
o 2
|
||
|
suid 119,0
|
||
|
)
|
||
|
declText (MLText
|
||
|
uid 13306,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Courier New,9,0"
|
||
|
)
|
||
|
xt "0,0,15500,1200"
|
||
|
st "SIGNAL TxD : std_ulogic
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*28 (SaComponent
|
||
|
uid 13707,0
|
||
|
optionalChildren [
|
||
|
*29 (CptPort
|
||
|
uid 13659,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13660,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,36625,87000,37375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13661,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13662,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,36300,92500,37700"
|
||
|
st "hAddr"
|
||
|
blo "88000,37500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hAddr"
|
||
|
t "unsigned"
|
||
|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
|
||
|
o 1
|
||
|
suid 2051,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*30 (CptPort
|
||
|
uid 13663,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13664,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,38625,87000,39375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13665,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13666,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,38300,93900,39700"
|
||
|
st "hWData"
|
||
|
blo "88000,39500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hWData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 3
|
||
|
suid 2053,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*31 (CptPort
|
||
|
uid 13667,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13668,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,46625,87000,47375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13669,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13670,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,46300,93400,47700"
|
||
|
st "hRData"
|
||
|
blo "88000,47500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hRData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 6
|
||
|
suid 2054,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*32 (CptPort
|
||
|
uid 13671,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13672,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,42625,87000,43375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13673,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13674,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,42300,93000,43700"
|
||
|
st "hWrite"
|
||
|
blo "88000,43500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hWrite"
|
||
|
t "std_uLogic"
|
||
|
o 4
|
||
|
suid 2055,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*33 (CptPort
|
||
|
uid 13675,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13676,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,40625,87000,41375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13677,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13678,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,40300,93100,41700"
|
||
|
st "hTrans"
|
||
|
blo "88000,41500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hTrans"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbTransBitNb-1 DOWNTO 0)"
|
||
|
o 2
|
||
|
suid 2059,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*34 (CptPort
|
||
|
uid 13679,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13680,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,48625,87000,49375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13681,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13682,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,48300,93500,49700"
|
||
|
st "hReady"
|
||
|
blo "88000,49500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hReady"
|
||
|
t "std_uLogic"
|
||
|
o 7
|
||
|
suid 2061,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*35 (CptPort
|
||
|
uid 13683,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13684,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,50625,87000,51375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13685,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13686,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,50300,92700,51700"
|
||
|
st "hResp"
|
||
|
blo "88000,51500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hResp"
|
||
|
t "std_uLogic"
|
||
|
o 9
|
||
|
suid 2062,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*36 (CptPort
|
||
|
uid 13687,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13688,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,54625,87000,55375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13689,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13690,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,54300,91500,55700"
|
||
|
st "hClk"
|
||
|
blo "88000,55500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hClk"
|
||
|
t "std_uLogic"
|
||
|
o 5
|
||
|
suid 2063,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*37 (CptPort
|
||
|
uid 13691,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13692,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,56625,87000,57375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13693,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13694,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,56300,94800,57700"
|
||
|
st "hReset_n"
|
||
|
blo "88000,57500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hReset_n"
|
||
|
t "std_uLogic"
|
||
|
o 8
|
||
|
suid 2064,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*38 (CptPort
|
||
|
uid 13695,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13696,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "103000,36625,103750,37375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13697,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13698,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "98900,36300,102000,37700"
|
||
|
st "TxD"
|
||
|
ju 2
|
||
|
blo "102000,37500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "TxD"
|
||
|
t "std_ulogic"
|
||
|
o 10
|
||
|
suid 2065,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*39 (CptPort
|
||
|
uid 13699,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13700,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "86250,44625,87000,45375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13701,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13702,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "88000,44300,91500,45700"
|
||
|
st "hSel"
|
||
|
blo "88000,45500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hSel"
|
||
|
t "std_uLogic"
|
||
|
o 11
|
||
|
suid 2066,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*40 (CptPort
|
||
|
uid 13703,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 13704,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "103000,38625,103750,39375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 13705,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 13706,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "98800,38300,102000,39700"
|
||
|
st "RxD"
|
||
|
ju 2
|
||
|
blo "102000,39500"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "RxD"
|
||
|
t "std_ulogic"
|
||
|
o 12
|
||
|
suid 2067,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
]
|
||
|
shape (Rectangle
|
||
|
uid 13708,0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
lineColor "0,32896,0"
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "87000,33000,103000,59000"
|
||
|
)
|
||
|
oxt "47000,16000,63000,42000"
|
||
|
ttg (MlTextGroup
|
||
|
uid 13709,0
|
||
|
ps "CenterOffsetStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
textVec [
|
||
|
*41 (Text
|
||
|
uid 13710,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "87100,58700,98700,59900"
|
||
|
st "AhbLiteComponents"
|
||
|
blo "87100,59700"
|
||
|
tm "BdLibraryNameMgr"
|
||
|
)
|
||
|
*42 (Text
|
||
|
uid 13711,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "87100,59700,91800,60900"
|
||
|
st "ahbUart"
|
||
|
blo "87100,60700"
|
||
|
tm "CptNameMgr"
|
||
|
)
|
||
|
*43 (Text
|
||
|
uid 13712,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "87100,60700,91200,61900"
|
||
|
st "I_DUT"
|
||
|
blo "87100,61700"
|
||
|
tm "InstanceNameMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
ga (GenericAssociation
|
||
|
uid 13713,0
|
||
|
ps "EdgeToEdgeStrategy"
|
||
|
matrix (Matrix
|
||
|
uid 13714,0
|
||
|
text (MLText
|
||
|
uid 13715,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "87000,63000,110500,64600"
|
||
|
st "txFifoDepth = txFifoDepth ( positive )
|
||
|
rxFifoDepth = rxFifoDepth ( positive ) "
|
||
|
)
|
||
|
header ""
|
||
|
)
|
||
|
elements [
|
||
|
(GiElement
|
||
|
name "txFifoDepth"
|
||
|
type "positive"
|
||
|
value "txFifoDepth"
|
||
|
)
|
||
|
(GiElement
|
||
|
name "rxFifoDepth"
|
||
|
type "positive"
|
||
|
value "rxFifoDepth"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
viewicon (ZoomableIcon
|
||
|
uid 13716,0
|
||
|
sl 0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "49152,49152,49152"
|
||
|
)
|
||
|
xt "87250,57250,88750,58750"
|
||
|
iconName "VhdlFileViewIcon.png"
|
||
|
iconMaskName "VhdlFileViewIcon.msk"
|
||
|
ftype 10
|
||
|
)
|
||
|
viewiconposition 0
|
||
|
portVis (PortSigDisplay
|
||
|
sTC 0
|
||
|
sT 1
|
||
|
)
|
||
|
archFileType "UNKNOWN"
|
||
|
)
|
||
|
*44 (Wire
|
||
|
uid 12557,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12558,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "85000,57000,86250,67000"
|
||
|
pts [
|
||
|
"86250,57000"
|
||
|
"85000,57000"
|
||
|
"85000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &37
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12561,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12562,0
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|
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|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "78250,55600,85050,57000"
|
||
|
st "hReset_n"
|
||
|
blo "78250,56800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &12
|
||
|
)
|
||
|
*45 (Wire
|
||
|
uid 12565,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12566,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "83000,55000,86250,67000"
|
||
|
pts [
|
||
|
"86250,55000"
|
||
|
"83000,55000"
|
||
|
"83000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &36
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12569,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12570,0
|
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|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "81250,53600,84750,55000"
|
||
|
st "hClk"
|
||
|
blo "81250,54800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &13
|
||
|
)
|
||
|
*46 (Wire
|
||
|
uid 12573,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12574,0
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||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "79000,51000,86250,67000"
|
||
|
pts [
|
||
|
"86250,51000"
|
||
|
"79000,51000"
|
||
|
"79000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &35
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12577,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12578,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "80250,49600,84950,51000"
|
||
|
st "hResp"
|
||
|
blo "80250,50800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &14
|
||
|
)
|
||
|
*47 (Wire
|
||
|
uid 12581,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12582,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "77000,49000,86250,67000"
|
||
|
pts [
|
||
|
"86250,49000"
|
||
|
"77000,49000"
|
||
|
"77000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &34
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12585,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12586,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "79250,47600,84750,49000"
|
||
|
st "hReady"
|
||
|
blo "79250,48800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &15
|
||
|
)
|
||
|
*48 (Wire
|
||
|
uid 12589,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12590,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "75000,47000,86250,67000"
|
||
|
pts [
|
||
|
"86250,47000"
|
||
|
"75000,47000"
|
||
|
"75000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &31
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 1
|
||
|
sty 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12593,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12594,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "80250,45600,85650,47000"
|
||
|
st "hRData"
|
||
|
blo "80250,46800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &16
|
||
|
)
|
||
|
*49 (Wire
|
||
|
uid 12597,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12598,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "73000,45000,86250,67000"
|
||
|
pts [
|
||
|
"86250,45000"
|
||
|
"73000,45000"
|
||
|
"73000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &39
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12601,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12602,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "81250,43600,84750,45000"
|
||
|
st "hSel"
|
||
|
blo "81250,44800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &17
|
||
|
)
|
||
|
*50 (Wire
|
||
|
uid 12605,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12606,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "71000,43000,86250,67000"
|
||
|
pts [
|
||
|
"86250,43000"
|
||
|
"71000,43000"
|
||
|
"71000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &32
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12609,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12610,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "80250,41600,85250,43000"
|
||
|
st "hWrite"
|
||
|
blo "80250,42800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &18
|
||
|
)
|
||
|
*51 (Wire
|
||
|
uid 12613,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12614,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "69000,41000,86250,67000"
|
||
|
pts [
|
||
|
"86250,41000"
|
||
|
"69000,41000"
|
||
|
"69000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &33
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
sty 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12617,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12618,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "80250,39600,85350,41000"
|
||
|
st "hTrans"
|
||
|
blo "80250,40800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &19
|
||
|
)
|
||
|
*52 (Wire
|
||
|
uid 12621,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12622,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "67000,39000,86250,67000"
|
||
|
pts [
|
||
|
"86250,39000"
|
||
|
"67000,39000"
|
||
|
"67000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &30
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
sty 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12625,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12626,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "79250,37600,85150,39000"
|
||
|
st "hWData"
|
||
|
blo "79250,38800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &20
|
||
|
)
|
||
|
*53 (Wire
|
||
|
uid 12629,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 12630,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "65000,37000,86250,67000"
|
||
|
pts [
|
||
|
"86250,37000"
|
||
|
"65000,37000"
|
||
|
"65000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &29
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
sty 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 12633,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 12634,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "80250,35600,84750,37000"
|
||
|
st "hAddr"
|
||
|
blo "80250,36800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &21
|
||
|
)
|
||
|
*54 (Wire
|
||
|
uid 13299,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 13300,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "103750,39000,107000,67000"
|
||
|
pts [
|
||
|
"103750,39000"
|
||
|
"107000,39000"
|
||
|
"107000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &40
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 2
|
||
|
stc 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 13303,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 13304,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "105750,37600,108950,39000"
|
||
|
st "RxD"
|
||
|
blo "105750,38800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &26
|
||
|
)
|
||
|
*55 (Wire
|
||
|
uid 13307,0
|
||
|
shape (OrthoPolyLine
|
||
|
uid 13308,0
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
xt "103750,37000,109000,67000"
|
||
|
pts [
|
||
|
"103750,37000"
|
||
|
"109000,37000"
|
||
|
"109000,67000"
|
||
|
]
|
||
|
)
|
||
|
start &38
|
||
|
end &22
|
||
|
sat 32
|
||
|
eat 1
|
||
|
stc 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
uid 13311,0
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
uid 13312,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "105750,35600,108850,37000"
|
||
|
st "TxD"
|
||
|
blo "105750,36800"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
on &27
|
||
|
)
|
||
|
]
|
||
|
bg "65535,65535,65535"
|
||
|
grid (Grid
|
||
|
origin "0,0"
|
||
|
isVisible 0
|
||
|
isActive 1
|
||
|
xSpacing 1000
|
||
|
xySpacing 1000
|
||
|
xShown 1
|
||
|
yShown 1
|
||
|
color "32768,32768,32768"
|
||
|
)
|
||
|
packageList *56 (PackageList
|
||
|
uid 187,0
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
textVec [
|
||
|
*57 (Text
|
||
|
uid 1297,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "29000,19000,35900,20000"
|
||
|
st "Package List"
|
||
|
blo "29000,19800"
|
||
|
)
|
||
|
*58 (MLText
|
||
|
uid 1298,0
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "29000,20000,46500,26000"
|
||
|
st "LIBRARY ieee;
|
||
|
USE ieee.std_logic_1164.all;
|
||
|
USE ieee.numeric_std.all;
|
||
|
LIBRARY AhbLite;
|
||
|
USE AhbLite.ahbLite.all;"
|
||
|
tm "PackageList"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
compDirBlock (MlTextGroup
|
||
|
uid 190,0
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
textVec [
|
||
|
*59 (Text
|
||
|
uid 191,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "arial,10,1"
|
||
|
)
|
||
|
xt "20000,0,31000,1200"
|
||
|
st "Compiler Directives"
|
||
|
blo "20000,1000"
|
||
|
)
|
||
|
*60 (Text
|
||
|
uid 192,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "arial,10,1"
|
||
|
)
|
||
|
xt "20000,1400,33000,2600"
|
||
|
st "Pre-module directives:"
|
||
|
blo "20000,2400"
|
||
|
)
|
||
|
*61 (MLText
|
||
|
uid 193,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "arial,10,0"
|
||
|
)
|
||
|
xt "20000,2800,30400,5400"
|
||
|
st "`resetall
|
||
|
`timescale 1ns/10ps"
|
||
|
tm "BdCompilerDirectivesTextMgr"
|
||
|
)
|
||
|
*62 (Text
|
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|
iconMaskName "UnknownFile.msk"
|
||
|
)
|
||
|
viewiconposition 0
|
||
|
)
|
||
|
defaultEmbeddedText (EmbeddedText
|
||
|
commentText (CommentText
|
||
|
ps "CenterOffsetStrategy"
|
||
|
shape (Rectangle
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
lineColor "0,0,32768"
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "0,0,18000,5000"
|
||
|
)
|
||
|
text (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "200,200,3200,1400"
|
||
|
st "
|
||
|
Text
|
||
|
"
|
||
|
tm "HdlTextMgr"
|
||
|
wrapOption 3
|
||
|
visibleHeight 4600
|
||
|
visibleWidth 17600
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultGlobalConnector (GlobalConnector
|
||
|
shape (Circle
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,0"
|
||
|
)
|
||
|
xt "-1000,-1000,1000,1000"
|
||
|
radius 1000
|
||
|
)
|
||
|
name (Text
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "-750,-600,750,600"
|
||
|
st "G"
|
||
|
blo "-750,400"
|
||
|
)
|
||
|
)
|
||
|
defaultRipper (Ripper
|
||
|
ps "OnConnectorStrategy"
|
||
|
shape (Line2D
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"1000,1000"
|
||
|
]
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
)
|
||
|
xt "0,0,1000,1000"
|
||
|
)
|
||
|
)
|
||
|
defaultBdJunction (BdJunction
|
||
|
ps "OnConnectorStrategy"
|
||
|
shape (Circle
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
)
|
||
|
xt "-400,-400,400,400"
|
||
|
radius 400
|
||
|
)
|
||
|
)
|
||
|
defaultPortIoIn (PortIoIn
|
||
|
shape (CompositeShape
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,0,32768"
|
||
|
)
|
||
|
optionalChildren [
|
||
|
(Pentagon
|
||
|
sl 0
|
||
|
ro 270
|
||
|
xt "-2000,-375,-500,375"
|
||
|
)
|
||
|
(Line
|
||
|
sl 0
|
||
|
ro 270
|
||
|
xt "-500,0,0,0"
|
||
|
pts [
|
||
|
"-500,0"
|
||
|
"0,0"
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
stc 0
|
||
|
sf 1
|
||
|
tg (WTG
|
||
|
ps "PortIoTextPlaceStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "-2875,-375,-2875,-375"
|
||
|
ju 2
|
||
|
blo "-2875,-375"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultPortIoOut (PortIoOut
|
||
|
shape (CompositeShape
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,0,32768"
|
||
|
)
|
||
|
optionalChildren [
|
||
|
(Pentagon
|
||
|
sl 0
|
||
|
ro 270
|
||
|
xt "500,-375,2000,375"
|
||
|
)
|
||
|
(Line
|
||
|
sl 0
|
||
|
ro 270
|
||
|
xt "0,0,500,0"
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"500,0"
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
stc 0
|
||
|
sf 1
|
||
|
tg (WTG
|
||
|
ps "PortIoTextPlaceStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "2875,-375,2875,-375"
|
||
|
blo "2875,-375"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultPortIoInOut (PortIoInOut
|
||
|
shape (CompositeShape
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,0,32768"
|
||
|
)
|
||
|
optionalChildren [
|
||
|
(Hexagon
|
||
|
sl 0
|
||
|
xt "500,-375,2000,375"
|
||
|
)
|
||
|
(Line
|
||
|
sl 0
|
||
|
xt "0,0,500,0"
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"500,0"
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
stc 0
|
||
|
sf 1
|
||
|
tg (WTG
|
||
|
ps "PortIoTextPlaceStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "3000,500,3000,500"
|
||
|
blo "3000,500"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultPortIoBuffer (PortIoBuffer
|
||
|
shape (CompositeShape
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
lineColor "0,0,32768"
|
||
|
)
|
||
|
optionalChildren [
|
||
|
(Hexagon
|
||
|
sl 0
|
||
|
xt "500,-375,2000,375"
|
||
|
)
|
||
|
(Line
|
||
|
sl 0
|
||
|
xt "0,0,500,0"
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"500,0"
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
stc 0
|
||
|
sf 1
|
||
|
tg (WTG
|
||
|
ps "PortIoTextPlaceStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "3000,500,3000,500"
|
||
|
blo "3000,500"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultSignal (Wire
|
||
|
shape (OrthoPolyLine
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
)
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"0,0"
|
||
|
]
|
||
|
)
|
||
|
ss 0
|
||
|
es 0
|
||
|
sat 32
|
||
|
eat 32
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "0,0,3400,1400"
|
||
|
st "sig0"
|
||
|
blo "0,1200"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultBus (Wire
|
||
|
shape (OrthoPolyLine
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
lineWidth 2
|
||
|
)
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"0,0"
|
||
|
]
|
||
|
)
|
||
|
ss 0
|
||
|
es 0
|
||
|
sat 32
|
||
|
eat 32
|
||
|
sty 1
|
||
|
stc 0
|
||
|
st 0
|
||
|
sf 1
|
||
|
si 0
|
||
|
tg (WTG
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "STSignalDisplayStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "0,0,4700,1400"
|
||
|
st "dbus0"
|
||
|
blo "0,1200"
|
||
|
tm "WireNameMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultBundle (Bundle
|
||
|
shape (OrthoPolyLine
|
||
|
va (VaSet
|
||
|
vasetType 3
|
||
|
lineColor "32768,0,0"
|
||
|
lineWidth 2
|
||
|
)
|
||
|
pts [
|
||
|
"0,0"
|
||
|
"0,0"
|
||
|
]
|
||
|
)
|
||
|
ss 0
|
||
|
es 0
|
||
|
sat 32
|
||
|
eat 32
|
||
|
textGroup (BiTextGroup
|
||
|
ps "ConnStartEndStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
first (Text
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,400,3700,1400"
|
||
|
st "bundle0"
|
||
|
blo "0,1200"
|
||
|
tm "BundleNameMgr"
|
||
|
)
|
||
|
second (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,1400,1500,2600"
|
||
|
st "()"
|
||
|
tm "BundleContentsMgr"
|
||
|
)
|
||
|
)
|
||
|
bundleNet &0
|
||
|
)
|
||
|
defaultPortMapFrame (PortMapFrame
|
||
|
ps "PortMapFrameStrategy"
|
||
|
shape (RectFrame
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
lineColor "0,0,32768"
|
||
|
lineWidth 2
|
||
|
)
|
||
|
xt "0,0,10000,12000"
|
||
|
)
|
||
|
portMapText (BiTextGroup
|
||
|
ps "BottomRightOffsetStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
first (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,0,5000,1200"
|
||
|
st "Auto list"
|
||
|
)
|
||
|
second (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,1200,9600,2400"
|
||
|
st "User defined list"
|
||
|
tm "PortMapTextMgr"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultGenFrame (Frame
|
||
|
shape (RectFrame
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
lineColor "26368,26368,26368"
|
||
|
lineStyle 2
|
||
|
lineWidth 3
|
||
|
)
|
||
|
xt "0,0,20000,20000"
|
||
|
)
|
||
|
title (TextAssociate
|
||
|
ps "TopLeftStrategy"
|
||
|
text (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,-1400,18500,-200"
|
||
|
st "g0: FOR i IN 0 TO n GENERATE"
|
||
|
tm "FrameTitleTextMgr"
|
||
|
)
|
||
|
)
|
||
|
seqNum (FrameSequenceNumber
|
||
|
ps "TopLeftStrategy"
|
||
|
shape (Rectangle
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
)
|
||
|
xt "50,50,1050,1750"
|
||
|
)
|
||
|
num (Text
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "150,400,950,1400"
|
||
|
st "1"
|
||
|
blo "150,1200"
|
||
|
tm "FrameSeqNumMgr"
|
||
|
)
|
||
|
)
|
||
|
decls (MlTextGroup
|
||
|
ps "BottomRightOffsetStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
textVec [
|
||
|
*83 (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "11800,20000,21800,21000"
|
||
|
st "Frame Declarations"
|
||
|
blo "11800,20800"
|
||
|
)
|
||
|
*84 (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "11800,21000,11800,21000"
|
||
|
tm "BdFrameDeclTextMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
)
|
||
|
defaultBlockFrame (Frame
|
||
|
shape (RectFrame
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
lineColor "26368,26368,26368"
|
||
|
lineStyle 1
|
||
|
lineWidth 3
|
||
|
)
|
||
|
xt "0,0,20000,20000"
|
||
|
)
|
||
|
title (TextAssociate
|
||
|
ps "TopLeftStrategy"
|
||
|
text (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,-1400,11000,-200"
|
||
|
st "b0: BLOCK (guard)"
|
||
|
tm "FrameTitleTextMgr"
|
||
|
)
|
||
|
)
|
||
|
seqNum (FrameSequenceNumber
|
||
|
ps "TopLeftStrategy"
|
||
|
shape (Rectangle
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
)
|
||
|
xt "50,50,1050,1750"
|
||
|
)
|
||
|
num (Text
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "150,400,950,1400"
|
||
|
st "1"
|
||
|
blo "150,1200"
|
||
|
tm "FrameSeqNumMgr"
|
||
|
)
|
||
|
)
|
||
|
decls (MlTextGroup
|
||
|
ps "BottomRightOffsetStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
textVec [
|
||
|
*85 (Text
|
||
|
va (VaSet
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "11800,20000,21800,21000"
|
||
|
st "Frame Declarations"
|
||
|
blo "11800,20800"
|
||
|
)
|
||
|
*86 (MLText
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "11800,21000,11800,21000"
|
||
|
tm "BdFrameDeclTextMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
style 3
|
||
|
)
|
||
|
defaultSaCptPort (CptPort
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "0,0,750,750"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,750,2800,1950"
|
||
|
st "Port"
|
||
|
blo "0,1750"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "Port"
|
||
|
t ""
|
||
|
o 0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultSaCptPortBuffer (CptPort
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Diamond
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "65535,65535,65535"
|
||
|
)
|
||
|
xt "0,0,750,750"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
va (VaSet
|
||
|
)
|
||
|
xt "0,750,2800,1950"
|
||
|
st "Port"
|
||
|
blo "0,1750"
|
||
|
)
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 3
|
||
|
decl (Decl
|
||
|
n "Port"
|
||
|
t ""
|
||
|
o 0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultDeclText (MLText
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Courier New,9,0"
|
||
|
)
|
||
|
)
|
||
|
archDeclarativeBlock (BdArchDeclBlock
|
||
|
uid 1,0
|
||
|
stg "BdArchDeclBlockLS"
|
||
|
declLabel (Text
|
||
|
uid 2,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "29000,26800,36000,27800"
|
||
|
st "Declarations"
|
||
|
blo "29000,27600"
|
||
|
)
|
||
|
portLabel (Text
|
||
|
uid 3,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "29000,28000,32400,29000"
|
||
|
st "Ports:"
|
||
|
blo "29000,28800"
|
||
|
)
|
||
|
preUserLabel (Text
|
||
|
uid 4,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "29000,27800,33800,28800"
|
||
|
st "Pre User:"
|
||
|
blo "29000,28600"
|
||
|
)
|
||
|
preUserText (MLText
|
||
|
uid 5,0
|
||
|
va (VaSet
|
||
|
font "Courier New,10,0"
|
||
|
)
|
||
|
xt "31000,28800,59200,34800"
|
||
|
st "constant txFifoDepth: positive := 1;
|
||
|
constant rxFifoDepth: positive := 1;
|
||
|
|
||
|
constant clockFrequency : real := 60.0E6;
|
||
|
--constant clockFrequency : real := 66.0E6;"
|
||
|
tm "BdDeclarativeTextMgr"
|
||
|
)
|
||
|
diagSignalLabel (Text
|
||
|
uid 6,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "29000,28000,38000,29000"
|
||
|
st "Diagram Signals:"
|
||
|
blo "29000,28800"
|
||
|
)
|
||
|
postUserLabel (Text
|
||
|
uid 7,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Verdana,8,1"
|
||
|
)
|
||
|
xt "29000,28000,35000,29000"
|
||
|
st "Post User:"
|
||
|
blo "29000,28800"
|
||
|
)
|
||
|
postUserText (MLText
|
||
|
uid 8,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Courier New,10,0"
|
||
|
)
|
||
|
xt "31000,42400,31000,42400"
|
||
|
tm "BdDeclarativeTextMgr"
|
||
|
)
|
||
|
)
|
||
|
commonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
suid 119,0
|
||
|
usingSuid 1
|
||
|
emptyRow *87 (LEmptyRow
|
||
|
)
|
||
|
uid 3310,0
|
||
|
optionalChildren [
|
||
|
*88 (RefLabelRowHdr
|
||
|
)
|
||
|
*89 (TitleRowHdr
|
||
|
)
|
||
|
*90 (FilterRowHdr
|
||
|
)
|
||
|
*91 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*92 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*93 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*94 (NameColHdr
|
||
|
tm "BlockDiagramNameColHdrMgr"
|
||
|
)
|
||
|
*95 (ModeColHdr
|
||
|
tm "BlockDiagramModeColHdrMgr"
|
||
|
)
|
||
|
*96 (TypeColHdr
|
||
|
tm "BlockDiagramTypeColHdrMgr"
|
||
|
)
|
||
|
*97 (BoundsColHdr
|
||
|
tm "BlockDiagramBoundsColHdrMgr"
|
||
|
)
|
||
|
*98 (InitColHdr
|
||
|
tm "BlockDiagramInitColHdrMgr"
|
||
|
)
|
||
|
*99 (EolColHdr
|
||
|
tm "BlockDiagramEolColHdrMgr"
|
||
|
)
|
||
|
*100 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hReset_n"
|
||
|
t "std_uLogic"
|
||
|
o 7
|
||
|
suid 108,0
|
||
|
)
|
||
|
)
|
||
|
uid 12637,0
|
||
|
)
|
||
|
*101 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hClk"
|
||
|
t "std_uLogic"
|
||
|
o 4
|
||
|
suid 109,0
|
||
|
)
|
||
|
)
|
||
|
uid 12639,0
|
||
|
)
|
||
|
*102 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hResp"
|
||
|
t "std_uLogic"
|
||
|
o 8
|
||
|
suid 110,0
|
||
|
)
|
||
|
)
|
||
|
uid 12641,0
|
||
|
)
|
||
|
*103 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hReady"
|
||
|
t "std_uLogic"
|
||
|
o 6
|
||
|
suid 111,0
|
||
|
)
|
||
|
)
|
||
|
uid 12643,0
|
||
|
)
|
||
|
*104 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hRData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 5
|
||
|
suid 112,0
|
||
|
)
|
||
|
)
|
||
|
uid 12645,0
|
||
|
)
|
||
|
*105 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hSel"
|
||
|
t "std_uLogic"
|
||
|
o 9
|
||
|
suid 113,0
|
||
|
)
|
||
|
)
|
||
|
uid 12647,0
|
||
|
)
|
||
|
*106 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hWrite"
|
||
|
t "std_uLogic"
|
||
|
o 12
|
||
|
suid 114,0
|
||
|
)
|
||
|
)
|
||
|
uid 12649,0
|
||
|
)
|
||
|
*107 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hTrans"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbTransBitNb-1 DOWNTO 0)"
|
||
|
o 10
|
||
|
suid 115,0
|
||
|
)
|
||
|
)
|
||
|
uid 12651,0
|
||
|
)
|
||
|
*108 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hWData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 11
|
||
|
suid 116,0
|
||
|
)
|
||
|
)
|
||
|
uid 12653,0
|
||
|
)
|
||
|
*109 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "hAddr"
|
||
|
t "unsigned"
|
||
|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
|
||
|
o 3
|
||
|
suid 117,0
|
||
|
)
|
||
|
)
|
||
|
uid 12655,0
|
||
|
)
|
||
|
*110 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "RxD"
|
||
|
t "std_ulogic"
|
||
|
o 1
|
||
|
suid 118,0
|
||
|
)
|
||
|
)
|
||
|
uid 13313,0
|
||
|
)
|
||
|
*111 (LeafLogPort
|
||
|
port (LogicalPort
|
||
|
m 4
|
||
|
decl (Decl
|
||
|
n "TxD"
|
||
|
t "std_ulogic"
|
||
|
o 2
|
||
|
suid 119,0
|
||
|
)
|
||
|
)
|
||
|
uid 13315,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 3323,0
|
||
|
optionalChildren [
|
||
|
*112 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *113 (MRCItem
|
||
|
litem &87
|
||
|
pos 12
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 3325,0
|
||
|
optionalChildren [
|
||
|
*114 (MRCItem
|
||
|
litem &88
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 3326,0
|
||
|
)
|
||
|
*115 (MRCItem
|
||
|
litem &89
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 3327,0
|
||
|
)
|
||
|
*116 (MRCItem
|
||
|
litem &90
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 3328,0
|
||
|
)
|
||
|
*117 (MRCItem
|
||
|
litem &100
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 12638,0
|
||
|
)
|
||
|
*118 (MRCItem
|
||
|
litem &101
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 12640,0
|
||
|
)
|
||
|
*119 (MRCItem
|
||
|
litem &102
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 12642,0
|
||
|
)
|
||
|
*120 (MRCItem
|
||
|
litem &103
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 12644,0
|
||
|
)
|
||
|
*121 (MRCItem
|
||
|
litem &104
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 12646,0
|
||
|
)
|
||
|
*122 (MRCItem
|
||
|
litem &105
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 12648,0
|
||
|
)
|
||
|
*123 (MRCItem
|
||
|
litem &106
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
uid 12650,0
|
||
|
)
|
||
|
*124 (MRCItem
|
||
|
litem &107
|
||
|
pos 7
|
||
|
dimension 20
|
||
|
uid 12652,0
|
||
|
)
|
||
|
*125 (MRCItem
|
||
|
litem &108
|
||
|
pos 8
|
||
|
dimension 20
|
||
|
uid 12654,0
|
||
|
)
|
||
|
*126 (MRCItem
|
||
|
litem &109
|
||
|
pos 9
|
||
|
dimension 20
|
||
|
uid 12656,0
|
||
|
)
|
||
|
*127 (MRCItem
|
||
|
litem &110
|
||
|
pos 10
|
||
|
dimension 20
|
||
|
uid 13314,0
|
||
|
)
|
||
|
*128 (MRCItem
|
||
|
litem &111
|
||
|
pos 11
|
||
|
dimension 20
|
||
|
uid 13316,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 3329,0
|
||
|
optionalChildren [
|
||
|
*129 (MRCItem
|
||
|
litem &91
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 3330,0
|
||
|
)
|
||
|
*130 (MRCItem
|
||
|
litem &93
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 3331,0
|
||
|
)
|
||
|
*131 (MRCItem
|
||
|
litem &94
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 3332,0
|
||
|
)
|
||
|
*132 (MRCItem
|
||
|
litem &95
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 3333,0
|
||
|
)
|
||
|
*133 (MRCItem
|
||
|
litem &96
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 3334,0
|
||
|
)
|
||
|
*134 (MRCItem
|
||
|
litem &97
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 3335,0
|
||
|
)
|
||
|
*135 (MRCItem
|
||
|
litem &98
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 3336,0
|
||
|
)
|
||
|
*136 (MRCItem
|
||
|
litem &99
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 3337,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 3324,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 3309,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *137 (LEmptyRow
|
||
|
)
|
||
|
uid 3339,0
|
||
|
optionalChildren [
|
||
|
*138 (RefLabelRowHdr
|
||
|
)
|
||
|
*139 (TitleRowHdr
|
||
|
)
|
||
|
*140 (FilterRowHdr
|
||
|
)
|
||
|
*141 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*142 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*143 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*144 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*145 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*146 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*147 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*148 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 3351,0
|
||
|
optionalChildren [
|
||
|
*149 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *150 (MRCItem
|
||
|
litem &137
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
)
|
||
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uid 3353,0
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optionalChildren [
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*151 (MRCItem
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litem &138
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pos 0
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dimension 20
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uid 3354,0
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)
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*152 (MRCItem
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litem &139
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pos 1
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dimension 23
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uid 3355,0
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)
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*153 (MRCItem
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litem &140
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pos 2
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hidden 1
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dimension 20
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uid 3356,0
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)
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sheetCol (SheetCol
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propVa (MVa
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cellColor "0,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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uid 3357,0
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optionalChildren [
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*154 (MRCItem
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litem &141
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pos 0
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dimension 20
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uid 3358,0
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)
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*155 (MRCItem
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litem &143
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pos 1
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dimension 50
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uid 3359,0
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)
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*156 (MRCItem
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litem &144
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pos 2
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dimension 100
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uid 3360,0
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)
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*157 (MRCItem
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litem &145
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pos 3
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dimension 100
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uid 3361,0
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)
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*158 (MRCItem
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litem &146
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pos 4
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dimension 50
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uid 3362,0
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)
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*159 (MRCItem
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litem &147
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pos 5
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dimension 50
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uid 3363,0
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)
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*160 (MRCItem
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litem &148
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pos 6
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dimension 80
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uid 3364,0
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fixedCol 3
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fixedRow 2
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name "Ports"
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uid 3352,0
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vaOverrides [
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]
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)
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]
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)
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uid 3338,0
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type 1
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)
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activeModelName "BlockDiag"
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)
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