39 lines
1.1 KiB
Plaintext
39 lines
1.1 KiB
Plaintext
|
-- VHDL Entity AhbLiteComponents.ahbGpio.symbol
|
||
|
|
--
|
||
|
|
-- Created:
|
||
|
|
-- by - remi.heredero.UNKNOWN (WE2330808)
|
||
|
|
-- at - 15:08:33 23.02.2024
|
||
|
|
--
|
||
|
|
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
|
||
|
|
--
|
||
|
|
LIBRARY ieee;
|
||
|
|
USE ieee.std_logic_1164.all;
|
||
|
|
USE ieee.numeric_std.all;
|
||
|
|
LIBRARY AhbLite;
|
||
|
|
USE AhbLite.ahbLite.all;
|
||
|
|
|
||
|
|
ENTITY ahbGpio IS
|
||
|
|
GENERIC(
|
||
|
|
ioNb : positive := 8
|
||
|
|
);
|
||
|
|
PORT(
|
||
|
|
hAddr : IN unsigned ( ahbAddressBitNb-1 DOWNTO 0 );
|
||
|
|
hClk : IN std_uLogic;
|
||
|
|
hReset_n : IN std_uLogic;
|
||
|
|
hSel : IN std_uLogic;
|
||
|
|
hTrans : IN std_ulogic_vector (ahbTransBitNb-1 DOWNTO 0);
|
||
|
|
hWData : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
|
||
|
|
hWrite : IN std_uLogic;
|
||
|
|
ioIn : IN std_ulogic_vector (ioNb-1 DOWNTO 0);
|
||
|
|
hRData : OUT std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0);
|
||
|
|
hReady : OUT std_uLogic;
|
||
|
|
hResp : OUT std_uLogic;
|
||
|
|
ioEn : OUT std_ulogic_vector (ioNb-1 DOWNTO 0);
|
||
|
|
ioOut : OUT std_ulogic_vector (ioNb-1 DOWNTO 0)
|
||
|
|
);
|
||
|
|
|
||
|
|
-- Declarations
|
||
|
|
|
||
|
|
END ahbGpio ;
|
||
|
|
|