SEm-Labos/zz-solutions/04-Lissajous/Board/hds/inverter/symbol.sb

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dialect 11
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
]
libraryRefs [
"ieee"
]
)
version "26.1"
appVersion "2018.1 (Build 12)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 2002,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
uid 97,0
optionalChildren [
*2 (LogPort
port (LogicalPort
decl (Decl
n "in1"
t "std_uLogic"
o 1
suid 1,0
)
)
uid 98,0
)
*3 (LogPort
port (LogicalPort
m 1
decl (Decl
n "out1"
t "std_uLogic"
o 2
suid 2,0
)
)
uid 99,0
)
*4 (RefLabelRowHdr
)
*5 (TitleRowHdr
)
*6 (FilterRowHdr
)
*7 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*8 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*9 (GroupColHdr
tm "GroupColHdrMgr"
)
*10 (NameColHdr
tm "NameColHdrMgr"
)
*11 (ModeColHdr
tm "ModeColHdrMgr"
)
*12 (TypeColHdr
tm "TypeColHdrMgr"
)
*13 (BoundsColHdr
tm "BoundsColHdrMgr"
)
*14 (InitColHdr
tm "InitColHdrMgr"
)
*15 (EolColHdr
tm "EolColHdrMgr"
)
]
)
pdm (PhysicalDM
uid 100,0
optionalChildren [
*16 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "courier,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
)
emptyMRCItem *17 (MRCItem
litem &1
pos 3
dimension 20
)
uid 43,0
optionalChildren [
*18 (MRCItem
litem &4
pos 0
dimension 20
uid 46,0
)
*19 (MRCItem
litem &5
pos 1
dimension 23
uid 48,0
)
*20 (MRCItem
litem &6
pos 2
hidden 1
dimension 20
uid 50,0
)
*21 (MRCItem
litem &2
pos 0
dimension 20
uid 69,0
)
*22 (MRCItem
litem &3
pos 1
dimension 20
uid 70,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
)
uid 44,0
optionalChildren [
*23 (MRCItem
litem &7
pos 0
dimension 20
uid 52,0
)
*24 (MRCItem
litem &9
pos 1
dimension 50
uid 56,0
)
*25 (MRCItem
litem &10
pos 2
dimension 100
uid 58,0
)
*26 (MRCItem
litem &11
pos 3
dimension 50
uid 60,0
)
*27 (MRCItem
litem &12
pos 4
dimension 100
uid 62,0
)
*28 (MRCItem
litem &13
pos 5
dimension 100
uid 64,0
)
*29 (MRCItem
litem &14
pos 6
dimension 50
uid 66,0
)
*30 (MRCItem
litem &15
pos 7
dimension 80
uid 68,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 42,0
vaOverrides [
]
)
]
)
uid 96,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *31 (LEmptyRow
)
uid 102,0
optionalChildren [
*32 (RefLabelRowHdr
)
*33 (TitleRowHdr
)
*34 (FilterRowHdr
)
*35 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*36 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*37 (GroupColHdr
tm "GroupColHdrMgr"
)
*38 (NameColHdr
tm "GenericNameColHdrMgr"
)
*39 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*40 (InitColHdr
tm "GenericValueColHdrMgr"
)
*41 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*42 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
)
pdm (PhysicalDM
uid 103,0
optionalChildren [
*43 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "courier,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "courier,10,0"
)
emptyMRCItem *44 (MRCItem
litem &31
pos 3
dimension 20
)
uid 72,0
optionalChildren [
*45 (MRCItem
litem &32
pos 0
dimension 20
uid 75,0
)
*46 (MRCItem
litem &33
pos 1
dimension 23
uid 77,0
)
*47 (MRCItem
litem &34
pos 2
hidden 1
dimension 20
uid 79,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "courier,10,0"
textAngle 90
)
uid 73,0
optionalChildren [
*48 (MRCItem
litem &35
pos 0
dimension 20
uid 81,0
)
*49 (MRCItem
litem &37
pos 1
dimension 50
uid 85,0
)
*50 (MRCItem
litem &38
pos 2
dimension 100
uid 87,0
)
*51 (MRCItem
litem &39
pos 3
dimension 100
uid 89,0
)
*52 (MRCItem
litem &40
pos 4
dimension 50
uid 91,0
)
*53 (MRCItem
litem &41
pos 5
dimension 50
uid 93,0
)
*54 (MRCItem
litem &42
pos 6
dimension 80
uid 95,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 71,0
vaOverrides [
]
)
]
)
uid 101,0
type 1
)
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hdl"
)
(vvPair
variable "HDSDir"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds"
)
(vvPair
variable "SideDataDesignDir"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds/inverter/symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds/inverter/symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "symbol"
)
(vvPair
variable "asm_file"
value "beamer.asm"
)
(vvPair
variable "concat_file"
value "concatenated"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds/inverter"
)
(vvPair
variable "d_logical"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds/inverter"
)
(vvPair
variable "date"
value "02/19/19"
)
(vvPair
variable "day"
value "Tue"
)
(vvPair
variable "day_long"
value "Tuesday"
)
(vvPair
variable "dd"
value "19"
)
(vvPair
variable "designName"
value "$DESIGN_NAME"
)
(vvPair
variable "entity_name"
value "inverter"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "symbol.sb"
)
(vvPair
variable "f_noext"
value "symbol"
)
(vvPair
variable "graphical_source_author"
value "francois"
)
(vvPair
variable "graphical_source_date"
value "02/19/19"
)
(vvPair
variable "graphical_source_group"
value "francois"
)
(vvPair
variable "graphical_source_host"
value "Aphelia"
)
(vvPair
variable "graphical_source_time"
value "13:07:09"
)
(vvPair
variable "group"
value "francois"
)
(vvPair
variable "host"
value "Aphelia"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "Board"
)
(vvPair
variable "library_downstream_Concatenation"
value "$HDS_PROJECT_DIR/../Board/concat"
)
(vvPair
variable "library_downstream_Generic_1_file"
value "U:\\SEm_curves\\Synthesis"
)
(vvPair
variable "library_downstream_ModelSim"
value "D:\\Users\\ELN_labs\\VHDL_comp"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/Board"
)
(vvPair
variable "library_downstream_SpyGlass"
value "U:\\SEm_curves\\Synthesis"
)
(vvPair
variable "mm"
value "02"
)
(vvPair
variable "module_name"
value "inverter"
)
(vvPair
variable "month"
value "Feb"
)
(vvPair
variable "month_long"
value "February"
)
(vvPair
variable "p"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds/inverter/symbol.sb"
)
(vvPair
variable "p_logical"
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/Lissajous/Prefs/../Board/hds/inverter/symbol.sb"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "lissajous"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_AsmPath"
value "$HEI_LIBS_DIR/NanoBlaze/hdl"
)
(vvPair
variable "task_HDSPath"
value "$HDS_HOME"
)
(vvPair
variable "task_ISEBinPath"
value "$ISE_HOME"
)
(vvPair
variable "task_ISEPath"
value "$ISE_WORK_DIR"
)
(vvPair
variable "task_ModelSimPath"
value "$MODELSIM_HOME/modeltech/bin"
)
(vvPair
variable "this_ext"
value "sb"
)
(vvPair
variable "this_file"
value "symbol"
)
(vvPair
variable "this_file_logical"
value "symbol"
)
(vvPair
variable "time"
value "13:07:09"
)
(vvPair
variable "unit"
value "inverter"
)
(vvPair
variable "user"
value "francois"
)
(vvPair
variable "version"
value "2018.1 (Build 12)"
)
(vvPair
variable "view"
value "symbol"
)
(vvPair
variable "year"
value "2019"
)
(vvPair
variable "yy"
value "19"
)
]
)
LanguageMgr "Vhdl2008LangMgr"
uid 29,0
optionalChildren [
*55 (SymbolBody
uid 8,0
optionalChildren [
*56 (CptPort
uid 16,0
ps "OnEdgeStrategy"
shape (Triangle
uid 17,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "22250,6625,23000,7375"
)
tg (CPTG
uid 38,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 19,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "23000,6500,25700,7900"
st "in1"
blo "23000,7700"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 34,0
va (VaSet
font "courier,8,0"
)
xt "2000,10200,16000,11100"
st "in1  : IN     std_uLogic  ;"
)
thePort (LogicalPort
decl (Decl
n "in1"
t "std_uLogic"
o 1
suid 1,0
)
)
)
*57 (CptPort
uid 22,0
optionalChildren [
*58 (Circle
uid 28,0
va (VaSet
fg "0,65535,0"
)
xt "28000,6625,28750,7375"
radius 375
)
]
ps "OnEdgeStrategy"
shape (Triangle
uid 23,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28750,6625,29500,7375"
)
tg (CPTG
uid 39,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 25,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "24050,6500,27750,7900"
st "out1"
ju 2
blo "27750,7700"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 35,0
va (VaSet
font "courier,8,0"
)
xt "2000,11100,15000,12000"
st "out1 : OUT    std_uLogic "
)
thePort (LogicalPort
m 1
decl (Decl
n "out1"
t "std_uLogic"
o 2
suid 2,0
)
)
)
]
shape (Buf
uid 30,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "23000,4000,28000,10000"
)
showPorts 0
oxt "15000,18000,21000,24000"
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
isHidden 1
)
xt "23910,3700,26910,4700"
st "Board"
blo "23910,4500"
)
second (Text
uid 12,0
va (VaSet
isHidden 1
)
xt "23910,4700,28710,5700"
st "inverter"
blo "23910,5500"
)
)
gi *59 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
isHidden 1
)
xt "23000,10400,35600,11400"
st "Generic Declarations"
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
]
)
portInstanceVis (PortSigDisplay
disp 1
sN 0
sTC 0
sT 1
)
portVis (PortSigDisplay
sN 0
sTC 0
sF 0
)
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "65535,0,0"
)
packageList *60 (PackageList
uid 5,0
stg "VerticalLayoutStrategy"
textVec [
*61 (Text
uid 40,0
va (VaSet
font "courier,10,1"
)
xt "0,0,7600,1200"
st "Package List"
blo "0,1000"
)
*62 (MLText
uid 41,0
va (VaSet
)
xt "0,1200,17400,3200"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;"
tm "PackageList"
)
]
)
windowSize "65,29,915,670"
viewArea "-630,-3856,36676,17902"
cachedDiagramExtent "0,0,36800,17100"
hasePageBreakOrigin 1
pageBreakOrigin "0,0"
defaultCommentText (CommentText
shape (Rectangle
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2600,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 14000
)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
layer 0
va (VaSet
vasetType 1
fg "59904,39936,65280"
lineColor "0,0,32768"
)
xt "0,0,1500,1750"
iconName "reqTracerRequirement.bmp"
iconMaskName "reqTracerRequirement.msk"
)
autoResize 1
text (MLText
va (VaSet
fg "0,0,32768"
font "courier,8,0"
)
xt "450,2150,1450,3050"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "courier,9,0"
)
xt "1000,1000,4000,2200"
st "Panel0"
blo "1000,1900"
tm "PanelText"
)
)
)
parentGraphicsRef (HdmGraphicsRef
libraryName ""
entityName ""
viewName ""
)
defaultSymbolBody (SymbolBody
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,16000,43000,36000"
)
biTextGroup (BiTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
)
xt "26910,24700,30010,25700"
st "<library>"
blo "26910,25500"
)
second (Text
va (VaSet
)
xt "26910,25700,29110,26700"
st "<cell>"
blo "26910,26500"
)
)
gi *63 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
)
xt "20000,5000,20000,5000"
)
header "Generic Declarations"
)
elements [
]
)
portInstanceVis (PortSigDisplay
sT 1
sIVOD 1
)
)
defaultCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,8,0"
)
xt "0,750,1500,1650"
st "In0"
blo "0,1450"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "courier,8,0"
)
)
thePort (LogicalPort
lang 11
decl (Decl
n "In0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
defaultCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
font "courier,8,0"
)
xt "0,750,3500,1650"
st "Buffer0"
blo "0,1450"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "courier,8,0"
)
)
thePort (LogicalPort
lang 11
m 3
decl (Decl
n "Buffer0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
DeclarativeBlock *64 (SymDeclBlock
uid 31,0
stg "SymDeclLayoutStrategy"
declLabel (Text
uid 2,0
va (VaSet
font "courier,10,1"
)
xt "0,7800,8600,9000"
st "Declarations"
blo "0,8800"
)
portLabel (Text
uid 2,0
va (VaSet
font "courier,10,1"
)
xt "0,9000,4200,10200"
st "Ports:"
blo "0,10000"
)
externalLabel (Text
uid 2,0
va (VaSet
font "courier,10,1"
)
xt "0,12000,3000,13000"
st "User:"
blo "0,12800"
)
internalLabel (Text
uid 2,0
va (VaSet
isHidden 1
font "courier,10,1"
)
xt "0,15900,9400,17100"
st "Internal User:"
blo "0,16900"
)
externalText (MLText
uid 3,0
va (VaSet
font "courier,8,0"
)
xt "2000,13000,2000,13000"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
uid 4,0
va (VaSet
isHidden 1
font "courier,8,0"
)
xt "2000,17600,2000,17600"
tm "SyDeclarativeTextMgr"
)
)
lastUid 126,0
)