SEm-Labos/Libs/NanoBlaze/hds/instruction@decoder/symbol.sb

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "ieee"
unitName "numeric_std"
)
]
libraryRefs [
"ieee"
]
)
version "24.1"
appVersion "2009.2 (Build 10)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 30,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
uid 88,0
optionalChildren [
*2 (RefLabelRowHdr
)
*3 (TitleRowHdr
)
*4 (FilterRowHdr
)
*5 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*6 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*7 (GroupColHdr
tm "GroupColHdrMgr"
)
*8 (NameColHdr
tm "NameColHdrMgr"
)
*9 (ModeColHdr
tm "ModeColHdrMgr"
)
*10 (TypeColHdr
tm "TypeColHdrMgr"
)
*11 (BoundsColHdr
tm "BoundsColHdrMgr"
)
*12 (InitColHdr
tm "InitColHdrMgr"
)
*13 (EolColHdr
tm "EolColHdrMgr"
)
*14 (LogPort
port (LogicalPort
m 1
decl (Decl
n "aluCode"
t "std_ulogic_vector"
b "( aluCodeBitNb-1 DOWNTO 0 )"
o 4
suid 2,0
)
)
uid 78,0
)
*15 (LogPort
port (LogicalPort
m 1
decl (Decl
n "portIndexedSel"
t "std_ulogic"
o 6
suid 5,0
)
)
uid 84,0
)
*16 (LogPort
port (LogicalPort
m 1
decl (Decl
n "addrA"
t "unsigned"
b "( registerAddressBitNb-1 DOWNTO 0 )"
o 2
suid 9,0
)
)
uid 415,0
)
*17 (LogPort
port (LogicalPort
m 1
decl (Decl
n "addrB"
t "unsigned"
b "( registerAddressBitNb-1 DOWNTO 0 )"
o 3
suid 10,0
)
)
uid 417,0
)
*18 (LogPort
port (LogicalPort
m 1
decl (Decl
n "instrData"
t "signed"
b "( registerBitNb-1 DOWNTO 0 )"
o 8
suid 11,0
)
)
uid 419,0
)
*19 (LogPort
port (LogicalPort
m 1
decl (Decl
n "opCode"
t "std_ulogic_vector"
b "( opCodeBitNb-1 DOWNTO 0 )"
o 10
suid 16,0
)
)
uid 459,0
)
*20 (LogPort
port (LogicalPort
m 1
decl (Decl
n "portAddress"
t "unsigned"
b "(portAddressBitNb-1 DOWNTO 0)"
o 11
suid 18,0
)
)
uid 468,0
)
*21 (LogPort
port (LogicalPort
decl (Decl
n "instruction"
t "std_ulogic_vector"
b "( instructionBitNb-1 DOWNTO 0 )"
o 1
suid 19,0
)
)
uid 499,0
)
*22 (LogPort
port (LogicalPort
m 1
decl (Decl
n "instrAddress"
t "unsigned"
b "( programCounterBitNb-1 DOWNTO 0 )"
o 7
suid 24,0
)
)
uid 658,0
)
*23 (LogPort
port (LogicalPort
m 1
decl (Decl
n "branchCond"
t "std_ulogic_vector"
b "(branchCondBitNb-1 DOWNTO 0)"
o 5
suid 25,0
)
)
uid 674,0
)
*24 (LogPort
port (LogicalPort
m 1
decl (Decl
n "intCode"
t "std_ulogic_vector"
b "( intCodeBitNb-1 DOWNTO 0 )"
o 9
suid 26,0
)
)
uid 676,0
)
*25 (LogPort
port (LogicalPort
m 1
decl (Decl
n "spadAddress"
t "unsigned"
b "( spadAddressBitNb-1 DOWNTO 0 )"
o 12
suid 28,0
)
)
uid 746,0
)
*26 (LogPort
port (LogicalPort
m 1
decl (Decl
n "spadIndexedSel"
t "std_ulogic"
o 13
suid 29,0
)
)
uid 799,0
)
*27 (LogPort
port (LogicalPort
m 1
decl (Decl
n "twoRegInstr"
t "std_ulogic"
o 14
suid 30,0
)
)
uid 900,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 101,0
optionalChildren [
*28 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *29 (MRCItem
litem &1
pos 14
dimension 20
)
uid 103,0
optionalChildren [
*30 (MRCItem
litem &2
pos 0
dimension 20
uid 104,0
)
*31 (MRCItem
litem &3
pos 1
dimension 23
uid 105,0
)
*32 (MRCItem
litem &4
pos 2
hidden 1
dimension 20
uid 106,0
)
*33 (MRCItem
litem &14
pos 2
dimension 20
uid 79,0
)
*34 (MRCItem
litem &15
pos 6
dimension 20
uid 85,0
)
*35 (MRCItem
litem &16
pos 0
dimension 20
uid 416,0
)
*36 (MRCItem
litem &17
pos 1
dimension 20
uid 418,0
)
*37 (MRCItem
litem &18
pos 3
dimension 20
uid 420,0
)
*38 (MRCItem
litem &19
pos 5
dimension 20
uid 460,0
)
*39 (MRCItem
litem &20
pos 7
dimension 20
uid 469,0
)
*40 (MRCItem
litem &21
pos 4
dimension 20
uid 500,0
)
*41 (MRCItem
litem &22
pos 8
dimension 20
uid 659,0
)
*42 (MRCItem
litem &23
pos 9
dimension 20
uid 675,0
)
*43 (MRCItem
litem &24
pos 10
dimension 20
uid 677,0
)
*44 (MRCItem
litem &25
pos 11
dimension 20
uid 747,0
)
*45 (MRCItem
litem &26
pos 12
dimension 20
uid 800,0
)
*46 (MRCItem
litem &27
pos 13
dimension 20
uid 901,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 107,0
optionalChildren [
*47 (MRCItem
litem &5
pos 0
dimension 20
uid 108,0
)
*48 (MRCItem
litem &7
pos 1
dimension 50
uid 109,0
)
*49 (MRCItem
litem &8
pos 2
dimension 100
uid 110,0
)
*50 (MRCItem
litem &9
pos 3
dimension 50
uid 111,0
)
*51 (MRCItem
litem &10
pos 4
dimension 100
uid 112,0
)
*52 (MRCItem
litem &11
pos 5
dimension 100
uid 113,0
)
*53 (MRCItem
litem &12
pos 6
dimension 50
uid 114,0
)
*54 (MRCItem
litem &13
pos 7
dimension 80
uid 115,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 102,0
vaOverrides [
]
)
]
)
uid 87,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *55 (LEmptyRow
)
uid 117,0
optionalChildren [
*56 (RefLabelRowHdr
)
*57 (TitleRowHdr
)
*58 (FilterRowHdr
)
*59 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*60 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*61 (GroupColHdr
tm "GroupColHdrMgr"
)
*62 (NameColHdr
tm "GenericNameColHdrMgr"
)
*63 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*64 (InitColHdr
tm "GenericValueColHdrMgr"
)
*65 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*66 (EolColHdr
tm "GenericEolColHdrMgr"
)
*67 (LogGeneric
generic (GiElement
name "registerBitNb"
type "positive"
value "8"
)
uid 592,0
)
*68 (LogGeneric
generic (GiElement
name "registerAddressBitNb"
type "positive"
value "4"
)
uid 594,0
)
*69 (LogGeneric
generic (GiElement
name "aluCodeBitNb"
type "positive"
value "5"
)
uid 596,0
)
*70 (LogGeneric
generic (GiElement
name "instructionBitNb"
type "positive"
value "18"
)
uid 651,0
)
*71 (LogGeneric
generic (GiElement
name "programCounterBitNb"
type "positive"
value "10"
)
uid 660,0
)
*72 (LogGeneric
generic (GiElement
name "opCodeBitNb"
type "positive"
value "5"
)
uid 662,0
)
*73 (LogGeneric
generic (GiElement
name "branchCondBitNb"
type "positive"
value "3"
)
uid 678,0
)
*74 (LogGeneric
generic (GiElement
name "intCodeBitNb"
type "positive"
value "5"
)
uid 680,0
)
*75 (LogGeneric
generic (GiElement
name "spadAddressBitNb"
type "natural"
value "4"
)
uid 739,0
)
*76 (LogGeneric
generic (GiElement
name "portAddressBitNb"
type "positive"
value "8"
)
uid 824,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 129,0
optionalChildren [
*77 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *78 (MRCItem
litem &55
pos 10
dimension 20
)
uid 131,0
optionalChildren [
*79 (MRCItem
litem &56
pos 0
dimension 20
uid 132,0
)
*80 (MRCItem
litem &57
pos 1
dimension 23
uid 133,0
)
*81 (MRCItem
litem &58
pos 2
hidden 1
dimension 20
uid 134,0
)
*82 (MRCItem
litem &67
pos 0
dimension 20
uid 593,0
)
*83 (MRCItem
litem &68
pos 1
dimension 20
uid 595,0
)
*84 (MRCItem
litem &69
pos 2
dimension 20
uid 597,0
)
*85 (MRCItem
litem &70
pos 3
dimension 20
uid 652,0
)
*86 (MRCItem
litem &71
pos 4
dimension 20
uid 661,0
)
*87 (MRCItem
litem &72
pos 5
dimension 20
uid 663,0
)
*88 (MRCItem
litem &73
pos 6
dimension 20
uid 679,0
)
*89 (MRCItem
litem &74
pos 7
dimension 20
uid 681,0
)
*90 (MRCItem
litem &75
pos 8
dimension 20
uid 740,0
)
*91 (MRCItem
litem &76
pos 9
dimension 20
uid 825,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 135,0
optionalChildren [
*92 (MRCItem
litem &59
pos 0
dimension 20
uid 136,0
)
*93 (MRCItem
litem &61
pos 1
dimension 50
uid 137,0
)
*94 (MRCItem
litem &62
pos 2
dimension 100
uid 138,0
)
*95 (MRCItem
litem &63
pos 3
dimension 100
uid 139,0
)
*96 (MRCItem
litem &64
pos 4
dimension 50
uid 140,0
)
*97 (MRCItem
litem &65
pos 5
dimension 50
uid 141,0
)
*98 (MRCItem
litem &66
pos 6
dimension 80
uid 142,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 130,0
vaOverrides [
]
)
]
)
uid 116,0
type 1
)
VExpander (VariableExpander
vvMap [
(vvPair
variable "HDLDir"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hdl"
)
(vvPair
variable "HDSDir"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder\\symbol.sb.info"
)
(vvPair
variable "SideDataUserDir"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder\\symbol.sb.user"
)
(vvPair
variable "SourceDir"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "symbol"
)
(vvPair
variable "concat_file"
value "concatenated"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder"
)
(vvPair
variable "d_logical"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instructionDecoder"
)
(vvPair
variable "date"
value "05.03.2015"
)
(vvPair
variable "day"
value "jeu."
)
(vvPair
variable "day_long"
value "jeudi"
)
(vvPair
variable "dd"
value "05"
)
(vvPair
variable "designName"
value "$DESIGN_NAME"
)
(vvPair
variable "entity_name"
value "instructionDecoder"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "symbol.sb"
)
(vvPair
variable "f_logical"
value "symbol.sb"
)
(vvPair
variable "f_noext"
value "symbol"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "WE3673"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "NanoBlaze"
)
(vvPair
variable "library_downstream_HdsLintPlugin"
value "$HDS_PROJECT_DIR/../NanoBlaze/designcheck"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/SEm/NanoBlaze/work"
)
(vvPair
variable "mm"
value "03"
)
(vvPair
variable "module_name"
value "instructionDecoder"
)
(vvPair
variable "month"
value "mars"
)
(vvPair
variable "month_long"
value "mars"
)
(vvPair
variable "p"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instruction@decoder\\symbol.sb"
)
(vvPair
variable "p_logical"
value "D:\\Labs\\SEm_labs\\..\\Libs\\NanoBlaze\\hds\\instructionDecoder\\symbol.sb"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "hds-beamer"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_HDSPath"
value "$HDS_HOME"
)
(vvPair
variable "task_ISEBinPath"
value "$ISE_HOME"
)
(vvPair
variable "task_ISEPath"
value "$ISE_SCRATCH_WORK_DIR"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "$MODELSIM_HOME\\win32"
)
(vvPair
variable "task_NC-SimPath"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "sb"
)
(vvPair
variable "this_file"
value "symbol"
)
(vvPair
variable "this_file_logical"
value "symbol"
)
(vvPair
variable "time"
value "11:25:24"
)
(vvPair
variable "unit"
value "instructionDecoder"
)
(vvPair
variable "user"
value "francois"
)
(vvPair
variable "version"
value "2009.2 (Build 10)"
)
(vvPair
variable "view"
value "symbol"
)
(vvPair
variable "year"
value "2015"
)
(vvPair
variable "yy"
value "15"
)
]
)
LanguageMgr "VhdlLangMgr"
uid 86,0
optionalChildren [
*99 (SymbolBody
uid 8,0
optionalChildren [
*100 (CptPort
uid 56,0
ps "OnEdgeStrategy"
shape (Triangle
uid 705,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "44625,41000,45375,41750"
)
tg (CPTG
uid 58,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 59,0
va (VaSet
)
xt "43000,39000,46200,40000"
st "aluCode"
blo "43000,39800"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 60,0
va (VaSet
font "Courier New,8,0"
)
xt "0,10400,37500,11200"
st "aluCode        : OUT    std_ulogic_vector ( aluCodeBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "aluCode"
t "std_ulogic_vector"
b "( aluCodeBitNb-1 DOWNTO 0 )"
o 4
suid 2,0
)
)
)
*101 (CptPort
uid 71,0
ps "OnEdgeStrategy"
shape (Triangle
uid 72,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "65000,30625,65750,31375"
)
tg (CPTG
uid 73,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 74,0
va (VaSet
)
xt "58300,30500,64000,31500"
st "portIndexedSel"
ju 2
blo "64000,31300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 75,0
va (VaSet
font "Courier New,8,0"
)
xt "0,16000,20000,16800"
st "portIndexedSel : OUT    std_ulogic  ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "portIndexedSel"
t "std_ulogic"
o 6
suid 5,0
)
)
)
*102 (CptPort
uid 400,0
ps "OnEdgeStrategy"
shape (Triangle
uid 706,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "48625,41000,49375,41750"
)
tg (CPTG
uid 402,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 403,0
va (VaSet
)
xt "48000,39000,50400,40000"
st "addrA"
blo "48000,39800"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 404,0
va (VaSet
font "Courier New,8,0"
)
xt "0,8800,37000,9600"
st "addrA          : OUT    unsigned ( registerAddressBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "addrA"
t "unsigned"
b "( registerAddressBitNb-1 DOWNTO 0 )"
o 2
suid 9,0
)
)
)
*103 (CptPort
uid 405,0
ps "OnEdgeStrategy"
shape (Triangle
uid 707,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "52625,41000,53375,41750"
)
tg (CPTG
uid 407,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 408,0
va (VaSet
)
xt "52000,39000,54400,40000"
st "addrB"
blo "52000,39800"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 409,0
va (VaSet
font "Courier New,8,0"
)
xt "0,9600,37000,10400"
st "addrB          : OUT    unsigned ( registerAddressBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "addrB"
t "unsigned"
b "( registerAddressBitNb-1 DOWNTO 0 )"
o 3
suid 10,0
)
)
)
*104 (CptPort
uid 410,0
ps "OnEdgeStrategy"
shape (Triangle
uid 708,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "60625,41000,61375,41750"
)
tg (CPTG
uid 412,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 413,0
va (VaSet
)
xt "59000,39000,62500,40000"
st "instrData"
blo "59000,39800"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 414,0
va (VaSet
font "Courier New,8,0"
)
xt "0,12800,32500,13600"
st "instrData      : OUT    signed ( registerBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "instrData"
t "signed"
b "( registerBitNb-1 DOWNTO 0 )"
o 8
suid 11,0
)
)
)
*105 (CptPort
uid 441,0
ps "OnEdgeStrategy"
shape (Triangle
uid 493,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,34625,41000,35375"
)
tg (CPTG
uid 443,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 444,0
va (VaSet
)
xt "42000,34500,45000,35500"
st "opCode"
blo "42000,35300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 445,0
va (VaSet
font "Courier New,8,0"
)
xt "0,14400,37000,15200"
st "opCode         : OUT    std_ulogic_vector ( opCodeBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "opCode"
t "std_ulogic_vector"
b "( opCodeBitNb-1 DOWNTO 0 )"
o 10
suid 16,0
)
)
)
*106 (CptPort
uid 463,0
ps "OnEdgeStrategy"
shape (Triangle
uid 464,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "65000,32625,65750,33375"
)
tg (CPTG
uid 465,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 466,0
va (VaSet
)
xt "59100,32500,64000,33500"
st "portAddress"
ju 2
blo "64000,33300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 467,0
va (VaSet
font "Courier New,8,0"
)
xt "0,15200,34000,16000"
st "portAddress    : OUT    unsigned (portAddressBitNb-1 DOWNTO 0) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "portAddress"
t "unsigned"
b "(portAddressBitNb-1 DOWNTO 0)"
o 11
suid 18,0
)
)
)
*107 (CptPort
uid 494,0
ps "OnEdgeStrategy"
shape (Triangle
uid 524,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "65000,28625,65750,29375"
)
tg (CPTG
uid 496,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 497,0
va (VaSet
)
xt "59700,28500,64000,29500"
st "instruction"
ju 2
blo "64000,29300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 498,0
va (VaSet
font "Courier New,8,0"
)
xt "0,8000,39500,8800"
st "instruction    : IN     std_ulogic_vector ( instructionBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
decl (Decl
n "instruction"
t "std_ulogic_vector"
b "( instructionBitNb-1 DOWNTO 0 )"
o 1
suid 19,0
)
)
)
*108 (CptPort
uid 653,0
ps "OnEdgeStrategy"
shape (Triangle
uid 654,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "52625,24250,53375,25000"
)
tg (CPTG
uid 655,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 656,0
va (VaSet
)
xt "50000,26000,55100,27000"
st "instrAddress"
blo "50000,26800"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 657,0
va (VaSet
font "Courier New,8,0"
)
xt "0,12000,36500,12800"
st "instrAddress   : OUT    unsigned ( programCounterBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "instrAddress"
t "unsigned"
b "( programCounterBitNb-1 DOWNTO 0 )"
o 7
suid 24,0
)
)
)
*109 (CptPort
uid 664,0
ps "OnEdgeStrategy"
shape (Triangle
uid 665,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,30625,41000,31375"
)
tg (CPTG
uid 666,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 667,0
va (VaSet
)
xt "42000,30500,46900,31500"
st "branchCond"
blo "42000,31300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 668,0
va (VaSet
font "Courier New,8,0"
)
xt "0,11200,38000,12000"
st "branchCond     : OUT    std_ulogic_vector (branchCondBitNb-1 DOWNTO 0) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "branchCond"
t "std_ulogic_vector"
b "(branchCondBitNb-1 DOWNTO 0)"
o 5
suid 25,0
)
)
)
*110 (CptPort
uid 669,0
ps "OnEdgeStrategy"
shape (Triangle
uid 670,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,28625,41000,29375"
)
tg (CPTG
uid 671,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 672,0
va (VaSet
)
xt "42000,28500,45000,29500"
st "intCode"
blo "42000,29300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 673,0
va (VaSet
font "Courier New,8,0"
)
xt "0,13600,37500,14400"
st "intCode        : OUT    std_ulogic_vector ( intCodeBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "intCode"
t "std_ulogic_vector"
b "( intCodeBitNb-1 DOWNTO 0 )"
o 9
suid 26,0
)
)
)
*111 (CptPort
uid 741,0
ps "OnEdgeStrategy"
shape (Triangle
uid 742,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "65000,36625,65750,37375"
)
tg (CPTG
uid 743,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 744,0
va (VaSet
)
xt "58800,36500,64000,37500"
st "spadAddress"
ju 2
blo "64000,37300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 745,0
va (VaSet
font "Courier New,8,0"
)
xt "0,16800,35000,17600"
st "spadAddress    : OUT    unsigned ( spadAddressBitNb-1 DOWNTO 0 ) ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "spadAddress"
t "unsigned"
b "( spadAddressBitNb-1 DOWNTO 0 )"
o 12
suid 28,0
)
)
)
*112 (CptPort
uid 794,0
ps "OnEdgeStrategy"
shape (Triangle
uid 795,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "65000,34625,65750,35375"
)
tg (CPTG
uid 796,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 797,0
va (VaSet
)
xt "58000,34500,64000,35500"
st "spadIndexedSel"
ju 2
blo "64000,35300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 798,0
va (VaSet
font "Courier New,8,0"
)
xt "0,17600,20000,18400"
st "spadIndexedSel : OUT    std_ulogic  ;"
)
thePort (LogicalPort
m 1
decl (Decl
n "spadIndexedSel"
t "std_ulogic"
o 13
suid 29,0
)
)
)
*113 (CptPort
uid 895,0
ps "OnEdgeStrategy"
shape (Triangle
uid 896,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40250,36625,41000,37375"
)
tg (CPTG
uid 897,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 898,0
va (VaSet
)
xt "42000,36500,46900,37500"
st "twoRegInstr"
blo "42000,37300"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 899,0
va (VaSet
font "Courier New,8,0"
)
xt "0,18400,19000,19200"
st "twoRegInstr    : OUT    std_ulogic "
)
thePort (LogicalPort
m 1
decl (Decl
n "twoRegInstr"
t "std_ulogic"
o 14
suid 30,0
)
)
)
]
shape (Rectangle
uid 9,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "41000,25000,65000,41000"
)
oxt "15000,6000,31000,20000"
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "Arial,8,1"
)
xt "41600,41000,46000,42000"
st "NanoBlaze"
blo "41600,41800"
)
second (Text
uid 12,0
va (VaSet
font "Arial,8,1"
)
xt "41600,42000,49600,43000"
st "instructionDecoder"
blo "41600,42800"
)
)
gi *114 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
font "Courier New,8,0"
)
xt "41000,44200,59500,53800"
st "Generic Declarations

registerBitNb        positive 8   
registerAddressBitNb positive 4   
aluCodeBitNb         positive 5   
instructionBitNb     positive 18  
programCounterBitNb  positive 10  
opCodeBitNb          positive 5   
branchCondBitNb      positive 3   
intCodeBitNb         positive 5   
spadAddressBitNb     natural  4   
portAddressBitNb     positive 8   
"
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
(GiElement
name "registerBitNb"
type "positive"
value "8"
)
(GiElement
name "registerAddressBitNb"
type "positive"
value "4"
)
(GiElement
name "aluCodeBitNb"
type "positive"
value "5"
)
(GiElement
name "instructionBitNb"
type "positive"
value "18"
)
(GiElement
name "programCounterBitNb"
type "positive"
value "10"
)
(GiElement
name "opCodeBitNb"
type "positive"
value "5"
)
(GiElement
name "branchCondBitNb"
type "positive"
value "3"
)
(GiElement
name "intCodeBitNb"
type "positive"
value "5"
)
(GiElement
name "spadAddressBitNb"
type "natural"
value "4"
)
(GiElement
name "portAddressBitNb"
type "positive"
value "8"
)
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sTC 0
sF 0
)
portVis (PortSigDisplay
sTC 0
sF 0
)
)
*115 (Grouping
uid 16,0
optionalChildren [
*116 (CommentText
uid 18,0
shape (Rectangle
uid 19,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "58000,65000,75000,66000"
)
oxt "18000,70000,35000,71000"
text (MLText
uid 20,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "58200,65000,66900,66000"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*117 (CommentText
uid 21,0
shape (Rectangle
uid 22,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "75000,61000,79000,62000"
)
oxt "35000,66000,39000,67000"
text (MLText
uid 23,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "75200,61000,78200,62000"
st "
Project:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*118 (CommentText
uid 24,0
shape (Rectangle
uid 25,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "58000,63000,75000,64000"
)
oxt "18000,68000,35000,69000"
text (MLText
uid 26,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "58200,63000,68200,64000"
st "
<enter diagram title here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
*119 (CommentText
uid 27,0
shape (Rectangle
uid 28,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "54000,63000,58000,64000"
)
oxt "14000,68000,18000,69000"
text (MLText
uid 29,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "54200,63000,56300,64000"
st "
Title:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*120 (CommentText
uid 30,0
shape (Rectangle
uid 31,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "75000,62000,95000,66000"
)
oxt "35000,67000,55000,71000"
text (MLText
uid 32,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "75200,62200,84400,63200"
st "
<enter comments here>
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 20000
)
ignorePrefs 1
titleBlock 1
)
*121 (CommentText
uid 33,0
shape (Rectangle
uid 34,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "79000,61000,95000,62000"
)
oxt "39000,66000,55000,67000"
text (MLText
uid 35,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "79200,61000,80800,62000"
st "
%project_name
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 16000
)
position 1
ignorePrefs 1
titleBlock 1
)
*122 (CommentText
uid 36,0
shape (Rectangle
uid 37,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "54000,61000,75000,63000"
)
oxt "14000,66000,35000,68000"
text (MLText
uid 38,0
va (VaSet
fg "32768,0,0"
)
xt "61150,61500,67850,62500"
st "
<company name>
"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 2000
visibleWidth 21000
)
position 1
ignorePrefs 1
titleBlock 1
)
*123 (CommentText
uid 39,0
shape (Rectangle
uid 40,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "54000,64000,58000,65000"
)
oxt "14000,69000,18000,70000"
text (MLText
uid 41,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "54200,64000,56300,65000"
st "
Path:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*124 (CommentText
uid 42,0
shape (Rectangle
uid 43,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "54000,65000,58000,66000"
)
oxt "14000,70000,18000,71000"
text (MLText
uid 44,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "54200,65000,56900,66000"
st "
Edited:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
titleBlock 1
)
*125 (CommentText
uid 45,0
shape (Rectangle
uid 46,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "58000,64000,75000,65000"
)
oxt "18000,69000,35000,70000"
text (MLText
uid 47,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "58200,64000,72200,65000"
st "
%library/%unit/%view
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
titleBlock 1
)
]
shape (GroupingShape
uid 17,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "54000,61000,95000,66000"
)
oxt "14000,66000,55000,71000"
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *126 (PackageList
uid 48,0
stg "VerticalLayoutStrategy"
textVec [
*127 (Text
uid 49,0
va (VaSet
font "arial,8,1"
)
xt "-2000,0,3400,1000"
st "Package List"
blo "-2000,800"
)
*128 (MLText
uid 50,0
va (VaSet
)
xt "-2000,1000,9300,4000"
st "LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;"
tm "PackageList"
)
]
)
windowSize "0,43,1287,900"
viewArea "-3400,-1400,96992,65810"
cachedDiagramExtent "-2000,0,95000,66000"
pageSetupInfo (PageSetupInfo
ptrCmd ""
toPrinter 1
xMargin 49
yMargin 49
paperWidth 761
paperHeight 1077
windowsPaperWidth 761
windowsPaperHeight 1077
paperType "A4"
windowsPaperName "A4"
windowsPaperType 9
scale 75
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
boundaryWidth 0
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
hasePageBreakOrigin 1
pageBreakOrigin "-2000,0"
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,2000,1200"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,8,1"
)
xt "1000,1000,3800,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
parentGraphicsRef (HdmGraphicsRef
libraryName ""
entityName ""
viewName ""
)
defaultSymbolBody (SymbolBody
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,33000,26000"
)
biTextGroup (BiTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
font "Arial,8,1"
)
xt "22200,15000,25800,16000"
st "<library>"
blo "22200,15800"
)
second (Text
va (VaSet
font "Arial,8,1"
)
xt "22200,16000,24800,17000"
st "<cell>"
blo "22200,16800"
)
)
gi *129 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "0,12000,11500,12800"
st "Generic Declarations"
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sIVOD 1
)
portVis (PortSigDisplay
sIVOD 1
)
)
defaultCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1400,1750"
st "In0"
blo "0,1550"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
thePort (LogicalPort
decl (Decl
n "In0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
defaultCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,2800,1750"
st "Buffer0"
blo "0,1550"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Buffer0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
DeclarativeBlock *130 (SymDeclBlock
uid 1,0
stg "SymDeclLayoutStrategy"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,8,1"
)
xt "-2000,6000,3400,7000"
st "Declarations"
blo "-2000,6800"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,8,1"
)
xt "-2000,7000,700,8000"
st "Ports:"
blo "-2000,7800"
)
externalLabel (Text
uid 4,0
va (VaSet
font "Arial,8,1"
)
xt "-2000,19200,400,20200"
st "User:"
blo "-2000,20000"
)
internalLabel (Text
uid 6,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "-2000,6000,3800,7000"
st "Internal User:"
blo "-2000,6800"
)
externalText (MLText
uid 5,0
va (VaSet
font "Courier New,8,0"
)
xt "0,20200,0,20200"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
uid 7,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "-2000,6000,-2000,6000"
tm "SyDeclarativeTextMgr"
)
)
lastUid 924,0
okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1
activeModelName "Symbol"
)