1861 lines
23 KiB
Plaintext
1861 lines
23 KiB
Plaintext
|
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "gates"
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unitName "gates"
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)
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]
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libraryRefs [
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"ieee"
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"gates"
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]
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)
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version "27.1"
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appVersion "2019.2 (Build 5)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 7,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 102,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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||
|
*5 (RefLabelColHdr
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|
tm "RefLabelColHdrMgr"
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)
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|
*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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|
)
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||
|
*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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|
*8 (NameColHdr
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|
tm "NameColHdrMgr"
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)
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|
*9 (ModeColHdr
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tm "ModeColHdrMgr"
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)
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|
*10 (TypeColHdr
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|
tm "TypeColHdrMgr"
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|
)
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|
*11 (BoundsColHdr
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|
tm "BoundsColHdrMgr"
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|
)
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|
*12 (InitColHdr
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||
|
tm "InitColHdrMgr"
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|
)
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|
*13 (EolColHdr
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|
tm "EolColHdrMgr"
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|
)
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|
*14 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "address"
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|
t "std_ulogic_vector"
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|
b "(g_dataWidth-1 DOWNTO 0)"
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|
o 30
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suid 1,0
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)
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)
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uid 86,0
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)
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*15 (LogPort
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port (LogicalPort
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|
lang 11
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|
decl (Decl
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||
|
n "clk"
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|
t "std_ulogic"
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|
o 2
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suid 2,0
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)
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)
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|
uid 88,0
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)
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|
*16 (LogPort
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|
port (LogicalPort
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||
|
lang 11
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||
|
decl (Decl
|
||
|
n "en"
|
||
|
t "std_ulogic"
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|
o 3
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suid 3,0
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|
)
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|
)
|
||
|
uid 90,0
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||
|
)
|
||
|
*17 (LogPort
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|
port (LogicalPort
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||
|
lang 11
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||
|
decl (Decl
|
||
|
n "writeEn"
|
||
|
t "std_ulogic"
|
||
|
o 29
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|
suid 4,0
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|
)
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|
)
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|
uid 92,0
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|
)
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|
*18 (LogPort
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|
port (LogicalPort
|
||
|
lang 11
|
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|
m 1
|
||
|
decl (Decl
|
||
|
n "readData"
|
||
|
t "std_ulogic_vector"
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||
|
b "(g_dataWidth-1 DOWNTO 0)"
|
||
|
o 32
|
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|
suid 5,0
|
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|
)
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|
)
|
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|
uid 94,0
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||
|
)
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|
*19 (LogPort
|
||
|
port (LogicalPort
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||
|
lang 11
|
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|
decl (Decl
|
||
|
n "rst"
|
||
|
t "std_ulogic"
|
||
|
o 4
|
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|
suid 6,0
|
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|
)
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|
)
|
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|
uid 96,0
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||
|
)
|
||
|
*20 (LogPort
|
||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "writeData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(g_dataWidth-1 DOWNTO 0)"
|
||
|
o 31
|
||
|
suid 7,0
|
||
|
)
|
||
|
)
|
||
|
uid 98,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 115,0
|
||
|
optionalChildren [
|
||
|
*21 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
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||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
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||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
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||
|
)
|
||
|
emptyMRCItem *22 (MRCItem
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||
|
litem &1
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||
|
pos 7
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||
|
dimension 20
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||
|
)
|
||
|
uid 117,0
|
||
|
optionalChildren [
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||
|
*23 (MRCItem
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||
|
litem &2
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||
|
pos 0
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||
|
dimension 20
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||
|
uid 118,0
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||
|
)
|
||
|
*24 (MRCItem
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||
|
litem &3
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 119,0
|
||
|
)
|
||
|
*25 (MRCItem
|
||
|
litem &4
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 120,0
|
||
|
)
|
||
|
*26 (MRCItem
|
||
|
litem &14
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 87,0
|
||
|
)
|
||
|
*27 (MRCItem
|
||
|
litem &15
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 89,0
|
||
|
)
|
||
|
*28 (MRCItem
|
||
|
litem &16
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 91,0
|
||
|
)
|
||
|
*29 (MRCItem
|
||
|
litem &17
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 93,0
|
||
|
)
|
||
|
*30 (MRCItem
|
||
|
litem &18
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 95,0
|
||
|
)
|
||
|
*31 (MRCItem
|
||
|
litem &19
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 97,0
|
||
|
)
|
||
|
*32 (MRCItem
|
||
|
litem &20
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
uid 99,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 121,0
|
||
|
optionalChildren [
|
||
|
*33 (MRCItem
|
||
|
litem &5
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 122,0
|
||
|
)
|
||
|
*34 (MRCItem
|
||
|
litem &7
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 123,0
|
||
|
)
|
||
|
*35 (MRCItem
|
||
|
litem &8
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 124,0
|
||
|
)
|
||
|
*36 (MRCItem
|
||
|
litem &9
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 125,0
|
||
|
)
|
||
|
*37 (MRCItem
|
||
|
litem &10
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 126,0
|
||
|
)
|
||
|
*38 (MRCItem
|
||
|
litem &11
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 127,0
|
||
|
)
|
||
|
*39 (MRCItem
|
||
|
litem &12
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 128,0
|
||
|
)
|
||
|
*40 (MRCItem
|
||
|
litem &13
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 129,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 116,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 101,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *41 (LEmptyRow
|
||
|
)
|
||
|
uid 131,0
|
||
|
optionalChildren [
|
||
|
*42 (RefLabelRowHdr
|
||
|
)
|
||
|
*43 (TitleRowHdr
|
||
|
)
|
||
|
*44 (FilterRowHdr
|
||
|
)
|
||
|
*45 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*46 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*47 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*48 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*49 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*50 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*51 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*52 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
*53 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "g_dataWidth"
|
||
|
type "positive"
|
||
|
value "32"
|
||
|
)
|
||
|
uid 180,0
|
||
|
)
|
||
|
*54 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "g_memoryNbBits"
|
||
|
type "positive"
|
||
|
value "7"
|
||
|
)
|
||
|
uid 209,0
|
||
|
)
|
||
|
*55 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "g_tMemWr"
|
||
|
type "time"
|
||
|
value "60 ps"
|
||
|
)
|
||
|
uid 280,0
|
||
|
)
|
||
|
*56 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "g_tMemRd"
|
||
|
type "time"
|
||
|
value "200 ps"
|
||
|
)
|
||
|
uid 282,0
|
||
|
)
|
||
|
*57 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "g_tSetup"
|
||
|
type "time"
|
||
|
value "50 ps"
|
||
|
)
|
||
|
uid 284,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 143,0
|
||
|
optionalChildren [
|
||
|
*58 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *59 (MRCItem
|
||
|
litem &41
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 145,0
|
||
|
optionalChildren [
|
||
|
*60 (MRCItem
|
||
|
litem &42
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 146,0
|
||
|
)
|
||
|
*61 (MRCItem
|
||
|
litem &43
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 147,0
|
||
|
)
|
||
|
*62 (MRCItem
|
||
|
litem &44
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 148,0
|
||
|
)
|
||
|
*63 (MRCItem
|
||
|
litem &53
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 181,0
|
||
|
)
|
||
|
*64 (MRCItem
|
||
|
litem &54
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 210,0
|
||
|
)
|
||
|
*65 (MRCItem
|
||
|
litem &55
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 281,0
|
||
|
)
|
||
|
*66 (MRCItem
|
||
|
litem &56
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 283,0
|
||
|
)
|
||
|
*67 (MRCItem
|
||
|
litem &57
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 285,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 149,0
|
||
|
optionalChildren [
|
||
|
*68 (MRCItem
|
||
|
litem &45
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 150,0
|
||
|
)
|
||
|
*69 (MRCItem
|
||
|
litem &47
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 151,0
|
||
|
)
|
||
|
*70 (MRCItem
|
||
|
litem &48
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 152,0
|
||
|
)
|
||
|
*71 (MRCItem
|
||
|
litem &49
|
||
|
pos 3
|
||
|
dimension 100
|
||
|
uid 153,0
|
||
|
)
|
||
|
*72 (MRCItem
|
||
|
litem &50
|
||
|
pos 4
|
||
|
dimension 50
|
||
|
uid 154,0
|
||
|
)
|
||
|
*73 (MRCItem
|
||
|
litem &51
|
||
|
pos 5
|
||
|
dimension 50
|
||
|
uid 155,0
|
||
|
)
|
||
|
*74 (MRCItem
|
||
|
litem &52
|
||
|
pos 6
|
||
|
dimension 80
|
||
|
uid 156,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 144,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 130,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds\\data@memory\\symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds\\data@memory\\symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds\\data@memory"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds\\dataMemory"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "04.11.2022"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "ven."
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "vendredi"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "04"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "dataMemory"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_author"
|
||
|
value "axel.amand"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_date"
|
||
|
value "04.11.2022"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_host"
|
||
|
value "WE7860"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_time"
|
||
|
value "12:10:26"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "WE7860"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "HEIRV32_SC"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Concatenation"
|
||
|
value "$HDS_PROJECT_DIR/../Board/concat"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/CAr/RiscV/HEIRV32/SingleCycle/work"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "11"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "dataMemory"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "nov."
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "novembre"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds\\data@memory\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32\\SingleCycle\\hds\\dataMemory\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "12:10:26"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "dataMemory"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "axel.amand"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2019.2 (Build 5)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2022"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "22"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "Vhdl2008LangMgr"
|
||
|
uid 100,0
|
||
|
optionalChildren [
|
||
|
*75 (SymbolBody
|
||
|
uid 8,0
|
||
|
optionalChildren [
|
||
|
*76 (CptPort
|
||
|
uid 51,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 52,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "16250,20625,17000,21375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 53,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 54,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "18000,20500,21600,21500"
|
||
|
st "address"
|
||
|
blo "18000,21300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 55,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,2400,77500,3200"
|
||
|
st "address : IN std_ulogic_vector (g_dataWidth-1 DOWNTO 0) ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "address"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(g_dataWidth-1 DOWNTO 0)"
|
||
|
o 30
|
||
|
suid 1,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*77 (CptPort
|
||
|
uid 56,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 57,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "18625,13250,19375,14000"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 58,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 59,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "18453,14307,19453,15907"
|
||
|
st "clk"
|
||
|
ju 2
|
||
|
blo "19253,14307"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 60,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,3200,61500,4000"
|
||
|
st "clk : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
lang 11
|
||
|
decl (Decl
|
||
|
n "clk"
|
||
|
t "std_ulogic"
|
||
|
o 2
|
||
|
suid 2,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*78 (CptPort
|
||
|
uid 61,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 62,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "23625,13250,24375,14000"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 63,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 64,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "23500,15000,24500,16500"
|
||
|
st "en"
|
||
|
ju 2
|
||
|
blo "24300,15000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 65,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,4000,61500,4800"
|
||
|
st "en : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
lang 11
|
||
|
decl (Decl
|
||
|
n "en"
|
||
|
t "std_ulogic"
|
||
|
o 3
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*79 (CptPort
|
||
|
uid 66,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 67,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "16250,17625,17000,18375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 68,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 69,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "18000,17500,21500,18500"
|
||
|
st "writeEn"
|
||
|
blo "18000,18300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 70,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,6400,61500,7200"
|
||
|
st "writeEn : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
lang 11
|
||
|
decl (Decl
|
||
|
n "writeEn"
|
||
|
t "std_ulogic"
|
||
|
o 29
|
||
|
suid 4,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*80 (CptPort
|
||
|
uid 71,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 72,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "26000,23625,26750,24375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 73,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 74,0
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "20800,23500,25000,24500"
|
||
|
st "readData"
|
||
|
ju 2
|
||
|
blo "25000,24300"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 75,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,7200,76500,8000"
|
||
|
st "readData : OUT std_ulogic_vector (g_dataWidth-1 DOWNTO 0)
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
lang 11
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "readData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(g_dataWidth-1 DOWNTO 0)"
|
||
|
o 32
|
||
|
suid 5,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*81 (CptPort
|
||
|
uid 76,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 77,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "20625,13250,21375,14000"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 78,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 79,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,8,0"
|
||
|
)
|
||
|
xt "20500,15000,21500,16500"
|
||
|
st "rst"
|
||
|
ju 2
|
||
|
blo "21300,15000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 80,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,4800,61500,5600"
|
||
|
st "rst : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
lang 11
|
||
|
decl (Decl
|
||
|
n "rst"
|
||
|
t "std_ulogic"
|
||
|
o 4
|
||
|
suid 6,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*82 (CptPort
|
||
|
uid 81,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 82,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "16250,28625,17000,29375"
|
||
|
)
|
||
|
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