1836 lines
23 KiB
Plaintext
1836 lines
23 KiB
Plaintext
|
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "AhbLite"
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unitName "ahbLite"
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)
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]
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libraryRefs [
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"ieee"
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"AhbLite"
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]
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)
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version "24.1"
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appVersion "2009.2 (Build 10)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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suid 2068,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 320,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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|
*6 (RowExpandColHdr
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|
tm "RowExpandColHdrMgr"
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|
)
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*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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|
*8 (NameColHdr
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tm "NameColHdrMgr"
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)
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|
*9 (ModeColHdr
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|
tm "ModeColHdrMgr"
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)
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|
*10 (TypeColHdr
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|
tm "TypeColHdrMgr"
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|
)
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|
*11 (BoundsColHdr
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||
|
tm "BoundsColHdrMgr"
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||
|
)
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|
*12 (InitColHdr
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|
tm "InitColHdrMgr"
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|
)
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|
*13 (EolColHdr
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|
tm "EolColHdrMgr"
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|
)
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|
*14 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "hSelV"
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|
t "std_ulogic_vector"
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|
b "( 1 TO ahbSlaveNb )"
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|
o 5
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suid 2051,0
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)
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)
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|
uid 2524,0
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|
)
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|
*15 (LogPort
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
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||
|
n "hRDataV"
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|
t "ahbDataVector"
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|
o 1
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suid 2054,0
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)
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)
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|
uid 2528,0
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|
)
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|
*16 (LogPort
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|
port (LogicalPort
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||
|
decl (Decl
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||
|
n "hReady"
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||
|
t "std_uLogic"
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|
o 7
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|
suid 2061,0
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|
)
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|
)
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|
uid 2542,0
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||
|
)
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|
*17 (LogPort
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|
port (LogicalPort
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||
|
decl (Decl
|
||
|
n "hResp"
|
||
|
t "std_uLogic"
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||
|
o 3
|
||
|
suid 2062,0
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|
)
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|
)
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|
uid 2544,0
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||
|
)
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|
*18 (LogPort
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||
|
port (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hRData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 6
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|
suid 2065,0
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|
)
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|
)
|
||
|
uid 2643,0
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||
|
)
|
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|
*19 (LogPort
|
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
|
||
|
n "hReadyV"
|
||
|
t "std_logic_vector"
|
||
|
b "(1 to ahbSlaveNb)"
|
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|
o 2
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|
suid 2066,0
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|
)
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|
)
|
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|
uid 2645,0
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||
|
)
|
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|
*20 (LogPort
|
||
|
port (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hRespV"
|
||
|
t "std_logic_vector"
|
||
|
b "(1 to ahbSlaveNb)"
|
||
|
o 4
|
||
|
suid 2067,0
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||
|
)
|
||
|
)
|
||
|
uid 2647,0
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||
|
)
|
||
|
*21 (LogPort
|
||
|
port (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hSel"
|
||
|
t "std_uLogic"
|
||
|
o 8
|
||
|
suid 2068,0
|
||
|
)
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|
)
|
||
|
uid 2796,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
displayShortBounds 1
|
||
|
editShortBounds 1
|
||
|
uid 333,0
|
||
|
optionalChildren [
|
||
|
*22 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
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||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
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||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
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||
|
)
|
||
|
emptyMRCItem *23 (MRCItem
|
||
|
litem &1
|
||
|
pos 8
|
||
|
dimension 20
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||
|
)
|
||
|
uid 254,0
|
||
|
optionalChildren [
|
||
|
*24 (MRCItem
|
||
|
litem &2
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 257,0
|
||
|
)
|
||
|
*25 (MRCItem
|
||
|
litem &3
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 259,0
|
||
|
)
|
||
|
*26 (MRCItem
|
||
|
litem &4
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 261,0
|
||
|
)
|
||
|
*27 (MRCItem
|
||
|
litem &14
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 2525,0
|
||
|
)
|
||
|
*28 (MRCItem
|
||
|
litem &15
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 2529,0
|
||
|
)
|
||
|
*29 (MRCItem
|
||
|
litem &16
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 2543,0
|
||
|
)
|
||
|
*30 (MRCItem
|
||
|
litem &17
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 2545,0
|
||
|
)
|
||
|
*31 (MRCItem
|
||
|
litem &18
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 2644,0
|
||
|
)
|
||
|
*32 (MRCItem
|
||
|
litem &19
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 2646,0
|
||
|
)
|
||
|
*33 (MRCItem
|
||
|
litem &20
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
uid 2648,0
|
||
|
)
|
||
|
*34 (MRCItem
|
||
|
litem &21
|
||
|
pos 7
|
||
|
dimension 20
|
||
|
uid 2797,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 255,0
|
||
|
optionalChildren [
|
||
|
*35 (MRCItem
|
||
|
litem &5
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 263,0
|
||
|
)
|
||
|
*36 (MRCItem
|
||
|
litem &7
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 267,0
|
||
|
)
|
||
|
*37 (MRCItem
|
||
|
litem &8
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 269,0
|
||
|
)
|
||
|
*38 (MRCItem
|
||
|
litem &9
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 271,0
|
||
|
)
|
||
|
*39 (MRCItem
|
||
|
litem &10
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 273,0
|
||
|
)
|
||
|
*40 (MRCItem
|
||
|
litem &11
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 275,0
|
||
|
)
|
||
|
*41 (MRCItem
|
||
|
litem &12
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 277,0
|
||
|
)
|
||
|
*42 (MRCItem
|
||
|
litem &13
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 279,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 253,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 319,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *43 (LEmptyRow
|
||
|
)
|
||
|
uid 335,0
|
||
|
optionalChildren [
|
||
|
*44 (RefLabelRowHdr
|
||
|
)
|
||
|
*45 (TitleRowHdr
|
||
|
)
|
||
|
*46 (FilterRowHdr
|
||
|
)
|
||
|
*47 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*48 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*49 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*50 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*51 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*52 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*53 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*54 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
*55 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "index"
|
||
|
type "positive"
|
||
|
value "1"
|
||
|
)
|
||
|
uid 2798,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 336,0
|
||
|
optionalChildren [
|
||
|
*56 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
)
|
||
|
emptyMRCItem *57 (MRCItem
|
||
|
litem &43
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 293,0
|
||
|
optionalChildren [
|
||
|
*58 (MRCItem
|
||
|
litem &44
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 296,0
|
||
|
)
|
||
|
*59 (MRCItem
|
||
|
litem &45
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 298,0
|
||
|
)
|
||
|
*60 (MRCItem
|
||
|
litem &46
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 300,0
|
||
|
)
|
||
|
*61 (MRCItem
|
||
|
litem &55
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 2799,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "Tahoma,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 294,0
|
||
|
optionalChildren [
|
||
|
*62 (MRCItem
|
||
|
litem &47
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 302,0
|
||
|
)
|
||
|
*63 (MRCItem
|
||
|
litem &49
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 306,0
|
||
|
)
|
||
|
*64 (MRCItem
|
||
|
litem &50
|
||
|
pos 2
|
||
|
dimension 199
|
||
|
uid 308,0
|
||
|
)
|
||
|
*65 (MRCItem
|
||
|
litem &51
|
||
|
pos 3
|
||
|
dimension 100
|
||
|
uid 310,0
|
||
|
)
|
||
|
*66 (MRCItem
|
||
|
litem &52
|
||
|
pos 4
|
||
|
dimension 50
|
||
|
uid 312,0
|
||
|
)
|
||
|
*67 (MRCItem
|
||
|
litem &53
|
||
|
pos 5
|
||
|
dimension 50
|
||
|
uid 314,0
|
||
|
)
|
||
|
*68 (MRCItem
|
||
|
litem &54
|
||
|
pos 6
|
||
|
dimension 309
|
||
|
uid 316,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 292,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 334,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable " "
|
||
|
value " "
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds\\ahb@mux@connector\\symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds\\ahb@mux@connector\\symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "asm_file"
|
||
|
value "nanoTest.asm"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds\\ahb@mux@connector"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds\\ahbMuxConnector"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "07.06.2013"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "ven."
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "vendredi"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "07"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "ahbMuxConnector"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "WE3673"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "AhbLite"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Concatenation"
|
||
|
value "U:/ELN_Board/Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Generic_1_file"
|
||
|
value "U:\\ELN_Board\\Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_HdsLintPlugin"
|
||
|
value "$HDS_PROJECT_DIR/../NanoBlaze/designcheck"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSim"
|
||
|
value "D:\\Users\\ELN_labs\\VHDL_comp"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/$DESIGN_NAME/AhbLite/work"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_SpyGlass"
|
||
|
value "U:\\ELN_Board\\Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "06"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "ahbMuxConnector"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "juin"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "juin"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds\\ahb@mux@connector\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "D:\\Labs\\Cansat\\..\\Libs\\AhbLite\\hds\\ahbMuxConnector\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ADMS"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_DesignCompilerPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$SCRATCH_DIR\\$DESIGN_NAME\\$ISE_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_LeonardoPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME\\win32"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC-SimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_PrecisionRTLPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_QuestaSimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_VCSPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "17:07:55"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "ahbMuxConnector"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2009.2 (Build 10)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2013"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "13"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "VhdlLangMgr"
|
||
|
uid 51,0
|
||
|
optionalChildren [
|
||
|
*69 (SymbolBody
|
||
|
uid 8,0
|
||
|
optionalChildren [
|
||
|
*70 (CptPort
|
||
|
uid 2452,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2672,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "39250,14625,40000,15375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2454,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2455,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "41000,14300,45300,15700"
|
||
|
st "hSelV"
|
||
|
blo "41000,15500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2456,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,14200,32000,15000"
|
||
|
st "hSelV : IN std_ulogic_vector ( 1 TO ahbSlaveNb ) ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hSelV"
|
||
|
t "std_ulogic_vector"
|
||
|
b "( 1 TO ahbSlaveNb )"
|
||
|
o 5
|
||
|
suid 2051,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*71 (CptPort
|
||
|
uid 2469,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2823,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "39250,16625,40000,17375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2471,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2472,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "41000,16300,47200,17700"
|
||
|
st "hRDataV"
|
||
|
blo "41000,17500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2473,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,15000,20000,15800"
|
||
|
st "hRDataV : OUT ahbDataVector ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hRDataV"
|
||
|
t "ahbDataVector"
|
||
|
o 1
|
||
|
suid 2054,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*72 (CptPort
|
||
|
uid 2504,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2824,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "56000,18625,56750,19375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2506,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2507,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "49500,18300,55000,19700"
|
||
|
st "hReady"
|
||
|
ju 2
|
||
|
blo "55000,19500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2508,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,12600,18500,13400"
|
||
|
st "hReady : IN std_uLogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hReady"
|
||
|
t "std_uLogic"
|
||
|
o 7
|
||
|
suid 2061,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*73 (CptPort
|
||
|
uid 2509,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2825,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "56000,20625,56750,21375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2511,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2512,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "50300,20300,55000,21700"
|
||
|
st "hResp"
|
||
|
ju 2
|
||
|
blo "55000,21500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2513,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,13400,18500,14200"
|
||
|
st "hResp : IN std_uLogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hResp"
|
||
|
t "std_uLogic"
|
||
|
o 3
|
||
|
suid 2062,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*74 (CptPort
|
||
|
uid 2628,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2826,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "56000,16625,56750,17375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2630,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2631,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "49600,16300,55000,17700"
|
||
|
st "hRData"
|
||
|
ju 2
|
||
|
blo "55000,17500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2632,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,11800,35000,12600"
|
||
|
st "hRData : IN std_ulogic_vector (ahbDataBitNb-1 DOWNTO 0) ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "hRData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
||
|
o 6
|
||
|
suid 2065,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*75 (CptPort
|
||
|
uid 2633,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 2827,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "39250,18625,40000,19375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 2635,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 2636,0
|
||
|
va (VaSet
|
||
|
font "Verdana,12,0"
|
||
|
)
|
||
|
xt "41000,18300,47300,19700"
|
||
|
st "hReadyV"
|
||
|
blo "41000,19500"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 2637,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,15800,30500,16600"
|
||
|
st "hReadyV : OUT std_logic_vector (1 to ahbSlaveNb) ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "hReadyV"
|
||
|
t "std_logic_vector"
|
||
|
b "(1 to ahbSlaveNb)"
|
||
|
o 2
|
||
|
suid 2066,0
|
||
|
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USE ieee.std_logic_1164.all;
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