1795 lines
23 KiB
Plaintext
1795 lines
23 KiB
Plaintext
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DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "26.1"
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appVersion "2018.1 (Build 12)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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|
ordering 1
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suid 2008,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 203,0
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optionalChildren [
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*2 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "updatePeriod"
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|
t "unsigned"
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b "(updatePeriodBitNb-1 DOWNTO 0)"
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o 1
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suid 1,0
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)
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)
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uid 204,0
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)
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*3 (LogPort
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port (LogicalPort
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decl (Decl
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|
n "en"
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|
t "std_ulogic"
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|
o 4
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suid 5,0
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)
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)
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uid 205,0
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)
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*4 (LogPort
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port (LogicalPort
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decl (Decl
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|
n "write"
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|
t "std_ulogic"
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|
o 7
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suid 8,0
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)
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)
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|
uid 206,0
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|
)
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*5 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "clock"
|
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|
t "std_ulogic"
|
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|
o 5
|
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|
suid 6,0
|
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|
)
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|
)
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|
uid 207,0
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|
)
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*6 (LogPort
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port (LogicalPort
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decl (Decl
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|
n "reset"
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t "std_ulogic"
|
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|
o 6
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suid 7,0
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)
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)
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uid 208,0
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)
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*7 (LogPort
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|
port (LogicalPort
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|
m 1
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|
decl (Decl
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||
|
n "dataOut"
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|
t "std_logic_vector"
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b "(dataBitNb-1 DOWNTO 0)"
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o 3
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suid 3,0
|
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|
)
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)
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||
|
uid 209,0
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||
|
)
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*8 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "dataIn"
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|
t "std_ulogic_vector"
|
||
|
b "(dataBitNb-1 DOWNTO 0)"
|
||
|
o 2
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suid 2,0
|
||
|
)
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||
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)
|
||
|
uid 210,0
|
||
|
)
|
||
|
*9 (RefLabelRowHdr
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||
|
)
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||
|
*10 (TitleRowHdr
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|
)
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||
|
*11 (FilterRowHdr
|
||
|
)
|
||
|
*12 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*13 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*14 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*15 (NameColHdr
|
||
|
tm "NameColHdrMgr"
|
||
|
)
|
||
|
*16 (ModeColHdr
|
||
|
tm "ModeColHdrMgr"
|
||
|
)
|
||
|
*17 (TypeColHdr
|
||
|
tm "TypeColHdrMgr"
|
||
|
)
|
||
|
*18 (BoundsColHdr
|
||
|
tm "BoundsColHdrMgr"
|
||
|
)
|
||
|
*19 (InitColHdr
|
||
|
tm "InitColHdrMgr"
|
||
|
)
|
||
|
*20 (EolColHdr
|
||
|
tm "EolColHdrMgr"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 212,0
|
||
|
optionalChildren [
|
||
|
*21 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
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||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
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||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
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||
|
)
|
||
|
emptyMRCItem *22 (MRCItem
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|
litem &1
|
||
|
pos 7
|
||
|
dimension 20
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||
|
)
|
||
|
uid 141,0
|
||
|
optionalChildren [
|
||
|
*23 (MRCItem
|
||
|
litem &9
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||
|
pos 0
|
||
|
dimension 20
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||
|
uid 144,0
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||
|
)
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||
|
*24 (MRCItem
|
||
|
litem &10
|
||
|
pos 1
|
||
|
dimension 23
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||
|
uid 146,0
|
||
|
)
|
||
|
*25 (MRCItem
|
||
|
litem &11
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 148,0
|
||
|
)
|
||
|
*26 (MRCItem
|
||
|
litem &2
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 167,0
|
||
|
)
|
||
|
*27 (MRCItem
|
||
|
litem &3
|
||
|
pos 3
|
||
|
dimension 20
|
||
|
uid 168,0
|
||
|
)
|
||
|
*28 (MRCItem
|
||
|
litem &4
|
||
|
pos 6
|
||
|
dimension 20
|
||
|
uid 169,0
|
||
|
)
|
||
|
*29 (MRCItem
|
||
|
litem &5
|
||
|
pos 4
|
||
|
dimension 20
|
||
|
uid 170,0
|
||
|
)
|
||
|
*30 (MRCItem
|
||
|
litem &6
|
||
|
pos 5
|
||
|
dimension 20
|
||
|
uid 171,0
|
||
|
)
|
||
|
*31 (MRCItem
|
||
|
litem &7
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
uid 172,0
|
||
|
)
|
||
|
*32 (MRCItem
|
||
|
litem &8
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 173,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 142,0
|
||
|
optionalChildren [
|
||
|
*33 (MRCItem
|
||
|
litem &12
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 150,0
|
||
|
)
|
||
|
*34 (MRCItem
|
||
|
litem &14
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 154,0
|
||
|
)
|
||
|
*35 (MRCItem
|
||
|
litem &15
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 156,0
|
||
|
)
|
||
|
*36 (MRCItem
|
||
|
litem &16
|
||
|
pos 3
|
||
|
dimension 50
|
||
|
uid 158,0
|
||
|
)
|
||
|
*37 (MRCItem
|
||
|
litem &17
|
||
|
pos 4
|
||
|
dimension 100
|
||
|
uid 160,0
|
||
|
)
|
||
|
*38 (MRCItem
|
||
|
litem &18
|
||
|
pos 5
|
||
|
dimension 100
|
||
|
uid 162,0
|
||
|
)
|
||
|
*39 (MRCItem
|
||
|
litem &19
|
||
|
pos 6
|
||
|
dimension 50
|
||
|
uid 164,0
|
||
|
)
|
||
|
*40 (MRCItem
|
||
|
litem &20
|
||
|
pos 7
|
||
|
dimension 80
|
||
|
uid 166,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 4
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 140,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 202,0
|
||
|
)
|
||
|
genericsCommonDM (CommonDM
|
||
|
ldm (LogicalDM
|
||
|
emptyRow *41 (LEmptyRow
|
||
|
)
|
||
|
uid 214,0
|
||
|
optionalChildren [
|
||
|
*42 (RefLabelRowHdr
|
||
|
)
|
||
|
*43 (TitleRowHdr
|
||
|
)
|
||
|
*44 (FilterRowHdr
|
||
|
)
|
||
|
*45 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
|
*46 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
|
||
|
)
|
||
|
*47 (GroupColHdr
|
||
|
tm "GroupColHdrMgr"
|
||
|
)
|
||
|
*48 (NameColHdr
|
||
|
tm "GenericNameColHdrMgr"
|
||
|
)
|
||
|
*49 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
|
||
|
)
|
||
|
*50 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
|
||
|
)
|
||
|
*51 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
|
||
|
)
|
||
|
*52 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
|
||
|
)
|
||
|
*53 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "dataBitNb"
|
||
|
type "positive"
|
||
|
value "16"
|
||
|
)
|
||
|
uid 200,0
|
||
|
)
|
||
|
*54 (LogGeneric
|
||
|
generic (GiElement
|
||
|
name "updatePeriodBitNb"
|
||
|
type "positive"
|
||
|
value "16"
|
||
|
)
|
||
|
uid 239,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
pdm (PhysicalDM
|
||
|
uid 215,0
|
||
|
optionalChildren [
|
||
|
*55 (Sheet
|
||
|
sheetRow (SheetRow
|
||
|
headerVa (MVa
|
||
|
cellColor "49152,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
cellVa (MVa
|
||
|
cellColor "65535,65535,65535"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
groupVa (MVa
|
||
|
cellColor "39936,56832,65280"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
)
|
||
|
emptyMRCItem *56 (MRCItem
|
||
|
litem &41
|
||
|
pos 2
|
||
|
dimension 20
|
||
|
)
|
||
|
uid 176,0
|
||
|
optionalChildren [
|
||
|
*57 (MRCItem
|
||
|
litem &42
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 179,0
|
||
|
)
|
||
|
*58 (MRCItem
|
||
|
litem &43
|
||
|
pos 1
|
||
|
dimension 23
|
||
|
uid 181,0
|
||
|
)
|
||
|
*59 (MRCItem
|
||
|
litem &44
|
||
|
pos 2
|
||
|
hidden 1
|
||
|
dimension 20
|
||
|
uid 183,0
|
||
|
)
|
||
|
*60 (MRCItem
|
||
|
litem &53
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 201,0
|
||
|
)
|
||
|
*61 (MRCItem
|
||
|
litem &54
|
||
|
pos 1
|
||
|
dimension 20
|
||
|
uid 240,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
sheetCol (SheetCol
|
||
|
propVa (MVa
|
||
|
cellColor "0,49152,49152"
|
||
|
fontColor "0,0,0"
|
||
|
font "courier,10,0"
|
||
|
textAngle 90
|
||
|
)
|
||
|
uid 177,0
|
||
|
optionalChildren [
|
||
|
*62 (MRCItem
|
||
|
litem &45
|
||
|
pos 0
|
||
|
dimension 20
|
||
|
uid 185,0
|
||
|
)
|
||
|
*63 (MRCItem
|
||
|
litem &47
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 189,0
|
||
|
)
|
||
|
*64 (MRCItem
|
||
|
litem &48
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 191,0
|
||
|
)
|
||
|
*65 (MRCItem
|
||
|
litem &49
|
||
|
pos 3
|
||
|
dimension 100
|
||
|
uid 193,0
|
||
|
)
|
||
|
*66 (MRCItem
|
||
|
litem &50
|
||
|
pos 4
|
||
|
dimension 50
|
||
|
uid 195,0
|
||
|
)
|
||
|
*67 (MRCItem
|
||
|
litem &51
|
||
|
pos 5
|
||
|
dimension 50
|
||
|
uid 197,0
|
||
|
)
|
||
|
*68 (MRCItem
|
||
|
litem &52
|
||
|
pos 6
|
||
|
dimension 80
|
||
|
uid 199,0
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
|
||
|
uid 175,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 213,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable " "
|
||
|
value " "
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds/periph@speed@reg/symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds/periph@speed@reg/symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "asm_file"
|
||
|
value "beamer.asm"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_%(view)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds/periph@speed@reg"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds/periphSpeedReg"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "03/13/19"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "Wed"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "Wednesday"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "13"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "periphSpeedReg"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_author"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_date"
|
||
|
value "03/13/19"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_group"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_host"
|
||
|
value "Aphelia"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "graphical_source_time"
|
||
|
value "14:40:20"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "Aphelia"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "SystemOnChip"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Generic_1_file"
|
||
|
value "U:\\SEm_curves\\Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSim"
|
||
|
value "D:\\Users\\ELN_labs\\VHDL_comp"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/SystemOnChip"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_SpyGlass"
|
||
|
value "U:\\SEm_curves\\Synthesis"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "03"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "periphSpeedReg"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "Mar"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "March"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds/periph@speed@reg/symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "/home/francois/Documents/HEVs/SEm/SEm_labs/VHDL/SystemOnChip/Prefs/../SystemOnChip/hds/periphSpeedReg/symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "systemOnChip"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ADMS"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_AsmPath"
|
||
|
value "$HEI_LIBS_DIR/NanoBlaze/hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_DesignCompilerPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$ISE_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_LeonardoPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME/modeltech/bin"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_PrecisionRTLPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_QuestaSimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_VCSPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "14:40:20"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "periphSpeedReg"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "francois"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2018.1 (Build 12)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2019"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "19"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "Vhdl2008LangMgr"
|
||
|
uid 51,0
|
||
|
optionalChildren [
|
||
|
*69 (SymbolBody
|
||
|
uid 8,0
|
||
|
optionalChildren [
|
||
|
*70 (CptPort
|
||
|
uid 57,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 82,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "54000,12625,54750,13375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 59,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 60,0
|
||
|
va (VaSet
|
||
|
font "courier,9,0"
|
||
|
)
|
||
|
xt "46500,12400,53000,13300"
|
||
|
st "updatePeriod"
|
||
|
ju 2
|
||
|
blo "53000,13100"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 61,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "2000,10800,34000,11700"
|
||
|
st "updatePeriod : OUT unsigned (updatePeriodBitNb-1 DOWNTO 0) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "updatePeriod"
|
||
|
t "unsigned"
|
||
|
b "(updatePeriodBitNb-1 DOWNTO 0)"
|
||
|
o 1
|
||
|
suid 1,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*71 (CptPort
|
||
|
uid 83,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 88,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "37250,12625,38000,13375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 85,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 86,0
|
||
|
va (VaSet
|
||
|
font "courier,9,0"
|
||
|
)
|
||
|
xt "39000,12400,42000,13300"
|
||
|
st "dataIn"
|
||
|
blo "39000,13100"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 87,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "2000,11700,34500,12600"
|
||
|
st "dataIn : IN std_ulogic_vector (dataBitNb-1 DOWNTO 0) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "dataIn"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(dataBitNb-1 DOWNTO 0)"
|
||
|
o 2
|
||
|
suid 2,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*72 (CptPort
|
||
|
uid 109,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 119,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "37250,14625,38000,15375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 111,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 112,0
|
||
|
va (VaSet
|
||
|
font "courier,9,0"
|
||
|
)
|
||
|
xt "39000,14400,42500,15300"
|
||
|
st "dataOut"
|
||
|
blo "39000,15100"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 113,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "2000,12600,34000,13500"
|
||
|
st "dataOut : OUT std_logic_vector (dataBitNb-1 DOWNTO 0) ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "dataOut"
|
||
|
t "std_logic_vector"
|
||
|
b "(dataBitNb-1 DOWNTO 0)"
|
||
|
o 3
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*73 (CptPort
|
||
|
uid 120,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 121,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "37250,20625,38000,21375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 122,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 123,0
|
||
|
va (VaSet
|
||
|
font "courier,9,0"
|
||
|
)
|
||
|
xt "39000,20400,40000,21300"
|
||
|
st "en"
|
||
|
blo "39000,21100"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 124,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "2000,13500,20000,14400"
|
||
|
st "en : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "en"
|
||
|
t "std_ulogic"
|
||
|
o 4
|
||
|
suid 5,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*74 (CptPort
|
||
|
uid 125,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 126,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "37250,24625,38000,25375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 127,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 128,0
|
||
|
va (VaSet
|
||
|
font "courier,9,0"
|
||
|
)
|
||
|
xt "39000,24400,41500,25300"
|
||
|
st "clock"
|
||
|
blo "39000,25100"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 129,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "2000,14400,20000,15300"
|
||
|
st "clock : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "clock"
|
||
|
t "std_ulogic"
|
||
|
o 5
|
||
|
suid 6,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*75 (CptPort
|
||
|
uid 130,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 131,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "37250,26625,38000,27375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 132,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 133,0
|
||
|
va (VaSet
|
||
|
font "courier,9,0"
|
||
|
)
|
||
|
xt "39000,26400,41500,27300"
|
||
|
st "reset"
|
||
|
blo "39000,27100"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 134,0
|
||
|
va (VaSet
|
||
|
font "courier,8,0"
|
||
|
)
|
||
|
xt "2000,15300,20000,16200"
|
||
|
st "reset : IN std_ulogic ;"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "reset"
|
||
|
t "std_ulogic"
|
||
|
o 6
|
||
|
suid 7,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*76 (CptPort
|
||
|
uid 135,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
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