104 lines
6.5 KiB
ArmAsm
104 lines
6.5 KiB
ArmAsm
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/* ################################################################################################# */
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/* # << NEORV32 - park_loop.S - Execution-Based On-Chip Debugger - Park Loop Code >> # */
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/* # ********************************************************************************************* # */
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/* # BSD 3-Clause License # */
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/* # # */
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/* # Copyright (c) 2021, Stephan Nolting. All rights reserved. # */
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/* # # */
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/* # Redistribution and use in source and binary forms, with or without modification, are # */
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/* # permitted provided that the following conditions are met: # */
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/* # # */
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/* # 1. Redistributions of source code must retain the above copyright notice, this list of # */
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/* # conditions and the following disclaimer. # */
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/* # # */
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/* # 2. Redistributions in binary form must reproduce the above copyright notice, this list of # */
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/* # conditions and the following disclaimer in the documentation and/or other materials # */
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/* # provided with the distribution. # */
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/* # # */
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/* # 3. Neither the name of the copyright holder nor the names of its contributors may be used to # */
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/* # endorse or promote products derived from this software without specific prior written # */
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/* # permission. # */
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/* # # */
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/* # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS # */
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/* # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF # */
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/* # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE # */
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/* # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, # */
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/* # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE # */
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/* # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED # */
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/* # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING # */
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/* # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED # */
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/* # OF THE POSSIBILITY OF SUCH DAMAGE. # */
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/* # ********************************************************************************************* # */
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/* # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting # */
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/* ################################################################################################# */
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// debug memory address map
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.equ DBMEM_CODE_BASE, 0xfffff800 // base address of dbmem.code_memory
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.equ DBMEM_PBUF_BASE, 0xfffff880 // base address of dbmem.program_buffer
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.equ DBMEM_DBUF_BASE, 0xfffff900 // base address of dbmem.data_buffer
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.equ DBMEM_SREG_BASE, 0xfffff980 // base address of dbmem.status_register
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// status register (SREG) bits
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.equ SREG_HALTED_ACK, (1<<0) // -/w: CPU is halted in debug mode and waits in park loop
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.equ SREG_RESUME_REQ, (1<<1) // r/-: DM requests CPU to resume
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.equ SREG_RESUME_ACK, (1<<2) // -/w: CPU starts resuming
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.equ SREG_EXECUTE_REQ, (1<<3) // r/-: DM requests to execute program buffer
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.equ SREG_EXECUTE_ACK, (1<<4) // -/w: CPU starts to execute program buffer
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.equ SREG_EXCEPTION_ACK, (1<<5) // -/w: CPU has detected an exception
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.file "park_loop.S"
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.section .text
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.balign 4
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.option norvc
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.global _start
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.global entry_normal
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.global entry_exception
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_start:
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// BASE + 0: entry for ebreak in debug-mode, halt request or return from single-stepped instruction
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entry_normal:
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jal zero, parking_loop_start
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// BASE + 4: entry for exceptions - signal EXCEPTION to DM and restart parking loop
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entry_exception:
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csrw dscratch0, s0 // save s0 to dscratch0 so we have a general purpose register available
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addi s0, zero, SREG_EXCEPTION_ACK // mask exception acknowledge flag
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sw s0, DBMEM_SREG_BASE(zero) // trigger exception acknowledge to inform DM
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csrr s0, dscratch0 // restore s0 from dscratch0
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ebreak // restart parking loop
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// "parking loop": endless loop that polls the status register to check if the DM
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// wants to execute code from the program buffer or to resume normal CPU/application operation
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parking_loop_start:
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csrw dscratch0, s0 // save s0 to dscratch0 so we have a general purpose register available
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addi s0, zero, SREG_HALTED_ACK
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sw s0, DBMEM_SREG_BASE(zero) // ACK that CPU has halted
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parking_loop:
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lw s0, DBMEM_SREG_BASE(zero) // get status register
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andi s0, s0, SREG_EXECUTE_REQ // request to execute program buffer?
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bnez s0, execute_progbuf // execute program buffer
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lw s0, DBMEM_SREG_BASE(zero) // get status register
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andi s0, s0, SREG_RESUME_REQ // request to resume?
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bnez s0, resume // resume normal operation
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jal zero, parking_loop // restart parking loop polling
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// resume normal operation
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resume:
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addi s0, zero, SREG_RESUME_ACK
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sw s0, DBMEM_SREG_BASE(zero) // ACK that CPU is about to resume
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csrr s0, dscratch0 // restore s0 from dscratch0
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dret // end debug mode
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// execute program buffer
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execute_progbuf:
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addi s0, zero, SREG_EXECUTE_ACK
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sw s0, DBMEM_SREG_BASE(zero) // ACK that execution is about to start
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csrr s0, dscratch0 // restore s0 from dscratch0
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fence.i // synchronize i-cache & prefetch with memory (program buffer)
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jalr zero, zero, %lo(DBMEM_PBUF_BASE) // jump to beginning of program buffer
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