From e187e340173dabdaf447f7cd964ff5e422ad8a63 Mon Sep 17 00:00:00 2001 From: Klagarge Date: Sun, 10 Mar 2024 21:50:07 +0100 Subject: [PATCH] fix coeff calculation --- .../WaveformGenerator/hds/.cache.dat | Bin 4459 -> 4459 bytes .../Prefs/hds_user/v2019.2/hds_user_prefs | 9 +++++---- ...polatorCalculatePolynom_studentVersion.vhd | 16 ++++++++++++++++ ...nterpolatorCoefficients_studentVersion.vhd | 12 ++++++------ ...terpolatorShiftRegister_studentVersion.vhd | 10 ++++++---- .../interpolatorTrigger_studentVersion.vhd | 6 ++++-- .../SplineInterpolator/hds/.cache.dat | Bin 6746 -> 6746 bytes .../SplineInterpolator_test/hds/.cache.dat | Bin 1571 -> 1571 bytes 8 files changed, 37 insertions(+), 16 deletions(-) diff --git a/01-WaveformGenerator/WaveformGenerator/hds/.cache.dat b/01-WaveformGenerator/WaveformGenerator/hds/.cache.dat index 57529abee8ed031b4347c204e9cbfffe3dfa6b90..4fdd97b0f6da5966658625b5dabcdffd4039ed47 100644 GIT binary patch delta 282 zcmaE@^jc{`A^SVYdhM&lMGnjU#3!sd5k@i0~p;WA7EAjs@uW9z+?k9 z-;_lQ!e`tFmS4-F0+n|H%d4>JK;?76^7B|h@<4Y48iMWRWdpebWS%`(eKVUj*xrq7 z8O%U$O_pKL0rGn%ceAHL)G^-%tNX*oIoXFp1mZRUaj=*H56k3UZh_6mIhJq$01u;G AaR2}S delta 282 zcmaE@^jc{`A^XF}8Vn2(?vwl3T_*041ahMo7?^fUW@Pr6tih^Ejy zWMGKg0a7;kKcg~)AE*rG=Q626`L;m5>*RY(GR!w-Wl#RgRLcIEgN=cKv1f7sqx<9o z%u4JxR-Xi#Zv!^pltqjE?)Lpa`Hf)twJa)7c_*;E3abwL-96es`CPF4JXWAQ$Q^-( zV0(GlfbIaBXAf52%%;u!?DFTy8`(0LA3kQAEW@6|3{*e4n>`hxj`=oN-5)m2$vzw+ aK)+sQU=R=oiy82+Oz!0t*nFI02?qex4q*-e diff --git a/02-SplineInterpolator/Prefs/hds_user/v2019.2/hds_user_prefs b/02-SplineInterpolator/Prefs/hds_user/v2019.2/hds_user_prefs index 839e4f0..231044f 100644 --- a/02-SplineInterpolator/Prefs/hds_user/v2019.2/hds_user_prefs +++ b/02-SplineInterpolator/Prefs/hds_user/v2019.2/hds_user_prefs @@ -1281,6 +1281,7 @@ projectPaths [ "C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp" +"C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp" ] libMappingsRootDir "" teamLibMappingsRootDir "" @@ -4149,7 +4150,7 @@ hdsWorkspaceLocation "" relativeLibraryRootDir "" vmLabelLatestDontAskAgain 0 vmLabelWorkspaceDontAskAgain 0 -logWindowGeometry "600x573+405+95" +logWindowGeometry "600x573+406+95" diagramBrowserTabNo 0 showInsertPortHint 0 showContentFirstTime 0 @@ -6217,9 +6218,9 @@ size 180 ] displayHierarchy 0 xPos 0 -yPos 14 -width 1936 -height 1056 +yPos 4 +width 892 +height 982 activeSidePanelTab 2 activeLibraryTab 2 sidePanelSize 278 diff --git a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCalculatePolynom_studentVersion.vhd b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCalculatePolynom_studentVersion.vhd index 775bf7a..b38014d 100644 --- a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCalculatePolynom_studentVersion.vhd +++ b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCalculatePolynom_studentVersion.vhd @@ -1,4 +1,20 @@ ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS + +subtype sample_type is signed(sampleIn'range); +type samples_type is array (1 to 4) of sample_type; +signal samples: samples_type; + BEGIN + + process(clock, reset) begin + if reset = '1' then + samples <= (others => (others => '0')); + elsif rising_edge(clock) then + + + + end if; + end process; + sampleOut <= (others => '0'); END ARCHITECTURE studentVersion; diff --git a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCoefficients_studentVersion.vhd b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCoefficients_studentVersion.vhd index c3f3086..02b17a9 100644 --- a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCoefficients_studentVersion.vhd +++ b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorCoefficients_studentVersion.vhd @@ -10,18 +10,18 @@ BEGIN -- a = - sample1 +3·sample2 -3·sample3 + sample4 -- b = 2·sample1 -5·sample2 +4·sample3 - sample4 -- c = - sample1 + sample3 --- d = sample2 +-- d = sample2 process(sample1, sample2, sample3, sample4) begin - samples(4) <= resize(sample1, coeff'high+1); - samples(3) <= resize(sample2, coeff'high+1); - samples(2) <= resize(sample3, coeff'high+1); - samples(1) <= resize(sample4, coeff'high+1); + samples(1) <= resize(sample1, coeff'high+1); + samples(2) <= resize(sample2, coeff'high+1); + samples(3) <= resize(sample3, coeff'high+1); + samples(4) <= resize(sample4, coeff'high+1); end process; a <= samples(4) - samples(1) + resize( 3*(samples(2) - samples(3)), coeff'high+1); b <= resize(2*samples(1), coeff'high+1) - resize(5*samples(2), coeff'high+1) + resize(4*samples(3), coeff'high+1) - samples(4); c <= samples(3) - samples(1); - d <= samples(4); + d <= samples(2); END ARCHITECTURE studentVersion; diff --git a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorShiftRegister_studentVersion.vhd b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorShiftRegister_studentVersion.vhd index 3b1a6c5..e1d51fa 100644 --- a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorShiftRegister_studentVersion.vhd +++ b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorShiftRegister_studentVersion.vhd @@ -10,17 +10,19 @@ BEGIN if reset = '1' then samples <= (others => (others => '0')); elsif rising_edge(clock) then + if shiftSamples then for i in samples_type'low to samples_type'high-1 loop samples(i+1) <= samples(i); end loop; samples(1) <= sampleIn; end if; + end if; end process; - sample1 <= samples(1); - sample2 <= samples(2); - sample3 <= samples(3); - sample4 <= samples(4); + sample1 <= samples(4); + sample2 <= samples(3); + sample3 <= samples(2); + sample4 <= samples(1); END ARCHITECTURE studentVersion; diff --git a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorTrigger_studentVersion.vhd b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorTrigger_studentVersion.vhd index 2f77eb8..f7aae9f 100644 --- a/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorTrigger_studentVersion.vhd +++ b/02-SplineInterpolator/SplineInterpolator/hdl/interpolatorTrigger_studentVersion.vhd @@ -7,11 +7,13 @@ BEGIN process(clock, reset) begin if reset = '1' then - counter <= (others => '1'); + counter <= (others => '0'); elsif rising_edge(clock) then + if en = '1' then counter <= counter - 1; end if; + end if; end process; @@ -23,5 +25,5 @@ BEGIN triggerOut <= '0'; end if; end process; - + END ARCHITECTURE studentVersion; diff --git a/02-SplineInterpolator/SplineInterpolator/hds/.cache.dat b/02-SplineInterpolator/SplineInterpolator/hds/.cache.dat index d2da9cc3ea6b5ed86a5541037223110a40f393ae..a71f5500721b8d003b5ce30ed1298fa5c61ce351 100644 GIT binary patch delta 337 zcmca*a?4~wC-akOy%T$iK-6SL#u9cQ&A^cIapDA*$p;u!A>6QAAg%$E9`ifN{K<(- zZ9qDE@++oNb|9aDfyHNX0=LiPP0U8@@1(afFfgB;{Eo?evJs0mSbYLZGf+H{fr051 zSo{DZ?_@hx35Z^%2C&|hth(&)WL$x2B*1D^*pwkw2l{}lp2VgERqhB@&d#m{k!ENB zE3aplfbfIFLCPPoOM-3w$6g54wiK*vFNY-9pEo%&Aj*>xLCSkL6~MylIdj0Y99JSl n8*>uawo6<<<7C_?zvIdV8ymx243TGh2{yJtoMp2jk0l=f5lVL4 delta 337 zcmca*a?4~wC-aRN7bo@tZ21 z7C*qqJK2s^0-~3x0jzf=t1kO%p3guv3Sc!VY|0R;1ARbNPhwMoDt81cXJ^-fNHa8m zmDjUNK=?u8AmxwPCBZiTV=rWXc3Tu^>Qb<>y&RHYm*3>bfGAH&1S#*~Q~(RF=ga}q xa$JcJ+nAHUwq4?qWPYt}G5H-=HrUu0?qc@WB4-#F*j|E-Z4hVKtjJ@@2LSp9e|P`@ diff --git a/02-SplineInterpolator/SplineInterpolator_test/hds/.cache.dat b/02-SplineInterpolator/SplineInterpolator_test/hds/.cache.dat index 8507b756719aed2180446abea31c28f9402a7429..9b8b2107484251fc727d916de007852a9c6d5d4a 100644 GIT binary patch delta 93 zcmZ3?vzTW>HS?2cy%X!Q!PJ`!5H&fRF_-HS>)b7bn(bgQ+(eAZl_rV=nu%{oV`=j9Qb|GWkqi!N?