### For reference, see TN1262 / FPGA-TN-02032 # .lpf file format is not really documented by Lattice, normally generated through Diamond ################ #### sysCONFIG ################ # The BLOCK commands disable tracing of paths within clock domains (impacting overall timing score) # It can also be used on paths if the TRACE should not consider the clock domain crossing # like : BLOCK PATH FROM CLKNET "CLK_A" TO CLKNET "CLK_B" ; BLOCK RESETPATHS ; BLOCK ASYNCPATHS ; BLOCK JTAGPATHS ; BLOCK RD_DURING_WR_PATHS ; # Not comprehensive # dflt : CONFIG_IOVOLTAGE 1.2, 1.5, 1.8, 2.5(dflt), 3.3 voltage is 3.3V # dflt : COMPRESS_CONFIG OFF (dflt), ON no bitstream compression # mod : MCCLK_FREQ 2.4, 4.8, 9.7, 19.4, 38.8, 62 NOR program read @ 62MHz # mod : MASTER_SPI_PORT DISABLE (dflt), ENABLE master SPI port stays SPI and not GPIOs, other mods disabled by dflt # dflt : BACKGROUND_RECONFIG - no soft ERC when hot-loading bitstream (due to cosmic rays) # dflt : DONE_PULL ON (dflt), OFF IPU on DONE pin # dflt : DONE_EX OFF (dflt), ON not delaying end of the configuration (used for daisy chaining FPGAs) # mod : DONE_OD OFF (dflt), ON DONE pin as open-drain instead of push-pull # dflt : CONFIG_SECURE OFF (dflt), ON allows external access to current program # mod : CONFIG_MODE JTAG (dflt), SSPI, SPI_SERIAL, SPI_DUAL, SPI_QUAD, SLAVE_PARALLEL, SLAVE_SERIAL # which bus and mode is used to load configuration (for the Lattic IDE) # dflt : TRANSFR OFF (dflt), ON if using TransFR tool from Lattice # dflt : WAKE_UP 4 (set DONE=1 before starting user code, dflt for DONE_EX=ON) # 21 (set DONE=1 once FPGA is already running user code, dflt for DONE_EX=OFF) # mod : INBUF ON, OFF disable unused input buffers (not sure it impacts the ECP5 family) SYSCONFIG MCCLK_FREQ=62 MASTER_SPI_PORT=ENABLE DONE_OD=ON CONFIG_MODE=SPI_QUAD INBUF=OFF CONFIG_IOVOLTAGE=3.3 ; IOBUF ALLPORTS IO_TYPE=LVCMOS33 ; ################ #### Labs DB ################ ### Clock and reset ### #INPUT_SETUP ALLPORTS 50.000000 ns HOLD 10.000000 ns CLKPORT "CLK" ; #INPUT_SETUP PORT "nRST" 50.000000 ns CLKPORT "CLK" ; FREQUENCY PORT "clock" 100.000000 MHz ; LOCATE COMP "clock" SITE "K16" ; IOBUF PORT "clock" PULLMODE=NONE ; LOCATE COMP "reset_N" SITE "E13" ; GSR_NET NET "resetSynch_N"; ### LEDs ### LOCATE COMP "LED1" SITE "T14" ;# red LOCATE COMP "LED2" SITE "R14" ;# green LOCATE COMP "LED3" SITE "T15" ;# blue ################ #### SODIMM-200 ################ ### PP2 ### LOCATE COMP "xOut" SITE "G3" ; LOCATE COMP "yOut" SITE "E1" ; #LOCATE COMP "" SITE "F3" ; LOCATE COMP "triggerOut" SITE "D1" ; #LOCATE COMP "" SITE "F4" ; #LOCATE COMP "" SITE "C1" ; #LOCATE COMP "" SITE "D7" ; #LOCATE COMP "" SITE "B6" ; #LOCATE COMP "" SITE "C7" ; #LOCATE COMP "" SITE "A6" ; # PP2 11 #LOCATE COMP "" SITE "D8" ; # PP2 13 #LOCATE COMP "" SITE "B7" ; # PP2 15 #LOCATE COMP "" SITE "C8" ; # PP2 17 #LOCATE COMP "" SITE "A7" ; # PP2 19 #LOCATE COMP "" SITE "E9" ; # PP2 21 #LOCATE COMP "" SITE "A8" ; # PP2 23 #LOCATE COMP "" SITE "D9" ; # PP2 25 ### PP1 ### #LOCATE COMP "" SITE "A9" ; #LOCATE COMP "" SITE "D10" ; #LOCATE COMP "" SITE "A10" ; #LOCATE COMP "" SITE "C10" ; #LOCATE COMP "" SITE "B10" ; #LOCATE COMP "" SITE "C12" ; #LOCATE COMP "" SITE "B12" ; #LOCATE COMP "" SITE "D13" ; #LOCATE COMP "" SITE "A13" ; #LOCATE COMP "" SITE "M5" ; # PP1 11 #LOCATE COMP "" SITE "L5" ; # PP1 13 #LOCATE COMP "" SITE "K5" ; # PP1 15 #LOCATE COMP "" SITE "H5" ; # PP1 17 #LOCATE COMP "" SITE "E8" ; # PP1 19 #LOCATE COMP "" SITE "E5" ; # PP1 21 #LOCATE COMP "" SITE "E6" ; # PP1 23 #LOCATE COMP "" SITE "E7" ; # PP1 25 ### USB (FTDI2232HL located on the daughterboard) ### #LOCATE COMP "TxD" SITE "A14" ; #IOBUF PORT "TxD" SLEWRATE=FAST ; #LOCATE COMP "RxD" SITE "B14" ; #IOBUF PORT "RxD" PULLMODE=UP ; #LOCATE COMP "USB_DB_RTS" SITE "B13" ; #IOBUF PORT "USB_DB_RTS" SLEWRATE=FAST ; #LOCATE COMP "USB_DB_CTS" SITE "C13" ; #IOBUF PORT "USB_DB_CTS" PULLMODE=UP ; ################ #### Extras ################ ### SD Flash (External SD card) ### #LOCATE COMP "SD_DETECT" SITE "G12" ; #IOBUF PORT "SD_DETECT" PULLMODE=UP ; #LOCATE COMP "SD_CMD" SITE "C15" ; #IOBUF PORT "SD_CMD" SLEWRATE=FAST ; #LOCATE COMP "SD_CLK" SITE "B15" ; #IOBUF PORT "SD_CLK" SLEWRATE=FAST ; #LOCATE COMP "SD_DTA[0]" SITE "B16" ; ##IOBUF PORT "SD_DTA[0]" SLEWRATE=FAST ; #LOCATE COMP "SD_DTA[1]" SITE "C16" ; ##IOBUF PORT "SD_DTA[1]" SLEWRATE=FAST ; #LOCATE COMP "SD_DTA[2]" SITE "F12" ; ##IOBUF PORT "SD_DTA[2]" SLEWRATE=FAST ; #LOCATE COMP "SD_DTA[3]" SITE "C14" ; ##IOBUF PORT "SD_DTA[3]" SLEWRATE=FAST ; ### DRAM ### #LOCATE COMP "DRAM_ADDR[0]" SITE "J15" ; #IOBUF PORT "DRAM_ADDR[0]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[1]" SITE "L16" ; #IOBUF PORT "DRAM_ADDR[1]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[2]" SITE "L15" ; #IOBUF PORT "DRAM_ADDR[2]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[3]" SITE "K15" ; #IOBUF PORT "DRAM_ADDR[3]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[4]" SITE "G15" ; #IOBUF PORT "DRAM_ADDR[4]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[5]" SITE "F15" ; #IOBUF PORT "DRAM_ADDR[5]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[6]" SITE "F16" ; #IOBUF PORT "DRAM_ADDR[6]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[7]" SITE "E16" ; #IOBUF PORT "DRAM_ADDR[7]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[8]" SITE "E15" ; #IOBUF PORT "DRAM_ADDR[8]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[9]" SITE "G13" ; #IOBUF PORT "DRAM_ADDR[9]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[10]" SITE "M16" ; #IOBUF PORT "DRAM_ADDR[10]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[11]" SITE "F13" ; #IOBUF PORT "DRAM_ADDR[11]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_ADDR[12]" SITE "D16" ; #IOBUF PORT "DRAM_ADDR[12]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_BA[0]" SITE "L14" ; #IOBUF PORT "DRAM_BA[0]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_BA[1]" SITE "L13" ; #IOBUF PORT "DRAM_BA[1]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_CLK" SITE "G14" ; #IOBUF PORT "DRAM_CLK" SLEWRATE=FAST ; #LOCATE COMP "DRAM_CKE" SITE "G16" ; #IOBUF PORT "DRAM_CKE" SLEWRATE=FAST ; #LOCATE COMP "DRAM_nRAS" SITE "M14" ; #IOBUF PORT "DRAM_nRAS" SLEWRATE=FAST ; #LOCATE COMP "DRAM_nCAS" SITE "K13" ; #IOBUF PORT "DRAM_nCAS" SLEWRATE=FAST ; #LOCATE COMP "DRAM_nWE" SITE "N16" ; #IOBUF PORT "DRAM_nWE" SLEWRATE=FAST ; #LOCATE COMP "DRAM_nCS" SITE "M15" ; #LOCATE COMP "DRAM_DQ[0]" SITE "P14" ; #LOCATE COMP "DRAM_DQ[1]" SITE "R15" ; #LOCATE COMP "DRAM_DQ[2]" SITE "N14" ; #LOCATE COMP "DRAM_DQ[3]" SITE "R16" ; #LOCATE COMP "DRAM_DQ[4]" SITE "J14" ; #LOCATE COMP "DRAM_DQ[5]" SITE "P15" ; #LOCATE COMP "DRAM_DQ[6]" SITE "K14" ; #LOCATE COMP "DRAM_DQ[7]" SITE "P16" ; #LOCATE COMP "DRAM_DQ[8]" SITE "D14" ; #LOCATE COMP "DRAM_DQ[9]" SITE "H14" ; #LOCATE COMP "DRAM_DQ[10]" SITE "H12" ; #LOCATE COMP "DRAM_DQ[11]" SITE "H13" ; #LOCATE COMP "DRAM_DQ[12]" SITE "E14" ; #LOCATE COMP "DRAM_DQ[13]" SITE "H15" ; #LOCATE COMP "DRAM_DQ[14]" SITE "J13" ; #LOCATE COMP "DRAM_DQ[15]" SITE "J16" ; #LOCATE COMP "DRAM_DQM[0]" SITE "M13" ; #IOBUF PORT "DRAM_DQM[0]" SLEWRATE=FAST ; #LOCATE COMP "DRAM_DQM[1]" SITE "F14" ; #IOBUF PORT "DRAM_DQM[1]" SLEWRATE=FAST ; ### USB (chip located on the motherboard) ### #LOCATE COMP "USB_MB_TX" SITE "M11" ; #IOBUF PORT "USB_MB_TX" SLEWRATE=FAST ; #LOCATE COMP "USB_MB_RX" SITE "N12" ; #IOBUF PORT "USB_MB_RX" PULLMODE=UP ; #LOCATE COMP "USB_MB_RTS" SITE "N11" ; #IOBUF PORT "USB_MB_RTS" SLEWRATE=FAST ; #LOCATE COMP "USB_MB_CTS" SITE "M12" ; #IOBUF PORT "USB_MB_CTS" PULLMODE=UP ; ### PMOD1 ### #LOCATE COMP "dbg_leds[16]" SITE "P1" ; #LOCATE COMP "dbg_leds[17]" SITE "N4" ; #LOCATE COMP "dbg_leds[18]" SITE "P2" ; #LOCATE COMP "dbg_leds[19]" SITE "P5" ; #LOCATE COMP "dbg_leds[20]" SITE "R1" ; #LOCATE COMP "dbg_leds[21]" SITE "N5" ; #LOCATE COMP "dbg_leds[22]" SITE "R2" ; #LOCATE COMP "dbg_leds[23]" SITE "N6" ; ### PMOD2 ### #LOCATE COMP "dbg_leds[24]" SITE "R3" ; #LOCATE COMP "dbg_leds[25]" SITE "P11" ; #LOCATE COMP "dbg_leds[26]" SITE "P12" ; #LOCATE COMP "dbg_leds[27]" SITE "T3" ; #LOCATE COMP "dbg_leds[28]" SITE "R4" ; #LOCATE COMP "dbg_leds[29]" SITE "R12" ; #LOCATE COMP "dbg_leds[30]" SITE "T13" ; #LOCATE COMP "dbg_leds[31]" SITE "R5" ; ### PMOD3 ### #LOCATE COMP "dbg_leds[8]" SITE "B2" ; #LOCATE COMP "dbg_leds[9]" SITE "B3" ; #LOCATE COMP "dbg_leds[10]" SITE "A4" ; #LOCATE COMP "dbg_leds[11]" SITE "D4" ; #LOCATE COMP "dbg_leds[12]" SITE "A2" ; #LOCATE COMP "dbg_leds[13]" SITE "B4" ; #LOCATE COMP "dbg_leds[14]" SITE "C3" ; #LOCATE COMP "dbg_leds[15]" SITE "C4" ; ### PMOD4 ### #LOCATE COMP "dbg_leds[0]" SITE "J4" ; #LOCATE COMP "dbg_leds[1]" SITE "J5" ; #LOCATE COMP "dbg_leds[2]" SITE "H4" ; #LOCATE COMP "dbg_leds[3]" SITE "E4" ; #LOCATE COMP "dbg_leds[4]" SITE "J3" ; #LOCATE COMP "dbg_leds[5]" SITE "H3" ; #LOCATE COMP "dbg_leds[6]" SITE "E3" ; #LOCATE COMP "dbg_leds[7]" SITE "D3" ; ### Ethernet ### #LOCATE COMP "ETH_CLK_EN" SITE "B1" ; #LOCATE COMP "ETH_nRESET" SITE "C2" ; #LOCATE COMP "ETH_nLED_Y" SITE "F1" ; #LOCATE COMP "ETH_nLED_G" SITE "G2" ; #LOCATE COMP "ETH_MDC" SITE "J1" ; #LOCATE COMP "ETH_MDIO" SITE "H2" ; #IOBUF PORT "ETH_MDIO" OPENDRAIN=ON SLEWRATE=FAST ; #LOCATE COMP "ETH_MDINT" SITE "G1" ; #IOBUF PORT "ETH_MDINT" SLEWRATE=FAST ; #LOCATE COMP "ETH_REF_CLK" SITE "P3" ; #LOCATE COMP "ETH_TX_CLK" SITE "M4" ; #IOBUF PORT "ETH_TX_CLK" SLEWRATE=FAST ; #LOCATE COMP "ETH_TX_CTL" SITE "N3" ; #IOBUF PORT "ETH_TX_CTL" SLEWRATE=FAST ; #LOCATE COMP "ETH_TXD[0]" SITE "M3" ; #IOBUF PORT "ETH_TXD[0]" SLEWRATE=FAST ; #LOCATE COMP "ETH_TXD[1]" SITE "L4" ; #IOBUF PORT "ETH_TXD[1]" SLEWRATE=FAST ; #LOCATE COMP "ETH_TXD[2]" SITE "K4" ; #IOBUF PORT "ETH_TXD[2]" SLEWRATE=FAST ; #LOCATE COMP "ETH_TXD[3]" SITE "K3" ; #IOBUF PORT "ETH_TXD[3]" SLEWRATE=FAST ; #LOCATE COMP "ETH_RX_CLK" SITE "K1" ; #LOCATE COMP "ETH_RX_CTL" SITE "K2" ; #LOCATE COMP "ETH_RXD[0]" SITE "L1" ; #LOCATE COMP "ETH_RXD[1]" SITE "L2" ; #LOCATE COMP "ETH_RXD[2]" SITE "M1" ; #LOCATE COMP "ETH_RXD[3]" SITE "M2" ; ### Extras ### #LOCATE COMP "EXT[1]" SITE "P13" ; #LOCATE COMP "EXT[2]" SITE "R13" ; #LOCATE COMP "EXT[3]" SITE "A3" ; #LOCATE COMP "EXT[4]" SITE "A5" ; #LOCATE COMP "EXT[5]" SITE "B5" ; #LOCATE COMP "EXT[6]" SITE "C5" ; #LOCATE COMP "EXT[7]" SITE "C6" ; #LOCATE COMP "EXT[8]" SITE "D5" ; #LOCATE COMP "EXT[9]" SITE "D6" ; #LOCATE COMP "EXT[10]" SITE "A11" ; #LOCATE COMP "EXT[11]" SITE "A12" ; #LOCATE COMP "EXT[12]" SITE "B8" ; #LOCATE COMP "EXT[13]" SITE "B9" ; #LOCATE COMP "EXT[14]" SITE "B11" ; #LOCATE COMP "EXT[15]" SITE "C9" ; #LOCATE COMP "EXT[16]" SITE "C11" ; #LOCATE COMP "EXT[17]" SITE "D11" ; #LOCATE COMP "EXT[18]" SITE "D12" ; #LOCATE COMP "EXT[19]" SITE "E10" ; #LOCATE COMP "EXT[20]" SITE "E11" ; #LOCATE COMP "EXT[21]" SITE "E12" ; #LOCATE COMP "EXT[22]" SITE "L3" ; #LOCATE COMP "EXT[23]" SITE "M6" ; #LOCATE COMP "EXT[24]" SITE "N1" ; #LOCATE COMP "EXT[25]" SITE "P4" ; #LOCATE COMP "EXT[26]" SITE "P6" ; #LOCATE COMP "EXT[27]" SITE "T2" ; #LOCATE COMP "EXT[28]" SITE "T4" ; #LOCATE COMP "EXT[29]" SITE "E2" ; #LOCATE COMP "EXT[30]" SITE "F2" ; #LOCATE COMP "EXT[31]" SITE "F5" ; #LOCATE COMP "EXT[32]" SITE "G4" ; #LOCATE COMP "EXT[33]" SITE "G5" ; #LOCATE COMP "EXT[34]" SITE "J2" ;