130 lines
4.8 KiB
VHDL
130 lines
4.8 KiB
VHDL
LIBRARY std;
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USE std.TEXTIO.all;
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LIBRARY Common_test;
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USE Common_test.testUtils.all;
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ARCHITECTURE RTL OF uvmRs232Driver IS
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-- parameters
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signal baudRate_int: real;
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signal baudPeriod, characterPeriod: time;
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constant uartDataBitNb: positive := 9;
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constant maxStringLength: positive := driverTransaction'length;
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-- Tx signals
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signal outString : string(1 to maxStringLength);
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signal sendString: std_uLogic := '0';
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signal outChar: character;
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signal sendChar: std_ulogic := '0';
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signal sendParity, parityInit: std_ulogic := '0';
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-- debug
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signal outChar_debug: unsigned(uartDataBitNb-1 downto 0);
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BEGIN
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------------------------------------------------------------------------------
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-- interpret transaction
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interpretTransaction: process
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variable myLine : line;
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variable commandPart : line;
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variable baudRate_nat : natural;
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file dataFile : text;
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variable dataLine : line;
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begin
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wait on driverTransaction;
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write(myLine, driverTransaction);
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rm_side_separators(myLine);
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read_first(myLine, commandPart);
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if commandPart.all = "uart_baud" then
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read(myLine, baudRate_nat);
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baudRate_int <= real(baudRate_nat);
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elsif commandPart.all = "uart_parity" then
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sendParity <= '0';
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parityInit <= '0';
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if myLine.all = "even" then
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sendParity <= '1';
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elsif myLine.all = "odd" then
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sendParity <= '1';
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parityInit <= '1';
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end if;
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elsif commandPart.all = "uart_send" then
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outString <= pad(myLine.all, outString'length);
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sendString <= '1', '0' after 1 ns;
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elsif commandPart.all = "uart_send_file" then
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file_open(dataFile, "$SIMULATION_DIR/" & myLine.all, read_mode);
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while not endFile(dataFile) loop
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readLine(dataFile, dataLine);
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--print(dataLine.all);
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outString <= pad(dataLine.all, outString'length);
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sendString <= '1', '0' after 1 ns;
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wait for (dataLine'length+8) * characterPeriod;
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end loop;
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file_close(dataFile);
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end if;
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deallocate(myLine);
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end process interpretTransaction;
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baudRate <= baudRate_int;
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baudPeriod <= 1.0/baudRate_int * 1 sec;
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characterPeriod <= 15*baudPeriod;
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--============================================================================
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-- send string on RxD line
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uartSendString: process
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variable outStringRight: natural;
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begin
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-- wait for command
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sendChar <= '0';
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wait until rising_edge(sendString);
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-- find string length
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outStringRight := outString'right;
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while outString(outStringRight) = ' ' loop
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outStringRight := outStringRight-1;
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end loop;
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-- send characters
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for index in outString'left to outStringRight loop
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outChar <= outString(index);
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--print(sprintf("%2X", character'pos(outChar)));
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sendChar <= '1', '0' after 1 ns;
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wait for characterPeriod;
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end loop;
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-- send carriage return
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outChar <= cr;
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sendChar <= '1', '0' after 1 ns;
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wait for characterPeriod;
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end process uartSendString;
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------------------------------------------------------------------------------
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-- send character on RxD line
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uartSendChar: process
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variable outChar_unsigned: unsigned(uartDataBitNb-1 downto 0);
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begin
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-- wait for trigger
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RxD <= '1';
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wait until rising_edge(sendChar);
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-- transform char to bit vector
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outChar_unsigned := to_unsigned(
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character'pos(outChar),
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outChar_unsigned'length
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);
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outChar_unsigned(outChar_unsigned'high) := '1';
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if sendParity = '1' then
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outChar_unsigned(outChar_unsigned'high) := parityInit;
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for index in uartDataBitNb-2 downto 0 loop
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outChar_unsigned(outChar_unsigned'high)
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:= outChar_unsigned(outChar_unsigned'high)
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xor outChar_unsigned(index);
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end loop;
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end if;
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outChar_debug <= outChar_unsigned;
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-- send start bit
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RxD <= '0';
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wait for baudPeriod;
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-- send data bits
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for index in outChar_unsigned'reverse_range loop
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RxD <= outChar_unsigned(index);
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wait for baudPeriod;
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end loop;
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end process uartSendChar;
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END ARCHITECTURE RTL;
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