1
0
SEm-Labos/06-07-08-09-SystemOnChip/SystemOnChip/hds/ahb@beamer@operator/empty.bd
github-classroom[bot] d212040c30
Initial commit
2024-02-23 13:01:05 +00:00

3079 lines
36 KiB
Plaintext

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dialect 11
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "ieee"
unitName "numeric_std"
)
]
libraryRefs [
"ieee"
]
)
version "32.1"
appVersion "2019.2 (Build 5)"
noEmbeddedEditors 1
model (BlockDiag
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds\\ahb@beamer@operator\\empty.bd.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds\\ahb@beamer@operator\\empty.bd.user"
)
(vvPair
variable "SourceDir"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "empty"
)
(vvPair
variable "asm_file"
value "beamer.asm"
)
(vvPair
variable "concat_file"
value "concatenated"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds\\ahb@beamer@operator"
)
(vvPair
variable "d_logical"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds\\ahbBeamerOperator"
)
(vvPair
variable "date"
value "28.04.2023"
)
(vvPair
variable "day"
value "ven."
)
(vvPair
variable "day_long"
value "vendredi"
)
(vvPair
variable "dd"
value "28"
)
(vvPair
variable "designName"
value "$DESIGN_NAME"
)
(vvPair
variable "entity_name"
value "ahbBeamerOperator"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "empty.bd"
)
(vvPair
variable "f_logical"
value "empty.bd"
)
(vvPair
variable "f_noext"
value "empty"
)
(vvPair
variable "graphical_source_author"
value "axel.amand"
)
(vvPair
variable "graphical_source_date"
value "28.04.2023"
)
(vvPair
variable "graphical_source_group"
value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "WE7860"
)
(vvPair
variable "graphical_source_time"
value "15:00:51"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "WE7860"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "SystemOnChip"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/SystemOnChip"
)
(vvPair
variable "mm"
value "04"
)
(vvPair
variable "module_name"
value "ahbBeamerOperator"
)
(vvPair
variable "month"
value "avr."
)
(vvPair
variable "month_long"
value "avril"
)
(vvPair
variable "p"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds\\ahb@beamer@operator\\empty.bd"
)
(vvPair
variable "p_logical"
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\SystemOnChip\\hds\\ahbBeamerOperator\\empty.bd"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "hds"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_ADMS"
value "<TBD>"
)
(vvPair
variable "task_AsmPath"
value "$HEI_LIBS_DIR/NanoBlaze/hdl"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_HDSPath"
value "$HDS_HOME"
)
(vvPair
variable "task_ISEBinPath"
value "$ISE_HOME"
)
(vvPair
variable "task_ISEPath"
value "$ISE_WORK_DIR"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "$MODELSIM_HOME/modeltech/bin"
)
(vvPair
variable "task_NC"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "bd"
)
(vvPair
variable "this_file"
value "empty"
)
(vvPair
variable "this_file_logical"
value "empty"
)
(vvPair
variable "time"
value "15:00:51"
)
(vvPair
variable "unit"
value "ahbBeamerOperator"
)
(vvPair
variable "user"
value "axel.amand"
)
(vvPair
variable "version"
value "2019.2 (Build 5)"
)
(vvPair
variable "view"
value "empty"
)
(vvPair
variable "year"
value "2023"
)
(vvPair
variable "yy"
value "23"
)
]
)
LanguageMgr "Vhdl2008LangMgr"
uid 184,0
optionalChildren [
*1 (PortIoIn
uid 9,0
shape (CompositeShape
uid 10,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 11,0
sl 0
ro 270
xt "-2000,7625,-500,8375"
)
(Line
uid 12,0
sl 0
ro 270
xt "-500,8000,0,8000"
pts [
"-500,8000"
"0,8000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 13,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 14,0
va (VaSet
)
xt "-6400,7500,-3000,8700"
st "clock"
ju 2
blo "-3000,8500"
tm "WireNameMgr"
)
)
)
*2 (Net
uid 21,0
decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 1,0
)
declText (MLText
uid 22,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,3600,33200,4600"
st "clock : std_ulogic"
)
)
*3 (PortIoIn
uid 23,0
shape (CompositeShape
uid 24,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 25,0
sl 0
ro 270
xt "-2000,11625,-500,12375"
)
(Line
uid 26,0
sl 0
ro 270
xt "-500,12000,0,12000"
pts [
"-500,12000"
"0,12000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 27,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 28,0
va (VaSet
)
xt "-11300,11500,-3000,12700"
st "interpolateLin"
ju 2
blo "-3000,12500"
tm "WireNameMgr"
)
)
)
*4 (Net
uid 35,0
decl (Decl
n "interpolateLin"
t "std_ulogic"
o 7
suid 2,0
)
declText (MLText
uid 36,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,6800,33900,7800"
st "interpolateLin : std_ulogic"
)
)
*5 (PortIoIn
uid 37,0
shape (CompositeShape
uid 38,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 39,0
sl 0
ro 270
xt "-2000,15625,-500,16375"
)
(Line
uid 40,0
sl 0
ro 270
xt "-500,16000,0,16000"
pts [
"-500,16000"
"0,16000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 41,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 42,0
va (VaSet
)
xt "-6800,15500,-3000,16700"
st "memX"
ju 2
blo "-3000,16500"
tm "WireNameMgr"
)
)
)
*6 (Net
uid 49,0
decl (Decl
n "memX"
t "std_ulogic_vector"
b "(signalBitNb-1 DOWNTO 0)"
o 9
suid 3,0
)
declText (MLText
uid 50,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,8400,48500,9400"
st "memX : std_ulogic_vector(signalBitNb-1 DOWNTO 0)"
)
)
*7 (PortIoIn
uid 51,0
shape (CompositeShape
uid 52,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 53,0
sl 0
ro 270
xt "-2000,19625,-500,20375"
)
(Line
uid 54,0
sl 0
ro 270
xt "-500,20000,0,20000"
pts [
"-500,20000"
"0,20000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 55,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 56,0
va (VaSet
)
xt "-6800,19500,-3000,20700"
st "memY"
ju 2
blo "-3000,20500"
tm "WireNameMgr"
)
)
)
*8 (Net
uid 63,0
decl (Decl
n "memY"
t "std_ulogic_vector"
b "(signalBitNb-1 DOWNTO 0)"
o 10
suid 4,0
)
declText (MLText
uid 64,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,9200,48500,10200"
st "memY : std_ulogic_vector(signalBitNb-1 DOWNTO 0)"
)
)
*9 (PortIoOut
uid 65,0
shape (CompositeShape
uid 66,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 67,0
sl 0
ro 270
xt "60500,7625,62000,8375"
)
(Line
uid 68,0
sl 0
ro 270
xt "60000,8000,60500,8000"
pts [
"60000,8000"
"60500,8000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 69,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 70,0
va (VaSet
)
xt "63000,7500,66000,8700"
st "outX"
blo "63000,8500"
tm "WireNameMgr"
)
)
)
*10 (Net
uid 77,0
decl (Decl
n "outX"
t "std_ulogic"
o 1
suid 5,0
)
declText (MLText
uid 78,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,2000,33300,3000"
st "outX : std_ulogic"
)
)
*11 (PortIoOut
uid 79,0
shape (CompositeShape
uid 80,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 81,0
sl 0
ro 270
xt "60500,11625,62000,12375"
)
(Line
uid 82,0
sl 0
ro 270
xt "60000,12000,60500,12000"
pts [
"60000,12000"
"60500,12000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 83,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 84,0
va (VaSet
)
xt "63000,11500,66000,12700"
st "outY"
blo "63000,12500"
tm "WireNameMgr"
)
)
)
*12 (Net
uid 91,0
decl (Decl
n "outY"
t "std_ulogic"
o 5
suid 6,0
)
declText (MLText
uid 92,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,5200,33300,6200"
st "outY : std_ulogic"
)
)
*13 (PortIoIn
uid 93,0
shape (CompositeShape
uid 94,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 95,0
sl 0
ro 270
xt "-2000,23625,-500,24375"
)
(Line
uid 96,0
sl 0
ro 270
xt "-500,24000,0,24000"
pts [
"-500,24000"
"0,24000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 97,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 98,0
va (VaSet
)
xt "-6300,23500,-3000,24700"
st "reset"
ju 2
blo "-3000,24500"
tm "WireNameMgr"
)
)
)
*14 (Net
uid 105,0
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 7,0
)
declText (MLText
uid 106,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,4400,33200,5400"
st "reset : std_ulogic"
)
)
*15 (PortIoIn
uid 107,0
shape (CompositeShape
uid 108,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 109,0
sl 0
ro 270
xt "-2000,27625,-500,28375"
)
(Line
uid 110,0
sl 0
ro 270
xt "-500,28000,0,28000"
pts [
"-500,28000"
"0,28000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 111,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 112,0
va (VaSet
)
xt "-5300,27500,-3000,28700"
st "run"
ju 2
blo "-3000,28500"
tm "WireNameMgr"
)
)
)
*16 (Net
uid 119,0
decl (Decl
n "run"
t "std_ulogic"
o 2
suid 8,0
)
declText (MLText
uid 120,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,2800,33100,3800"
st "run : std_ulogic"
)
)
*17 (PortIoIn
uid 121,0
shape (CompositeShape
uid 122,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 123,0
sl 0
ro 270
xt "-2000,31625,-500,32375"
)
(Line
uid 124,0
sl 0
ro 270
xt "-500,32000,0,32000"
pts [
"-500,32000"
"0,32000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 125,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 126,0
va (VaSet
)
xt "-8800,31500,-3000,32700"
st "selSinCos"
ju 2
blo "-3000,32500"
tm "WireNameMgr"
)
)
)
*18 (Net
uid 133,0
decl (Decl
n "selSinCos"
t "std_ulogic"
o 6
suid 9,0
)
declText (MLText
uid 134,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,6000,33800,7000"
st "selSinCos : std_ulogic"
)
)
*19 (PortIoIn
uid 135,0
shape (CompositeShape
uid 136,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 137,0
sl 0
ro 270
xt "-2000,35625,-500,36375"
)
(Line
uid 138,0
sl 0
ro 270
xt "-500,36000,0,36000"
pts [
"-500,36000"
"0,36000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 139,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 140,0
va (VaSet
)
xt "-11000,35500,-3000,36700"
st "updatePeriod"
ju 2
blo "-3000,36500"
tm "WireNameMgr"
)
)
)
*20 (Net
uid 147,0
decl (Decl
n "updatePeriod"
t "unsigned"
b "(updatePeriodBitNb-1 DOWNTO 0)"
o 8
suid 10,0
)
declText (MLText
uid 148,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,7600,48400,8600"
st "updatePeriod : unsigned(updatePeriodBitNb-1 DOWNTO 0)"
)
)
*21 (PortIoOut
uid 370,0
shape (CompositeShape
uid 371,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
uid 372,0
sl 0
ro 270
xt "57500,19625,59000,20375"
)
(Line
uid 373,0
sl 0
ro 270
xt "57000,20000,57500,20000"
pts [
"57000,20000"
"57500,20000"
]
)
]
)
stc 0
sf 1
tg (WTG
uid 374,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 375,0
va (VaSet
)
xt "60000,19500,67600,20700"
st "newPolynom"
blo "60000,20500"
tm "WireNameMgr"
)
)
)
*22 (Net
uid 384,0
decl (Decl
n "newPolynom"
t "std_ulogic"
o 11
suid 12,0
)
declText (MLText
uid 385,0
va (VaSet
font "Verdana,8,0"
)
xt "22000,10000,34900,11000"
st "newPolynom : std_ulogic"
)
)
*23 (Wire
uid 15,0
shape (OrthoPolyLine
uid 16,0
va (VaSet
vasetType 3
)
xt "0,8000,10000,8000"
pts [
"0,8000"
"10000,8000"
]
)
start &1
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 19,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 20,0
va (VaSet
isHidden 1
)
xt "2000,7000,5400,8200"
st "clock"
blo "2000,8000"
tm "WireNameMgr"
)
)
on &2
)
*24 (Wire
uid 29,0
shape (OrthoPolyLine
uid 30,0
va (VaSet
vasetType 3
)
xt "0,12000,10000,12000"
pts [
"0,12000"
"10000,12000"
]
)
start &3
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 33,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 34,0
va (VaSet
isHidden 1
)
xt "2000,11000,10300,12200"
st "interpolateLin"
blo "2000,12000"
tm "WireNameMgr"
)
)
on &4
)
*25 (Wire
uid 43,0
shape (OrthoPolyLine
uid 44,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "0,16000,10000,16000"
pts [
"0,16000"
"10000,16000"
]
)
start &5
sat 32
eat 16
sty 1
st 0
sf 1
si 0
tg (WTG
uid 47,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 48,0
va (VaSet
isHidden 1
)
xt "2000,15000,17100,16200"
st "memX : (signalBitNb-1:0)"
blo "2000,16000"
tm "WireNameMgr"
)
)
on &6
)
*26 (Wire
uid 57,0
shape (OrthoPolyLine
uid 58,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "0,20000,10000,20000"
pts [
"0,20000"
"10000,20000"
]
)
start &7
sat 32
eat 16
sty 1
st 0
sf 1
si 0
tg (WTG
uid 61,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 62,0
va (VaSet
isHidden 1
)
xt "2000,19000,17100,20200"
st "memY : (signalBitNb-1:0)"
blo "2000,20000"
tm "WireNameMgr"
)
)
on &8
)
*27 (Wire
uid 71,0
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
)
xt "50000,8000,60000,8000"
pts [
"60000,8000"
"50000,8000"
]
)
start &9
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
isHidden 1
)
xt "59000,7000,62000,8200"
st "outX"
blo "59000,8000"
tm "WireNameMgr"
)
)
on &10
)
*28 (Wire
uid 85,0
shape (OrthoPolyLine
uid 86,0
va (VaSet
vasetType 3
)
xt "50000,12000,60000,12000"
pts [
"60000,12000"
"50000,12000"
]
)
start &11
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 89,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 90,0
va (VaSet
isHidden 1
)
xt "59000,11000,62000,12200"
st "outY"
blo "59000,12000"
tm "WireNameMgr"
)
)
on &12
)
*29 (Wire
uid 99,0
shape (OrthoPolyLine
uid 100,0
va (VaSet
vasetType 3
)
xt "0,24000,10000,24000"
pts [
"0,24000"
"10000,24000"
]
)
start &13
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 103,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 104,0
va (VaSet
isHidden 1
)
xt "2000,23000,5300,24200"
st "reset"
blo "2000,24000"
tm "WireNameMgr"
)
)
on &14
)
*30 (Wire
uid 113,0
shape (OrthoPolyLine
uid 114,0
va (VaSet
vasetType 3
)
xt "0,28000,10000,28000"
pts [
"0,28000"
"10000,28000"
]
)
start &15
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 117,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 118,0
va (VaSet
isHidden 1
)
xt "2000,27000,4300,28200"
st "run"
blo "2000,28000"
tm "WireNameMgr"
)
)
on &16
)
*31 (Wire
uid 127,0
shape (OrthoPolyLine
uid 128,0
va (VaSet
vasetType 3
)
xt "0,32000,10000,32000"
pts [
"0,32000"
"10000,32000"
]
)
start &17
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 131,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 132,0
va (VaSet
isHidden 1
)
xt "2000,31000,7800,32200"
st "selSinCos"
blo "2000,32000"
tm "WireNameMgr"
)
)
on &18
)
*32 (Wire
uid 141,0
shape (OrthoPolyLine
uid 142,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "0,36000,10000,36000"
pts [
"0,36000"
"10000,36000"
]
)
start &19
sat 32
eat 16
sty 1
st 0
sf 1
si 0
tg (WTG
uid 145,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 146,0
va (VaSet
isHidden 1
)
xt "2000,35000,24200,36200"
st "updatePeriod : (updatePeriodBitNb-1:0)"
blo "2000,36000"
tm "WireNameMgr"
)
)
on &20
)
*33 (Wire
uid 376,0
shape (OrthoPolyLine
uid 377,0
va (VaSet
vasetType 3
)
xt "47000,20000,57000,20000"
pts [
"57000,20000"
"47000,20000"
]
)
start &21
sat 32
eat 16
st 0
sf 1
si 0
tg (WTG
uid 380,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 381,0
va (VaSet
isHidden 1
)
xt "56000,19000,63600,20200"
st "newPolynom"
blo "56000,20000"
tm "WireNameMgr"
)
)
on &22
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 0
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *34 (PackageList
uid 173,0
stg "VerticalLayoutStrategy"
textVec [
*35 (Text
uid 174,0
va (VaSet
font "Verdana,8,1"
)
xt "0,0,6900,1000"
st "Package List"
blo "0,800"
)
*36 (MLText
uid 175,0
va (VaSet
)
xt "0,1000,16900,4600"
st "LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 176,0
stg "VerticalLayoutStrategy"
textVec [
*37 (Text
uid 177,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "20000,0,30200,1000"
st "Compiler Directives"
blo "20000,800"
)
*38 (Text
uid 178,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "20000,1000,32200,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*39 (MLText
uid 179,0
va (VaSet
isHidden 1
)
xt "20000,2000,32100,4400"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*40 (Text
uid 180,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "20000,4000,32800,5000"
st "Post-module directives:"
blo "20000,4800"
)
*41 (MLText
uid 181,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*42 (Text
uid 182,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "20000,5000,32400,6000"
st "End-module directives:"
blo "20000,5800"
)
*43 (MLText
uid 183,0
va (VaSet
isHidden 1
)
xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "-8,-8,1928,1048"
viewArea "-12448,-1157,69034,43114"
cachedDiagramExtent "-8300,0,64900,36500"
pageSetupInfo (PageSetupInfo
ptrCmd ""
toPrinter 1
paperWidth 761
paperHeight 1077
windowsPaperWidth 761
windowsPaperHeight 1077
paperType "A4 (210 x 297 mm)"
windowsPaperName "A4 (210 x 297 mm)"
windowsPaperType 9
useAdjustTo 0
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
boundaryWidth 0
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
hasePageBreakOrigin 1
pageBreakOrigin "-82000,0"
lastUid 477,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,3200,1400"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
layer 0
va (VaSet
vasetType 1
fg "59904,39936,65280"
lineColor "0,0,32768"
)
xt "0,0,1500,1750"
iconName "reqTracerRequirement.bmp"
iconMaskName "reqTracerRequirement.msk"
)
autoResize 1
text (MLText
va (VaSet
fg "0,0,32768"
font "Verdana,8,0"
)
xt "450,2150,1450,3150"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Verdana,8,1"
)
xt "1000,1000,3800,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*44 (Text
va (VaSet
font "Verdana,8,1"
)
xt "2200,3500,5800,4500"
st "<library>"
blo "2200,4300"
tm "BdLibraryNameMgr"
)
*45 (Text
va (VaSet
font "Verdana,8,1"
)
xt "2200,4500,5600,5500"
st "<block>"
blo "2200,5300"
tm "BlkNameMgr"
)
*46 (Text
va (VaSet
font "Verdana,8,1"
)
xt "2200,5500,3200,6500"
st "I0"
blo "2200,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Verdana,8,0"
)
xt "2200,13500,2200,13500"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultMWComponent (MWC
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*47 (Text
va (VaSet
font "Verdana,8,1"
)
xt "550,3500,3450,4500"
st "Library"
blo "550,4300"
)
*48 (Text
va (VaSet
font "Verdana,8,1"
)
xt "550,4500,7450,5500"
st "MWComponent"
blo "550,5300"
)
*49 (Text
va (VaSet
font "Verdana,8,1"
)
xt "550,5500,1550,6500"
st "I0"
blo "550,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Verdana,8,0"
)
xt "-6450,1500,-6450,1500"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
defaultSaComponent (SaComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*50 (Text
va (VaSet
font "Verdana,8,1"
)
xt "900,3500,3800,4500"
st "Library"
blo "900,4300"
tm "BdLibraryNameMgr"
)
*51 (Text
va (VaSet
font "Verdana,8,1"
)
xt "900,4500,7100,5500"
st "SaComponent"
blo "900,5300"
tm "CptNameMgr"
)
*52 (Text
va (VaSet
font "Verdana,8,1"
)
xt "900,5500,1900,6500"
st "I0"
blo "900,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Verdana,8,0"
)
xt "-6100,1500,-6100,1500"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
defaultVhdlComponent (VhdlComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*53 (Text
va (VaSet
font "Verdana,8,1"
)
xt "500,3500,3400,4500"
st "Library"
blo "500,4300"
)
*54 (Text
va (VaSet
font "Verdana,8,1"
)
xt "500,4500,7500,5500"
st "VhdlComponent"
blo "500,5300"
)
*55 (Text
va (VaSet
font "Verdana,8,1"
)
xt "500,5500,1500,6500"
st "I0"
blo "500,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Verdana,8,0"
)
xt "-6500,1500,-6500,1500"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
entityPath ""
archName ""
archPath ""
)
defaultVerilogComponent (VerilogComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-450,0,8450,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*56 (Text
va (VaSet
font "Verdana,8,1"
)
xt "50,3500,2950,4500"
st "Library"
blo "50,4300"
)
*57 (Text
va (VaSet
font "Verdana,8,1"
)
xt "50,4500,7950,5500"
st "VerilogComponent"
blo "50,5300"
)
*58 (Text
va (VaSet
font "Verdana,8,1"
)
xt "50,5500,1050,6500"
st "I0"
blo "50,6300"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Verdana,8,0"
)
xt "-6950,1500,-6950,1500"
)
header ""
)
elements [
]
)
entityPath ""
)
defaultHdlText (HdlText
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,37120"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*59 (Text
va (VaSet
font "Verdana,8,1"
)
xt "3150,4000,4850,5000"
st "eb1"
blo "3150,4800"
tm "HdlTextNameMgr"
)
*60 (Text
va (VaSet
font "Verdana,8,1"
)
xt "3150,5000,3950,6000"
st "1"
blo "3150,5800"
tm "HdlTextNumberMgr"
)
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultEmbeddedText (EmbeddedText
commentText (CommentText
ps "CenterOffsetStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,18000,5000"
)
text (MLText
va (VaSet
)
xt "200,200,3200,1400"
st "
Text
"
tm "HdlTextMgr"
wrapOption 3
visibleHeight 4600
visibleWidth 17600
)
)
)
defaultGlobalConnector (GlobalConnector
shape (Circle
va (VaSet
vasetType 1
fg "65535,65535,0"
)
xt "-1000,-1000,1000,1000"
radius 1000
)
name (Text
va (VaSet
font "Verdana,8,1"
)
xt "-500,-500,500,500"
st "G"
blo "-500,300"
)
)
defaultRipper (Ripper
ps "OnConnectorStrategy"
shape (Line2D
pts [
"0,0"
"1000,1000"
]
va (VaSet
vasetType 1
)
xt "0,0,1000,1000"
)
)
defaultBdJunction (BdJunction
ps "OnConnectorStrategy"
shape (Circle
va (VaSet
vasetType 1
)
xt "-400,-400,400,400"
radius 400
)
)
defaultPortIoIn (PortIoIn
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "-2000,-375,-500,375"
)
(Line
sl 0
ro 270
xt "-500,0,0,0"
pts [
"-500,0"
"0,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "-1375,-1000,-1375,-1000"
ju 2
blo "-1375,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoOut (PortIoOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Pentagon
sl 0
ro 270
xt "500,-375,2000,375"
)
(Line
sl 0
ro 270
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "625,-1000,625,-1000"
blo "625,-1000"
tm "WireNameMgr"
)
)
)
defaultPortIoInOut (PortIoInOut
shape (CompositeShape
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultPortIoBuffer (PortIoBuffer
shape (CompositeShape
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
)
optionalChildren [
(Hexagon
sl 0
xt "500,-375,2000,375"
)
(Line
sl 0
xt "0,0,500,0"
pts [
"0,0"
"500,0"
]
)
]
)
stc 0
sf 1
tg (WTG
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,-375,0,-375"
blo "0,-375"
tm "WireNameMgr"
)
)
)
defaultSignal (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,0,1900,1000"
st "sig0"
blo "0,800"
tm "WireNameMgr"
)
)
)
defaultBus (Wire
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
sty 1
st 0
sf 1
si 0
tg (WTG
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
va (VaSet
)
xt "0,0,2400,1000"
st "dbus0"
blo "0,800"
tm "WireNameMgr"
)
)
)
defaultBundle (Bundle
shape (OrthoPolyLine
va (VaSet
vasetType 3
lineColor "32768,0,0"
lineWidth 2
)
pts [
"0,0"
"0,0"
]
)
ss 0
es 0
sat 32
eat 32
textGroup (BiTextGroup
ps "ConnStartEndStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
)
xt "0,0,3000,1000"
st "bundle0"
blo "0,800"
tm "BundleNameMgr"
)
second (MLText
va (VaSet
)
xt "0,1000,1500,2200"
st "()"
tm "BundleContentsMgr"
)
)
bundleNet &0
)
defaultPortMapFrame (PortMapFrame
ps "PortMapFrameStrategy"
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,10000,12000"
)
portMapText (BiTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
first (MLText
va (VaSet
)
)
second (MLText
va (VaSet
)
tm "PortMapTextMgr"
)
)
)
defaultGenFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 2
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,18500,100"
st "g0: FOR i IN 0 TO n GENERATE"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1250,1450"
)
num (Text
va (VaSet
)
xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*61 (Text
va (VaSet
font "Verdana,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*62 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
)
defaultBlockFrame (Frame
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "26368,26368,26368"
lineStyle 1
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,11000,100"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1250,1450"
)
num (Text
va (VaSet
)
xt "250,250,1050,1250"
st "1"
blo "250,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*63 (Text
va (VaSet
font "Verdana,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*64 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
font "Verdana,8,0"
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "Verdana,8,1"
)
xt "20000,0,27000,1000"
st "Declarations"
blo "20000,800"
)
portLabel (Text
uid 3,0
va (VaSet
font "Verdana,8,1"
)
xt "20000,1000,23400,2000"
st "Ports:"
blo "20000,1800"
)
preUserLabel (Text
uid 4,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "20000,0,24800,1000"
st "Pre User:"
blo "20000,800"
)
preUserText (MLText
uid 5,0
va (VaSet
isHidden 1
font "Verdana,8,0"
)
xt "20000,0,20000,0"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
font "Verdana,8,1"
)
xt "20000,10800,29000,11800"
st "Diagram Signals:"
blo "20000,11600"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "20000,0,26000,1000"
st "Post User:"
blo "20000,800"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
font "Verdana,8,0"
)
xt "20000,0,20000,0"
tm "BdDeclarativeTextMgr"
)
)
commonDM (CommonDM
ldm (LogicalDM
ordering 1
suid 12,0
usingSuid 1
emptyRow *65 (LEmptyRow
)
uid 186,0
optionalChildren [
*66 (RefLabelRowHdr
)
*67 (TitleRowHdr
)
*68 (FilterRowHdr
)
*69 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*70 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*71 (GroupColHdr
tm "GroupColHdrMgr"
)
*72 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*73 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*74 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*75 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*76 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*77 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
*78 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "outX"
t "std_ulogic"
o 1
suid 5,0
)
)
uid 149,0
)
*79 (LeafLogPort
port (LogicalPort
decl (Decl
n "run"
t "std_ulogic"
o 2
suid 8,0
)
)
uid 151,0
)
*80 (LeafLogPort
port (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 1,0
)
)
uid 153,0
)
*81 (LeafLogPort
port (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 7,0
)
)
uid 155,0
)
*82 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "outY"
t "std_ulogic"
o 5
suid 6,0
)
)
uid 157,0
)
*83 (LeafLogPort
port (LogicalPort
decl (Decl
n "selSinCos"
t "std_ulogic"
o 6
suid 9,0
)
)
uid 159,0
)
*84 (LeafLogPort
port (LogicalPort
decl (Decl
n "interpolateLin"
t "std_ulogic"
o 7
suid 2,0
)
)
uid 161,0
)
*85 (LeafLogPort
port (LogicalPort
decl (Decl
n "updatePeriod"
t "unsigned"
b "(updatePeriodBitNb-1 DOWNTO 0)"
o 8
suid 10,0
)
)
uid 163,0
)
*86 (LeafLogPort
port (LogicalPort
decl (Decl
n "memX"
t "std_ulogic_vector"
b "(signalBitNb-1 DOWNTO 0)"
o 9
suid 3,0
)
)
uid 165,0
)
*87 (LeafLogPort
port (LogicalPort
decl (Decl
n "memY"
t "std_ulogic_vector"
b "(signalBitNb-1 DOWNTO 0)"
o 10
suid 4,0
)
)
uid 167,0
)
*88 (LeafLogPort
port (LogicalPort
m 1
decl (Decl
n "newPolynom"
t "std_ulogic"
o 11
suid 12,0
)
)
uid 386,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 199,0
optionalChildren [
*89 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *90 (MRCItem
litem &65
pos 11
dimension 20
)
uid 201,0
optionalChildren [
*91 (MRCItem
litem &66
pos 0
dimension 20
uid 202,0
)
*92 (MRCItem
litem &67
pos 1
dimension 23
uid 203,0
)
*93 (MRCItem
litem &68
pos 2
hidden 1
dimension 20
uid 204,0
)
*94 (MRCItem
litem &78
pos 0
dimension 20
uid 150,0
)
*95 (MRCItem
litem &79
pos 1
dimension 20
uid 152,0
)
*96 (MRCItem
litem &80
pos 2
dimension 20
uid 154,0
)
*97 (MRCItem
litem &81
pos 3
dimension 20
uid 156,0
)
*98 (MRCItem
litem &82
pos 4
dimension 20
uid 158,0
)
*99 (MRCItem
litem &83
pos 5
dimension 20
uid 160,0
)
*100 (MRCItem
litem &84
pos 6
dimension 20
uid 162,0
)
*101 (MRCItem
litem &85
pos 7
dimension 20
uid 164,0
)
*102 (MRCItem
litem &86
pos 8
dimension 20
uid 166,0
)
*103 (MRCItem
litem &87
pos 9
dimension 20
uid 168,0
)
*104 (MRCItem
litem &88
pos 10
dimension 20
uid 387,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 205,0
optionalChildren [
*105 (MRCItem
litem &69
pos 0
dimension 20
uid 206,0
)
*106 (MRCItem
litem &71
pos 1
dimension 50
uid 207,0
)
*107 (MRCItem
litem &72
pos 2
dimension 100
uid 208,0
)
*108 (MRCItem
litem &73
pos 3
dimension 50
uid 209,0
)
*109 (MRCItem
litem &74
pos 4
dimension 100
uid 210,0
)
*110 (MRCItem
litem &75
pos 5
dimension 100
uid 211,0
)
*111 (MRCItem
litem &76
pos 6
dimension 50
uid 212,0
)
*112 (MRCItem
litem &77
pos 7
dimension 80
uid 213,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 200,0
vaOverrides [
]
)
]
)
uid 185,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *113 (LEmptyRow
)
uid 215,0
optionalChildren [
*114 (RefLabelRowHdr
)
*115 (TitleRowHdr
)
*116 (FilterRowHdr
)
*117 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*118 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*119 (GroupColHdr
tm "GroupColHdrMgr"
)
*120 (NameColHdr
tm "GenericNameColHdrMgr"
)
*121 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*122 (InitColHdr
tm "GenericValueColHdrMgr"
)
*123 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*124 (EolColHdr
tm "GenericEolColHdrMgr"
)
*125 (LogGeneric
generic (GiElement
name "updatePeriodBitNb"
type "positive"
value "16"
)
uid 169,0
)
*126 (LogGeneric
generic (GiElement
name "signalBitNb"
type "positive"
value "16"
)
uid 171,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 227,0
optionalChildren [
*127 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *128 (MRCItem
litem &113
pos 2
dimension 20
)
uid 229,0
optionalChildren [
*129 (MRCItem
litem &114
pos 0
dimension 20
uid 230,0
)
*130 (MRCItem
litem &115
pos 1
dimension 23
uid 231,0
)
*131 (MRCItem
litem &116
pos 2
hidden 1
dimension 20
uid 232,0
)
*132 (MRCItem
litem &125
pos 0
dimension 20
uid 170,0
)
*133 (MRCItem
litem &126
pos 1
dimension 20
uid 172,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 233,0
optionalChildren [
*134 (MRCItem
litem &117
pos 0
dimension 20
uid 234,0
)
*135 (MRCItem
litem &119
pos 1
dimension 50
uid 235,0
)
*136 (MRCItem
litem &120
pos 2
dimension 100
uid 236,0
)
*137 (MRCItem
litem &121
pos 3
dimension 100
uid 237,0
)
*138 (MRCItem
litem &122
pos 4
dimension 50
uid 238,0
)
*139 (MRCItem
litem &123
pos 5
dimension 50
uid 239,0
)
*140 (MRCItem
litem &124
pos 6
dimension 80
uid 240,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 228,0
vaOverrides [
]
)
]
)
uid 214,0
type 1
)
activeModelName "BlockDiag"
)