SEm-Labos/Libs/NanoBlaze/hds/alu@and@regs/struct.bd

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version "32.1"
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ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "69000,36625,69750,37375"
)
tg (CPTG
uid 1814,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1815,0
va (VaSet
)
xt "62600,36500,68000,37500"
st "registerFileIn"
ju 2
blo "68000,37300"
)
)
thePort (LogicalPort
decl (Decl
n "registerFileIn"
t "signed"
b "( registerBitNb-1 DOWNTO 0 )"
o 23
suid 6,0
)
)
)
*71 (CptPort
uid 1816,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1817,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "69000,38625,69750,39375"
)
tg (CPTG
uid 1818,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1819,0
va (VaSet
)
xt "62100,38500,68000,39500"
st "registerFileSel"
ju 2
blo "68000,39300"
)
)
thePort (LogicalPort
decl (Decl
n "registerFileSel"
t "std_ulogic"
o 11
suid 7,0
)
)
)
*72 (CptPort
uid 1820,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1821,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "69000,32625,69750,33375"
)
tg (CPTG
uid 1822,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1823,0
va (VaSet
)
xt "62400,32500,68000,33500"
st "scratchpadSel"
ju 2
blo "68000,33300"
)
)
thePort (LogicalPort
decl (Decl
n "scratchpadSel"
t "std_ulogic"
o 13
suid 8,0
)
)
)
*73 (CptPort
uid 1824,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1825,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "69000,30625,69750,31375"
)
tg (CPTG
uid 1826,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1827,0
va (VaSet
)
xt "65400,30500,68000,31500"
st "spadIn"
ju 2
blo "68000,31300"
)
)
thePort (LogicalPort
decl (Decl
n "spadIn"
t "signed"
b "( registerBitNb-1 DOWNTO 0 )"
o 14
suid 9,0
)
)
)
]
shape (Rectangle
uid 1829,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "53000,21000,69000,43000"
)
oxt "39000,13000,55000,35000"
ttg (MlTextGroup
uid 1830,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*74 (Text
uid 1831,0
va (VaSet
font "Arial,8,1"
)
xt "53700,43000,58100,44000"
st "NanoBlaze"
blo "53700,43800"
tm "BdLibraryNameMgr"
)
*75 (Text
uid 1832,0
va (VaSet
font "Arial,8,1"
)
xt "53700,44000,60300,45000"
st "aluBOpSelector"
blo "53700,44800"
tm "CptNameMgr"
)
*76 (Text
uid 1833,0
va (VaSet
font "Arial,8,1"
)
xt "53700,45000,56300,46000"
st "I_bSel"
blo "53700,45800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1834,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1835,0
text (MLText
uid 1836,0
va (VaSet
font "Courier New,8,0"
)
xt "53000,46200,78500,47000"
st "registerBitNb = registerBitNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "registerBitNb"
type "positive"
value "registerBitNb"
)
]
)
viewicon (ZoomableIcon
uid 1837,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "53250,41250,54750,42750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
viewiconposition 0
portVis (PortSigDisplay
sTC 0
sF 0
)
archFileType "UNKNOWN"
)
*77 (SaComponent
uid 1870,0
optionalChildren [
*78 (CptPort
uid 1838,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1839,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "76250,54625,77000,55375"
)
tg (CPTG
uid 1840,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1841,0
va (VaSet
)
xt "78000,54500,80400,55500"
st "addrA"
blo "78000,55300"
)
)
thePort (LogicalPort
decl (Decl
n "addrA"
t "unsigned"
b "( registerAddressBitNb-1 DOWNTO 0 )"
o 1
suid 1,0
)
)
)
*79 (CptPort
uid 1842,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1843,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "76250,56625,77000,57375"
)
tg (CPTG
uid 1844,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1845,0
va (VaSet
)
xt "78000,56500,80400,57500"
st "addrB"
blo "78000,57300"
)
)
thePort (LogicalPort
decl (Decl
n "addrB"
t "unsigned"
b "( registerAddressBitNb-1 DOWNTO 0 )"
o 2
suid 2,0
)
)
)
*80 (CptPort
uid 1846,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1847,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "84625,67000,85375,67750"
)
tg (CPTG
uid 1848,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1849,0
va (VaSet
)
xt "84000,65000,88500,66000"
st "registersIn"
blo "84000,65800"
)
)
thePort (LogicalPort
decl (Decl
n "registersIn"
t "signed"
b "( dataBitNb-1 DOWNTO 0 )"
o 22
suid 3,0
)
)
)
*81 (CptPort
uid 1850,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1851,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "76250,62625,77000,63375"
)
tg (CPTG
uid 1852,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1853,0
va (VaSet
)
xt "78000,62500,80100,63500"
st "clock"
blo "78000,63300"
)
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 5
suid 4,0
)
)
)
*82 (CptPort
uid 1854,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1855,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "80625,50250,81375,51000"
)
tg (CPTG
uid 1856,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1857,0
va (VaSet
)
xt "80000,52000,81700,53000"
st "opA"
ju 2
blo "81700,52800"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "opA"
t "signed"
b "( dataBitNb-1 DOWNTO 0 )"
o 21
suid 5,0
)
)
)
*83 (CptPort
uid 1858,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1859,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "88625,50250,89375,51000"
)
tg (CPTG
uid 1860,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1861,0
va (VaSet
)
xt "88000,52000,89700,53000"
st "opB"
ju 2
blo "89700,52800"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "opB"
t "signed"
b "( dataBitNb-1 DOWNTO 0 )"
o 22
suid 6,0
)
)
)
*84 (CptPort
uid 1862,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1863,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "76250,58625,77000,59375"
)
tg (CPTG
uid 1864,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1865,0
va (VaSet
)
xt "78000,58500,81400,59500"
st "regWrite"
blo "78000,59300"
)
)
thePort (LogicalPort
decl (Decl
n "regWrite"
t "std_ulogic"
o 10
suid 7,0
)
)
)
*85 (CptPort
uid 1866,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1867,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "76250,64625,77000,65375"
)
tg (CPTG
uid 1868,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1869,0
va (VaSet
)
xt "78000,64500,80100,65500"
st "reset"
blo "78000,65300"
)
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 12
suid 8,0
)
)
)
]
shape (Rectangle
uid 1871,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "77000,51000,93000,67000"
)
oxt "39000,13000,55000,29000"
ttg (MlTextGroup
uid 1872,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*86 (Text
uid 1873,0
va (VaSet
font "Arial,8,1"
)
xt "77550,67000,81950,68000"
st "NanoBlaze"
blo "77550,67800"
tm "BdLibraryNameMgr"
)
*87 (Text
uid 1874,0
va (VaSet
font "Arial,8,1"
)
xt "77550,68000,82450,69000"
st "registerFile"
blo "77550,68800"
tm "CptNameMgr"
)
*88 (Text
uid 1875,0
va (VaSet
font "Arial,8,1"
)
xt "77550,69000,80150,70000"
st "I_regs"
blo "77550,69800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1876,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1877,0
text (MLText
uid 1878,0
va (VaSet
font "Courier New,8,0"
)
xt "77000,70200,109500,71800"
st "registerAddressBitNb = registerAddressBitNb    ( positive )  
dataBitNb            = registerBitNb           ( positive )  "
)
header ""
)
elements [
(GiElement
name "registerAddressBitNb"
type "positive"
value "registerAddressBitNb"
)
(GiElement
name "dataBitNb"
type "positive"
value "registerBitNb"
)
]
)
viewicon (ZoomableIcon
uid 1879,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "77250,65250,78750,66750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
viewiconposition 0
portVis (PortSigDisplay
sTC 0
sF 0
)
archFileType "UNKNOWN"
)
*89 (SaComponent
uid 1908,0
optionalChildren [
*90 (CptPort
uid 1880,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1881,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "32625,50250,33375,51000"
)
tg (CPTG
uid 1882,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1883,0
va (VaSet
)
xt "32000,51000,33700,52000"
st "opA"
blo "32000,51800"
)
)
thePort (LogicalPort
decl (Decl
n "opA"
t "signed"
b "( dataBitNb-1 DOWNTO 0 )"
o 1
suid 3,0
)
)
)
*91 (CptPort
uid 1884,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1885,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "41801,56625,42551,57375"
)
tg (CPTG
uid 1886,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1887,0
va (VaSet
)
xt "39401,56500,40801,57500"
st "cIn"
ju 2
blo "40801,57300"
)
)
thePort (LogicalPort
decl (Decl
n "cIn"
t "std_ulogic"
o 2
suid 8,0
)
)
)
*92 (CptPort
uid 1888,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1889,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "31450,56625,32200,57375"
)
tg (CPTG
uid 1890,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1891,0
va (VaSet
)
xt "33200,56500,35200,57500"
st "cOut"
blo "33200,57300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "cOut"
t "std_ulogic"
o 3
suid 11,0
)
)
)
*93 (CptPort
uid 1892,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1893,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "42867,54625,43617,55375"
)
tg (CPTG
uid 1894,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1895,0
va (VaSet
)
xt "39800,54500,43000,55500"
st "aluCode"
ju 2
blo "43000,55300"
)
)
thePort (LogicalPort
decl (Decl
n "aluCode"
t "std_ulogic_vector"
b "( aluCodeBitNb-1 DOWNTO 0 )"
o 4
suid 13,0
)
)
)
*94 (CptPort
uid 1896,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1897,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "40625,50250,41375,51000"
)
tg (CPTG
uid 1898,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1899,0
va (VaSet
)
xt "40000,51000,41700,52000"
st "opB"
blo "40000,51800"
)
)
thePort (LogicalPort
decl (Decl
n "opB"
t "signed"
b "( dataBitNb-1 DOWNTO 0 )"
o 5
suid 18,0
)
)
)
*95 (CptPort
uid 1900,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1901,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "36625,61000,37375,61750"
)
tg (CPTG
uid 1902,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1903,0
va (VaSet
)
xt "36000,60000,38600,61000"
st "aluOut"
blo "36000,60800"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "aluOut"
t "signed"
b "( dataBitNb-1 DOWNTO 0 )"
o 6
suid 19,0
)
)
)
*96 (CptPort
uid 1904,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1905,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "30384,54625,31134,55375"
)
tg (CPTG
uid 1906,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1907,0
va (VaSet
)
xt "32134,54500,34034,55500"
st "zero"
blo "32134,55300"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "zero"
t "std_ulogic"
o 7
suid 20,0
)
)
)
]
shape (Alu
uid 1909,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "29000,51000,45000,61000"
)
oxt "31000,13000,47000,23000"
ttg (MlTextGroup
uid 1910,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*97 (Text
uid 1911,0
va (VaSet
font "Arial,8,1"
)
xt "38950,61000,43350,62000"
st "NanoBlaze"
blo "38950,61800"
tm "BdLibraryNameMgr"
)
*98 (Text
uid 1912,0
va (VaSet
font "Arial,8,1"
)
xt "38950,62000,40450,63000"
st "alu"
blo "38950,62800"
tm "CptNameMgr"
)
*99 (Text
uid 1913,0
va (VaSet
font "Arial,8,1"
)
xt "38950,63000,41550,64000"
st "I_ALU"
blo "38950,63800"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
uid 1914,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1915,0
text (MLText
uid 1916,0
va (VaSet
font "Courier New,8,0"
)
xt "39000,64000,64000,65600"
st "aluCodeBitNb = aluCodeBitNb     ( positive )  
dataBitNb    = registerBitNb    ( positive )  "
)
header ""
)
elements [
(GiElement
name "aluCodeBitNb"
type "positive"
value "aluCodeBitNb"
)
(GiElement
name "dataBitNb"
type "positive"
value "registerBitNb"
)
]
)
viewicon (ZoomableIcon
uid 1917,0
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "29250,59250,30750,60750"
iconName "VhdlFileViewIcon.png"
iconMaskName "VhdlFileViewIcon.msk"
ftype 10
)
viewiconposition 0
portVis (PortSigDisplay
sTC 0
sF 0
)
archFileType "UNKNOWN"
)
*100 (Wire
uid 15,0
shape (OrthoPolyLine
uid 16,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "69000,55000,76250,55000"
pts [
"69000,55000"
"76250,55000"
]
)
start &1
end &78
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 19,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 20,0
va (VaSet
font "Verdana,12,0"
)
xt "70000,53600,74500,55000"
st "addrA"
blo "70000,54800"
tm "WireNameMgr"
)
)
on &2
)
*101 (Wire
uid 29,0
shape (OrthoPolyLine
uid 30,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "69000,57000,76250,57000"
pts [
"69000,57000"
"76250,57000"
]
)
start &3
end &79
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 33,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 34,0
va (VaSet
font "Verdana,12,0"
)
xt "70000,55600,74500,57000"
st "addrB"
blo "70000,56800"
tm "WireNameMgr"
)
)
on &4
)
*102 (Wire
uid 43,0
shape (OrthoPolyLine
uid 44,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "43617,55000,53000,55000"
pts [
"53000,55000"
"43617,55000"
]
)
start &5
end &93
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 47,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 48,0
va (VaSet
font "Verdana,12,0"
)
xt "48000,53600,54000,55000"
st "aluCode"
blo "48000,54800"
tm "WireNameMgr"
)
)
on &6
)
*103 (Wire
uid 57,0
shape (OrthoPolyLine
uid 58,0
va (VaSet
vasetType 3
)
xt "42551,57000,53000,57000"
pts [
"53000,57000"
"42551,57000"
]
)
start &7
end &91
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 61,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 62,0
va (VaSet
font "Verdana,12,0"
)
xt "51000,55600,53700,57000"
st "cIn"
blo "51000,56800"
tm "WireNameMgr"
)
)
on &8
)
*104 (Wire
uid 71,0
shape (OrthoPolyLine
uid 72,0
va (VaSet
vasetType 3
)
xt "69000,63000,76250,63000"
pts [
"69000,63000"
"76250,63000"
]
)
start &9
end &81
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 75,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 76,0
va (VaSet
font "Verdana,12,0"
)
xt "71000,61600,74800,63000"
st "clock"
blo "71000,62800"
tm "WireNameMgr"
)
)
on &10
)
*105 (Wire
uid 85,0
shape (OrthoPolyLine
uid 86,0
va (VaSet
vasetType 3
)
xt "21000,57000,31450,57000"
pts [
"21000,57000"
"31450,57000"
]
)
start &11
end &92
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 89,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 90,0
va (VaSet
font "Verdana,12,0"
)
xt "21000,55600,24700,57000"
st "cOut"
blo "21000,56800"
tm "WireNameMgr"
)
)
on &12
)
*106 (Wire
uid 99,0
shape (OrthoPolyLine
uid 100,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "45000,25000,52250,25000"
pts [
"45000,25000"
"52250,25000"
]
)
start &13
end &65
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 103,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 104,0
va (VaSet
font "Verdana,12,0"
)
xt "45000,23600,51600,25000"
st "instrData"
blo "45000,24800"
tm "WireNameMgr"
)
)
on &14
)
*107 (Wire
uid 113,0
shape (OrthoPolyLine
uid 114,0
va (VaSet
vasetType 3
)
xt "45000,27000,52250,27000"
pts [
"45000,27000"
"52250,27000"
]
)
start &15
end &66
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 117,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 118,0
va (VaSet
font "Verdana,12,0"
)
xt "44000,25600,53300,27000"
st "instrDataSel"
blo "44000,26800"
tm "WireNameMgr"
)
)
on &16
)
*108 (Wire
uid 127,0
shape (OrthoPolyLine
uid 128,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "113000,33000,121000,33000"
pts [
"121000,33000"
"113000,33000"
]
)
start &17
end &58
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 131,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 132,0
va (VaSet
font "Verdana,12,0"
)
xt "116000,31600,122300,33000"
st "portAddr"
blo "116000,32800"
tm "WireNameMgr"
)
)
on &18
)
*109 (Wire
uid 141,0
shape (OrthoPolyLine
uid 142,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "69750,25000,77000,25000"
pts [
"77000,25000"
"69750,25000"
]
)
start &19
end &68
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 145,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 146,0
va (VaSet
font "Verdana,12,0"
)
xt "74000,23600,78700,25000"
st "portIn"
blo "74000,24800"
tm "WireNameMgr"
)
)
on &20
)
*110 (Wire
uid 155,0
shape (OrthoPolyLine
uid 156,0
va (VaSet
vasetType 3
)
xt "69750,27000,77000,27000"
pts [
"77000,27000"
"69750,27000"
]
)
start &21
end &69
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 159,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 160,0
va (VaSet
font "Verdana,12,0"
)
xt "72000,25600,78600,27000"
st "portInSel"
blo "72000,26800"
tm "WireNameMgr"
)
)
on &22
)
*111 (Wire
uid 169,0
shape (OrthoPolyLine
uid 170,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "113000,47000,121000,47000"
pts [
"121000,47000"
"117000,47000"
"113000,47000"
]
)
start &23
end &54
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 173,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 174,0
va (VaSet
font "Verdana,12,0"
)
xt "117000,45600,122700,47000"
st "portOut"
blo "117000,46800"
tm "WireNameMgr"
)
)
on &24
)
*112 (Wire
uid 183,0
shape (OrthoPolyLine
uid 184,0
va (VaSet
vasetType 3
)
xt "69750,39000,77000,39000"
pts [
"77000,39000"
"69750,39000"
]
)
start &25
end &71
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 187,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 188,0
va (VaSet
font "Verdana,12,0"
)
xt "70000,37600,80500,39000"
st "registerFileSel"
blo "70000,38800"
tm "WireNameMgr"
)
)
on &26
)
*113 (Wire
uid 197,0
shape (OrthoPolyLine
uid 198,0
va (VaSet
vasetType 3
)
xt "69000,65000,76250,65000"
pts [
"69000,65000"
"76250,65000"
]
)
start &27
end &85
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 201,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 202,0
va (VaSet
font "Verdana,12,0"
)
xt "70000,63600,74100,65000"
st "reset"
blo "70000,64800"
tm "WireNameMgr"
)
)
on &28
)
*114 (Wire
uid 211,0
shape (OrthoPolyLine
uid 212,0
va (VaSet
vasetType 3
)
xt "69750,33000,77000,33000"
pts [
"77000,33000"
"69750,33000"
]
)
start &29
end &72
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 215,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 216,0
va (VaSet
font "Verdana,12,0"
)
xt "70000,31600,80400,33000"
st "scratchpadSel"
blo "70000,32800"
tm "WireNameMgr"
)
)
on &30
)
*115 (Wire
uid 239,0
shape (OrthoPolyLine
uid 240,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "69750,31000,77000,31000"
pts [
"77000,31000"
"69750,31000"
]
)
start &31
end &73
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 243,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 244,0
va (VaSet
font "Verdana,12,0"
)
xt "73000,29600,78200,31000"
st "spadIn"
blo "73000,30800"
tm "WireNameMgr"
)
)
on &32
)
*116 (Wire
uid 253,0
shape (OrthoPolyLine
uid 254,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "113000,49000,121000,49000"
pts [
"121000,49000"
"117000,49000"
"113000,49000"
]
)
start &33
end &54
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 257,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 258,0
va (VaSet
font "Verdana,12,0"
)
xt "117000,47600,123200,49000"
st "spadOut"
blo "117000,48800"
tm "WireNameMgr"
)
)
on &34
)
*117 (Wire
uid 267,0
shape (OrthoPolyLine
uid 268,0
va (VaSet
vasetType 3
)
xt "21000,55000,30384,55000"
pts [
"21000,55000"
"30384,55000"
]
)
start &35
end &96
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 271,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 272,0
va (VaSet
font "Verdana,12,0"
)
xt "21000,53600,24600,55000"
st "zero"
blo "21000,54800"
tm "WireNameMgr"
)
)
on &36
)
*118 (Wire
uid 705,0
shape (OrthoPolyLine
uid 706,0
va (VaSet
vasetType 3
)
xt "69000,59000,76250,59000"
pts [
"69000,59000"
"76250,59000"
]
)
start &48
end &84
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 709,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 710,0
va (VaSet
font "Verdana,12,0"
)
xt "69000,57600,75300,59000"
st "regWrite"
blo "69000,58800"
tm "WireNameMgr"
)
)
on &49
)
*119 (Wire
uid 881,0
optionalChildren [
*120 (BdJunction
uid 1429,0
ps "OnConnectorStrategy"
shape (Circle
uid 1430,0
va (VaSet
vasetType 1
)
xt "80600,46600,81400,47400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 882,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "33000,47000,81000,50250"
pts [
"33000,50250"
"33000,47000"
"81000,47000"
"81000,50250"
]
)
start &90
end &82
sat 32
eat 32
sty 1
stc 0
st 0
si 0
tg (WTG
uid 885,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 886,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "31600,46250,33000,49450"
st "opA"
blo "32800,49450"
tm "WireNameMgr"
)
)
on &50
)
*121 (Wire
uid 889,0
shape (OrthoPolyLine
uid 890,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "41000,31000,52250,50250"
pts [
"41000,50250"
"41000,31000"
"52250,31000"
]
)
start &94
end &67
sat 32
eat 32
sty 1
stc 0
st 0
si 0
tg (WTG
uid 893,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 894,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "39600,46250,41000,49450"
st "opB"
blo "40800,49450"
tm "WireNameMgr"
)
)
on &51
)
*122 (Wire
uid 972,0
shape (OrthoPolyLine
uid 973,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "37000,61750,85000,71000"
pts [
"37000,61750"
"37000,71000"
"85000,71000"
"85000,67750"
]
)
start &95
end &80
sat 32
eat 32
sty 1
stc 0
st 0
si 0
tg (WTG
uid 976,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 977,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "35600,63750,37000,68750"
st "aluOut"
blo "36800,68750"
tm "WireNameMgr"
)
)
on &52
)
*123 (Wire
uid 1263,0
optionalChildren [
*124 (BdJunction
uid 1457,0
ps "OnConnectorStrategy"
shape (Circle
uid 1458,0
va (VaSet
vasetType 1
)
xt "88600,36600,89400,37400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 1264,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "69750,37000,89000,50250"
pts [
"89000,50250"
"89000,37000"
"69750,37000"
]
)
start &83
end &70
sat 32
eat 32
sty 1
stc 0
st 0
si 0
tg (WTG
uid 1267,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1268,0
va (VaSet
font "Verdana,12,0"
)
xt "72000,35600,81900,37000"
st "registerFileIn"
blo "72000,36800"
tm "WireNameMgr"
)
)
on &53
)
*125 (Wire
uid 1423,0
shape (OrthoPolyLine
uid 1424,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "81000,47000,101000,47000"
pts [
"81000,47000"
"101000,47000"
]
)
start &120
end &54
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1427,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1428,0
va (VaSet
font "Verdana,12,0"
)
xt "97000,45600,100200,47000"
st "opA"
blo "97000,46800"
tm "WireNameMgr"
)
)
on &50
)
*126 (Wire
uid 1451,0
shape (OrthoPolyLine
uid 1452,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "89000,35000,101000,37000"
pts [
"89000,37000"
"89000,35000"
"101000,35000"
]
)
start &124
end &58
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1455,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1456,0
va (VaSet
font "Verdana,12,0"
)
xt "89000,33600,98900,35000"
st "registerFileIn"
blo "89000,34800"
tm "WireNameMgr"
)
)
on &53
)
*127 (Wire
uid 1500,0
shape (OrthoPolyLine
uid 1501,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "113000,35000,121000,35000"
pts [
"113000,35000"
"121000,35000"
]
)
start &58
end &62
sat 2
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1504,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1505,0
va (VaSet
font "Verdana,12,0"
)
xt "113000,33600,124400,35000"
st "scratchpadAddr"
blo "113000,34800"
tm "WireNameMgr"
)
)
on &63
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *128 (PackageList
uid 345,0
stg "VerticalLayoutStrategy"
textVec [
*129 (Text
uid 346,0
va (VaSet
font "arial,8,1"
)
xt "-14000,0,-8600,1000"
st "Package List"
blo "-14000,800"
)
*130 (MLText
uid 347,0
va (VaSet
)
xt "-14000,1000,3500,4600"
st "LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 348,0
stg "VerticalLayoutStrategy"
textVec [
*131 (Text
uid 349,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,0,28100,1000"
st "Compiler Directives"
blo "20000,800"
)
*132 (Text
uid 350,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,1000,29600,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*133 (MLText
uid 351,0
va (VaSet
isHidden 1
)
xt "20000,2000,32100,4400"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*134 (Text
uid 352,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,4000,30100,5000"
st "Post-module directives:"
blo "20000,4800"
)
*135 (MLText
uid 353,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*136 (Text
uid 354,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "20000,5000,29900,6000"
st "End-module directives:"
blo "20000,5800"
)
*137 (MLText
uid 355,0
va (VaSet
isHidden 1
)
xt "20000,6000,20000,6000"
tm "BdCompilerDirectivesTextMgr"
)
]
associable 1
)
windowSize "148,33,1411,899"
viewArea "-16102,-2119,135916,103304"
cachedDiagramExtent "-14000,0,133400,99000"
pageSetupInfo (PageSetupInfo
ptrCmd ""
toPrinter 1
xMargin 48
yMargin 48
paperWidth 761
paperHeight 1077
windowsPaperWidth 761
windowsPaperHeight 1077
paperType "A4"
windowsPaperName "A4"
windowsPaperType 9
scale 50
exportedDirectories [
"$HDS_PROJECT_DIR/HTMLExport"
]
boundaryWidth 0
exportStdIncludeRefs 1
exportStdPackageRefs 1
)
hasePageBreakOrigin 1
pageBreakOrigin "-14000,0"
lastUid 2057,0
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
)
xt "200,200,3200,1400"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
layer 0
va (VaSet
vasetType 1
fg "59904,39936,65280"
lineColor "0,0,32768"
)
xt "0,0,1500,1750"
iconName "reqTracerRequirement.bmp"
iconMaskName "reqTracerRequirement.msk"
)
autoResize 1
text (MLText
va (VaSet
fg "0,0,32768"
font "arial,8,0"
)
xt "500,2150,1400,3150"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Arial,8,1"
)
xt "1000,1000,3800,2000"
st "Panel0"
blo "1000,1800"
tm "PanelText"
)
)
)
defaultBlk (Blk
shape (Rectangle
va (VaSet
vasetType 1
fg "39936,56832,65280"
lineColor "0,0,32768"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*138 (Text
va (VaSet
font "Verdana,12,0"
)
xt "750,2900,7250,4300"
st "<library>"
blo "750,4100"
tm "BdLibraryNameMgr"
)
*139 (Text
va (VaSet
font "Verdana,12,0"
)
xt "750,4300,6550,5700"
st "<block>"
blo "750,5500"
tm "BlkNameMgr"
)
*140 (Text
va (VaSet
font "Verdana,12,0"
)
xt "750,5700,4050,7100"
st "U_0"
blo "750,6900"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "750,12900,750,12900"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
)
defaultMWComponent (MWC
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-1450,0,9450,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*141 (Text
va (VaSet
font "Verdana,10,0"
)
xt "-950,3200,3450,4400"
st "Library"
blo "-950,4200"
)
*142 (Text
va (VaSet
font "Verdana,10,0"
)
xt "-950,4400,8950,5600"
st "MWComponent"
blo "-950,5400"
)
*143 (Text
va (VaSet
font "Verdana,10,0"
)
xt "-950,5600,1850,6800"
st "U_0"
blo "-950,6600"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-7950,1200,-7950,1200"
)
header ""
)
elements [
]
)
portVis (PortSigDisplay
)
prms (Property
pclass "params"
pname "params"
ptn "String"
)
visOptions (mwParamsVisibilityOptions
)
)
defaultSaComponent (SaComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "0,0,8000,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*144 (Text
va (VaSet
font "Verdana,10,0"
)
xt "-650,3200,3750,4400"
st "Library"
blo "-650,4200"
tm "BdLibraryNameMgr"
)
*145 (Text
va (VaSet
font "Verdana,10,0"
)
xt "-650,4400,8650,5600"
st "SaComponent"
blo "-650,5400"
tm "CptNameMgr"
)
*146 (Text
va (VaSet
font "Verdana,10,0"
)
xt "-650,5600,2150,6800"
st "U_0"
blo "-650,6600"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
ps "EdgeToEdgeStrategy"
matrix (Matrix
text (MLText
va (VaSet
font "Courier New,8,0"
)
xt "-7650,1200,-7650,1200"
)
header ""
)
elements [
]
)
viewicon (ZoomableIcon
sl 0
va (VaSet
vasetType 1
fg "49152,49152,49152"
)
xt "0,0,1500,1500"
iconName "UnknownFile.png"
iconMaskName "UnknownFile.msk"
)
viewiconposition 0
portVis (PortSigDisplay
)
archFileType "UNKNOWN"
)
defaultVhdlComponent (VhdlComponent
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "-1650,0,9650,10000"
)
ttg (MlTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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