2808 lines
34 KiB
Plaintext
2808 lines
34 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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instances [
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(Instance
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name "U_tester"
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duLibraryName "HEIRV32_test"
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duName "heirv32_mc_tester"
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elements [
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(GiElement
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name "c_btnsNb"
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type "positive"
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value "c_btnsNb"
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)
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]
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mwi 0
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uid 132,0
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)
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(Instance
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name "U_heirv32"
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duLibraryName "HEIRV32_MC"
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duName "heirv32_mc"
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elements [
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(GiElement
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name "g_programFile"
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type "string"
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value "\"$SIMULATION_DIR/code_sim_bram.txt\""
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)
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(GiElement
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name "g_btnsNb"
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type "positive"
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value "c_btnsNb "
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)
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(GiElement
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name "g_dataWidth"
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type "positive"
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value "32"
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)
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]
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mwi 0
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uid 842,0
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "32.1"
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appVersion "2019.2 (Build 5)"
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noEmbeddedEditors 1
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model (BlockDiag
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VExpander (VariableExpander
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vvMap [
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(vvPair
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variable "HDLDir"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hdl"
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)
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(vvPair
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variable "HDSDir"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds"
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)
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(vvPair
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variable "SideDataDesignDir"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds\\heirv32_mc_tb\\struct.bd.info"
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)
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(vvPair
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variable "SideDataUserDir"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds\\heirv32_mc_tb\\struct.bd.user"
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)
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(vvPair
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variable "SourceDir"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds"
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)
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(vvPair
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variable "appl"
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value "HDL Designer"
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)
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(vvPair
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variable "arch_name"
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value "struct"
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)
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(vvPair
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variable "concat_file"
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value "concatenated"
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)
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(vvPair
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variable "config"
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value "%(unit)_%(view)_config"
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)
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(vvPair
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variable "d"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds\\heirv32_mc_tb"
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)
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(vvPair
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variable "d_logical"
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds\\heirv32_mc_tb"
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)
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(vvPair
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variable "date"
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value "04.11.2022"
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)
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(vvPair
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variable "day"
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value "ven."
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)
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(vvPair
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variable "day_long"
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value "vendredi"
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)
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(vvPair
|
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variable "dd"
|
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value "04"
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)
|
|
(vvPair
|
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variable "entity_name"
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value "heirv32_mc_tb"
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)
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(vvPair
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variable "ext"
|
|
value "<TBD>"
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)
|
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(vvPair
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variable "f"
|
|
value "struct.bd"
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|
)
|
|
(vvPair
|
|
variable "f_logical"
|
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value "struct.bd"
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)
|
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(vvPair
|
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variable "f_noext"
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value "struct"
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)
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(vvPair
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variable "graphical_source_author"
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value "axel.amand"
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)
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(vvPair
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variable "graphical_source_date"
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value "04.11.2022"
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)
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(vvPair
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variable "graphical_source_group"
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value "UNKNOWN"
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)
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(vvPair
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variable "graphical_source_host"
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value "WE7860"
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)
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(vvPair
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variable "graphical_source_time"
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value "11:37:43"
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)
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(vvPair
|
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variable "group"
|
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value "UNKNOWN"
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)
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|
(vvPair
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|
variable "host"
|
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value "WE7860"
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)
|
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(vvPair
|
|
variable "language"
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value "VHDL"
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)
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(vvPair
|
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variable "library"
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|
value "HEIRV32_test"
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|
)
|
|
(vvPair
|
|
variable "library_downstream_Concatenation"
|
|
value "$HDS_PROJECT_DIR/../RiscV/HEIRV32_test/concat"
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)
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|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
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value "$SCRATCH_DIR/CAr//RiscV_test/HEIRV32_test/work"
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)
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(vvPair
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variable "mm"
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value "11"
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)
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(vvPair
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variable "module_name"
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value "heirv32_mc_tb"
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)
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(vvPair
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|
variable "month"
|
|
value "nov."
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)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "novembre"
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)
|
|
(vvPair
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variable "p"
|
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value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds\\heirv32_mc_tb\\struct.bd"
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)
|
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(vvPair
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variable "p_logical"
|
|
value "C:\\dev\\car-labs\\hdl\\Prefs\\..\\RiscV\\HEIRV32_test\\hds\\heirv32_mc_tb\\struct.bd"
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)
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|
(vvPair
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variable "package_name"
|
|
value "<Undefined Variable>"
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)
|
|
(vvPair
|
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variable "project_name"
|
|
value "hds"
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)
|
|
(vvPair
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|
variable "series"
|
|
value "HDL Designer Series"
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)
|
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(vvPair
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variable "this_ext"
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value "bd"
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)
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(vvPair
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variable "this_file"
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value "struct"
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)
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(vvPair
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variable "this_file_logical"
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value "struct"
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)
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(vvPair
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|
variable "time"
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|
value "11:37:43"
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)
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(vvPair
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variable "unit"
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|
value "heirv32_mc_tb"
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)
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(vvPair
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variable "user"
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value "axel.amand"
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)
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(vvPair
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variable "version"
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value "2019.2 (Build 5)"
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)
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(vvPair
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variable "view"
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value "struct"
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)
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(vvPair
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|
variable "year"
|
|
value "2022"
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)
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|
(vvPair
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variable "yy"
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|
value "22"
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)
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]
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uid 138,0
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text (MLText
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viewicon (ZoomableIcon
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va (VaSet
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uid 176,0
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lang 11
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decl (Decl
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lang 11
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decl (Decl
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declText (MLText
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va (VaSet
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uid 192,0
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lang 11
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declText (MLText
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uid 193,0
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va (VaSet
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font "Courier New,8,0"
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uid 424,0
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lang 11
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decl (Decl
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declText (MLText
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va (VaSet
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uid 842,0
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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uid 820,0
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f (Text
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va (VaSet
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)
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st "rst"
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blo "25000,19500"
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)
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)
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thePort (LogicalPort
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lang 11
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decl (Decl
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n "rst"
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t "std_ulogic"
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o 4
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suid 3,0
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)
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)
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)
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*22 (CptPort
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uid 822,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 823,0
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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xt "23250,20625,24000,21375"
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)
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tg (CPTG
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uid 824,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
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uid 825,0
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va (VaSet
|
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font "Verdana,12,0"
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)
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xt "25000,20300,27400,21700"
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st "clk"
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blo "25000,21500"
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)
|
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)
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thePort (LogicalPort
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lang 11
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decl (Decl
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n "clk"
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t "std_ulogic"
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o 2
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suid 4,0
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)
|
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)
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)
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*23 (CptPort
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|
uid 826,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 827,0
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ro 90
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|
va (VaSet
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|
vasetType 1
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|
fg "0,65535,0"
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)
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xt "40000,16625,40750,17375"
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)
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tg (CPTG
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|
uid 828,0
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ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
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f (Text
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|
uid 829,0
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va (VaSet
|
|
font "Verdana,12,0"
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)
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|
xt "32400,16300,39000,17700"
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|
st "dbg_leds"
|
|
ju 2
|
|
blo "39000,17500"
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)
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)
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|
thePort (LogicalPort
|
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lang 11
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|
m 1
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|
decl (Decl
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|
n "dbg_leds"
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|
t "std_ulogic_vector"
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|
b "(31 DOWNTO 0)"
|
|
o 5
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|
suid 6,0
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)
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|
)
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|
)
|
|
*24 (CptPort
|
|
uid 830,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 831,0
|
|
ro 90
|
|
va (VaSet
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|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "23250,16625,24000,17375"
|
|
)
|
|
tg (CPTG
|
|
uid 832,0
|
|
ps "CptPortTextPlaceStrategy"
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|
stg "VerticalLayoutStrategy"
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|
f (Text
|
|
uid 833,0
|
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va (VaSet
|
|
font "Verdana,12,0"
|
|
)
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|
xt "25000,16300,27400,17700"
|
|
st "en"
|
|
blo "25000,17500"
|
|
)
|
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)
|
|
thePort (LogicalPort
|
|
lang 11
|
|
decl (Decl
|
|
n "en"
|
|
t "std_ulogic"
|
|
o 3
|
|
suid 7,0
|
|
)
|
|
)
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|
)
|
|
*25 (CptPort
|
|
uid 834,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
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|
uid 835,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "28625,24000,29375,24750"
|
|
)
|
|
tg (CPTG
|
|
uid 836,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
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|
f (Text
|
|
uid 837,0
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|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "28300,19400,29700,23000"
|
|
st "btns"
|
|
blo "29500,23000"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
lang 11
|
|
decl (Decl
|
|
n "btns"
|
|
t "std_ulogic_vector"
|
|
b "(g_btnsNb-1 DOWNTO 0)"
|
|
o 1
|
|
suid 8,0
|
|
)
|
|
)
|
|
)
|
|
*26 (CptPort
|
|
uid 838,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 839,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "30625,24000,31375,24750"
|
|
)
|
|
tg (CPTG
|
|
uid 840,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 841,0
|
|
ro 270
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "30300,19600,31700,23000"
|
|
st "leds"
|
|
blo "31500,23000"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
lang 11
|
|
m 1
|
|
decl (Decl
|
|
n "leds"
|
|
t "std_ulogic_vector"
|
|
b "(g_dataWidth-1 DOWNTO 0)"
|
|
o 6
|
|
suid 9,0
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 843,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "24000,16000,40000,24000"
|
|
)
|
|
oxt "19000,25000,35000,33000"
|
|
ttg (MlTextGroup
|
|
uid 844,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*27 (Text
|
|
uid 845,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "32800,19800,40400,21000"
|
|
st "HEIRV32_MC"
|
|
blo "32800,20800"
|
|
tm "BdLibraryNameMgr"
|
|
)
|
|
*28 (Text
|
|
uid 846,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "32800,21000,39700,22200"
|
|
st "heirv32_mc"
|
|
blo "32800,22000"
|
|
tm "CptNameMgr"
|
|
)
|
|
*29 (Text
|
|
uid 847,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "32800,22200,38400,23400"
|
|
st "U_heirv32"
|
|
blo "32800,23200"
|
|
tm "InstanceNameMgr"
|
|
)
|
|
]
|
|
)
|
|
ga (GenericAssociation
|
|
uid 848,0
|
|
ps "EdgeToEdgeStrategy"
|
|
matrix (Matrix
|
|
uid 849,0
|
|
text (MLText
|
|
uid 850,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "35000,25600,71500,28000"
|
|
st "g_programFile = \"$SIMULATION_DIR/code_sim_bram.txt\" ( string )
|
|
g_btnsNb = c_btnsNb ( positive )
|
|
g_dataWidth = 32 ( positive )
|
|
"
|
|
)
|
|
header ""
|
|
)
|
|
elements [
|
|
(GiElement
|
|
name "g_programFile"
|
|
type "string"
|
|
value "\"$SIMULATION_DIR/code_sim_bram.txt\""
|
|
)
|
|
(GiElement
|
|
name "g_btnsNb"
|
|
type "positive"
|
|
value "c_btnsNb "
|
|
)
|
|
(GiElement
|
|
name "g_dataWidth"
|
|
type "positive"
|
|
value "32"
|
|
)
|
|
]
|
|
)
|
|
viewicon (ZoomableIcon
|
|
uid 851,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "49152,49152,49152"
|
|
)
|
|
xt "24250,22250,25750,23750"
|
|
iconName "BlockDiagram.png"
|
|
iconMaskName "BlockDiagram.msk"
|
|
ftype 1
|
|
)
|
|
viewiconposition 0
|
|
portVis (PortSigDisplay
|
|
sTC 0
|
|
sIVOD 1
|
|
)
|
|
archFileType "UNKNOWN"
|
|
)
|
|
*30 (Wire
|
|
uid 178,0
|
|
shape (OrthoPolyLine
|
|
uid 179,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "20000,21000,23250,29000"
|
|
pts [
|
|
"23250,21000"
|
|
"20000,21000"
|
|
"20000,29000"
|
|
]
|
|
)
|
|
start &22
|
|
end &12
|
|
sat 32
|
|
eat 2
|
|
st 0
|
|
sf 1
|
|
tg (WTG
|
|
uid 182,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 183,0
|
|
va (VaSet
|
|
)
|
|
xt "20250,19800,22450,21000"
|
|
st "clk"
|
|
blo "20250,20800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &16
|
|
)
|
|
*31 (Wire
|
|
uid 186,0
|
|
shape (OrthoPolyLine
|
|
uid 187,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "18000,19000,23250,29000"
|
|
pts [
|
|
"23250,19000"
|
|
"18000,19000"
|
|
"18000,29000"
|
|
]
|
|
)
|
|
start &21
|
|
end &12
|
|
sat 32
|
|
eat 2
|
|
st 0
|
|
sf 1
|
|
tg (WTG
|
|
uid 190,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 191,0
|
|
va (VaSet
|
|
)
|
|
xt "20250,17800,22350,19000"
|
|
st "rst"
|
|
blo "20250,18800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &17
|
|
)
|
|
*32 (Wire
|
|
uid 194,0
|
|
shape (OrthoPolyLine
|
|
uid 195,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "16000,17000,23250,29000"
|
|
pts [
|
|
"23250,17000"
|
|
"16000,17000"
|
|
"16000,29000"
|
|
]
|
|
)
|
|
start &24
|
|
end &12
|
|
sat 32
|
|
eat 2
|
|
st 0
|
|
sf 1
|
|
tg (WTG
|
|
uid 198,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 199,0
|
|
va (VaSet
|
|
)
|
|
xt "20250,15800,22150,17000"
|
|
st "en"
|
|
blo "20250,16800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &18
|
|
)
|
|
*33 (Wire
|
|
uid 426,0
|
|
shape (OrthoPolyLine
|
|
uid 427,0
|
|
va (VaSet
|
|
vasetType 3
|
|
lineWidth 2
|
|
)
|
|
xt "29000,24750,29000,29000"
|
|
pts [
|
|
"29000,24750"
|
|
"29000,29000"
|
|
]
|
|
)
|
|
start &25
|
|
end &12
|
|
sat 32
|
|
eat 2
|
|
sty 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
tg (WTG
|
|
uid 430,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 431,0
|
|
ro 270
|
|
va (VaSet
|
|
)
|
|
xt "27800,25100,29000,28000"
|
|
st "btns"
|
|
blo "28800,28000"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &19
|
|
)
|
|
]
|
|
bg "65535,65535,65535"
|
|
grid (Grid
|
|
origin "0,0"
|
|
isVisible 0
|
|
isActive 1
|
|
xSpacing 1000
|
|
xySpacing 1000
|
|
xShown 1
|
|
yShown 1
|
|
color "26368,26368,26368"
|
|
)
|
|
packageList *34 (PackageList
|
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ps "OnConnectorStrategy"
|
|
shape (Circle
|
|
va (VaSet
|
|
vasetType 1
|
|
)
|
|
xt "-400,-400,400,400"
|
|
radius 400
|
|
)
|
|
)
|
|
defaultPortIoIn (PortIoIn
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,0,32768"
|
|
)
|
|
optionalChildren [
|
|
(Pentagon
|
|
sl 0
|
|
ro 270
|
|
xt "-2000,-375,-500,375"
|
|
)
|
|
(Line
|
|
sl 0
|
|
ro 270
|
|
xt "-500,0,0,0"
|
|
pts [
|
|
"-500,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
]
|
|
)
|
|
stc 0
|
|
sf 1
|
|
tg (WTG
|
|
ps "PortIoTextPlaceStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "-1375,-1000,-1375,-1000"
|
|
ju 2
|
|
blo "-1375,-1000"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultPortIoOut (PortIoOut
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,0,32768"
|
|
)
|
|
optionalChildren [
|
|
(Pentagon
|
|
sl 0
|
|
ro 270
|
|
xt "500,-375,2000,375"
|
|
)
|
|
(Line
|
|
sl 0
|
|
ro 270
|
|
xt "0,0,500,0"
|
|
pts [
|
|
"0,0"
|
|
"500,0"
|
|
]
|
|
)
|
|
]
|
|
)
|
|
stc 0
|
|
sf 1
|
|
tg (WTG
|
|
ps "PortIoTextPlaceStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "625,-1000,625,-1000"
|
|
blo "625,-1000"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultPortIoInOut (PortIoInOut
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,0,32768"
|
|
)
|
|
optionalChildren [
|
|
(Hexagon
|
|
sl 0
|
|
xt "500,-375,2000,375"
|
|
)
|
|
(Line
|
|
sl 0
|
|
xt "0,0,500,0"
|
|
pts [
|
|
"0,0"
|
|
"500,0"
|
|
]
|
|
)
|
|
]
|
|
)
|
|
stc 0
|
|
sf 1
|
|
tg (WTG
|
|
ps "PortIoTextPlaceStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,-375,0,-375"
|
|
blo "0,-375"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultPortIoBuffer (PortIoBuffer
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "0,0,32768"
|
|
)
|
|
optionalChildren [
|
|
(Hexagon
|
|
sl 0
|
|
xt "500,-375,2000,375"
|
|
)
|
|
(Line
|
|
sl 0
|
|
xt "0,0,500,0"
|
|
pts [
|
|
"0,0"
|
|
"500,0"
|
|
]
|
|
)
|
|
]
|
|
)
|
|
stc 0
|
|
sf 1
|
|
tg (WTG
|
|
ps "PortIoTextPlaceStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,-375,0,-375"
|
|
blo "0,-375"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultSignal (Wire
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,0,2900,1200"
|
|
st "sig0"
|
|
blo "0,1000"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultBus (Wire
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
lineWidth 2
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
sty 1
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,0,3800,1200"
|
|
st "dbus0"
|
|
blo "0,1000"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultBundle (Bundle
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
lineColor "32768,0,0"
|
|
lineWidth 2
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
textGroup (BiTextGroup
|
|
ps "ConnStartEndStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,0,4700,1200"
|
|
st "bundle0"
|
|
blo "0,1000"
|
|
tm "BundleNameMgr"
|
|
)
|
|
second (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,1200,1500,2400"
|
|
st "()"
|
|
tm "BundleContentsMgr"
|
|
)
|
|
)
|
|
bundleNet &0
|
|
)
|
|
defaultPortMapFrame (PortMapFrame
|
|
ps "PortMapFrameStrategy"
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "0,0,32768"
|
|
lineWidth 2
|
|
)
|
|
xt "0,0,10000,12000"
|
|
)
|
|
portMapText (BiTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (MLText
|
|
va (VaSet
|
|
)
|
|
)
|
|
second (MLText
|
|
va (VaSet
|
|
)
|
|
tm "PortMapTextMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultGenFrame (Frame
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "26368,26368,26368"
|
|
lineStyle 2
|
|
lineWidth 3
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,-1300,18500,-100"
|
|
st "g0: FOR i IN 0 TO n GENERATE"
|
|
tm "FrameTitleTextMgr"
|
|
)
|
|
)
|
|
seqNum (FrameSequenceNumber
|
|
ps "TopLeftStrategy"
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "50,50,1850,1650"
|
|
)
|
|
num (Text
|
|
va (VaSet
|
|
)
|
|
xt "250,250,1650,1450"
|
|
st "1"
|
|
blo "250,1250"
|
|
tm "FrameSeqNumMgr"
|
|
)
|
|
)
|
|
decls (MlTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*61 (Text
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "11200,20000,22000,21200"
|
|
st "Frame Declarations"
|
|
blo "11200,21000"
|
|
)
|
|
*62 (MLText
|
|
va (VaSet
|
|
)
|
|
xt "11200,21200,11200,21200"
|
|
tm "BdFrameDeclTextMgr"
|
|
)
|
|
]
|
|
)
|
|
)
|
|
defaultBlockFrame (Frame
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "26368,26368,26368"
|
|
lineStyle 1
|
|
lineWidth 3
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,-1300,11000,-100"
|
|
st "b0: BLOCK (guard)"
|
|
tm "FrameTitleTextMgr"
|
|
)
|
|
)
|
|
seqNum (FrameSequenceNumber
|
|
ps "TopLeftStrategy"
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "50,50,1850,1650"
|
|
)
|
|
num (Text
|
|
va (VaSet
|
|
)
|
|
xt "250,250,1650,1450"
|
|
st "1"
|
|
blo "250,1250"
|
|
tm "FrameSeqNumMgr"
|
|
)
|
|
)
|
|
decls (MlTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*63 (Text
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "11200,20000,22000,21200"
|
|
st "Frame Declarations"
|
|
blo "11200,21000"
|
|
)
|
|
*64 (MLText
|
|
va (VaSet
|
|
)
|
|
xt "11200,21200,11200,21200"
|
|
tm "BdFrameDeclTextMgr"
|
|
)
|
|
]
|
|
)
|
|
style 3
|
|
)
|
|
defaultSaCptPort (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,750,2800,1950"
|
|
st "Port"
|
|
blo "0,1750"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
lang 11
|
|
decl (Decl
|
|
n "Port"
|
|
t ""
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultSaCptPortBuffer (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Diamond
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,750,2800,1950"
|
|
st "Port"
|
|
blo "0,1750"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
lang 11
|
|
m 3
|
|
decl (Decl
|
|
n "Port"
|
|
t ""
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultDeclText (MLText
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
)
|
|
archDeclarativeBlock (BdArchDeclBlock
|
|
uid 1,0
|
|
stg "BdArchDeclBlockLS"
|
|
declLabel (Text
|
|
uid 2,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "20000,0,27400,1200"
|
|
st "Declarations"
|
|
blo "20000,1000"
|
|
)
|
|
portLabel (Text
|
|
uid 3,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "20000,1200,23700,2400"
|
|
st "Ports:"
|
|
blo "20000,2200"
|
|
)
|
|
preUserLabel (Text
|
|
uid 4,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "20000,2400,25200,3600"
|
|
st "Pre User:"
|
|
blo "20000,3400"
|
|
)
|
|
preUserText (MLText
|
|
uid 5,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "22000,3600,40500,4400"
|
|
st "constant c_btnsNb : positive := 2;"
|
|
tm "BdDeclarativeTextMgr"
|
|
)
|
|
diagSignalLabel (Text
|
|
uid 6,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "20000,4400,29500,5600"
|
|
st "Diagram Signals:"
|
|
blo "20000,5400"
|
|
)
|
|
postUserLabel (Text
|
|
uid 7,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "20000,0,26400,1200"
|
|
st "Post User:"
|
|
blo "20000,1000"
|
|
)
|
|
postUserText (MLText
|
|
uid 8,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "20000,0,20000,0"
|
|
tm "BdDeclarativeTextMgr"
|
|
)
|
|
)
|
|
commonDM (CommonDM
|
|
ldm (LogicalDM
|
|
suid 5,0
|
|
usingSuid 1
|
|
emptyRow *65 (LEmptyRow
|
|
)
|
|
uid 54,0
|
|
optionalChildren [
|
|
*66 (RefLabelRowHdr
|
|
)
|
|
*67 (TitleRowHdr
|
|
)
|
|
*68 (FilterRowHdr
|
|
)
|
|
*69 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*70 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*71 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*72 (NameColHdr
|
|
tm "BlockDiagramNameColHdrMgr"
|
|
)
|
|
*73 (ModeColHdr
|
|
tm "BlockDiagramModeColHdrMgr"
|
|
)
|
|
*74 (TypeColHdr
|
|
tm "BlockDiagramTypeColHdrMgr"
|
|
)
|
|
*75 (BoundsColHdr
|
|
tm "BlockDiagramBoundsColHdrMgr"
|
|
)
|
|
*76 (InitColHdr
|
|
tm "BlockDiagramInitColHdrMgr"
|
|
)
|
|
*77 (EolColHdr
|
|
tm "BlockDiagramEolColHdrMgr"
|
|
)
|
|
*78 (LeafLogPort
|
|
port (LogicalPort
|
|
lang 11
|
|
m 4
|
|
decl (Decl
|
|
n "clk"
|
|
t "std_ulogic"
|
|
o 2
|
|
suid 2,0
|
|
)
|
|
)
|
|
uid 202,0
|
|
)
|
|
*79 (LeafLogPort
|
|
port (LogicalPort
|
|
lang 11
|
|
m 4
|
|
decl (Decl
|
|
n "rst"
|
|
t "std_ulogic"
|
|
o 3
|
|
suid 3,0
|
|
)
|
|
)
|
|
uid 204,0
|
|
)
|
|
*80 (LeafLogPort
|
|
port (LogicalPort
|
|
lang 11
|
|
m 4
|
|
decl (Decl
|
|
n "en"
|
|
t "std_ulogic"
|
|
o 4
|
|
suid 4,0
|
|
)
|
|
)
|
|
uid 206,0
|
|
)
|
|
*81 (LeafLogPort
|
|
port (LogicalPort
|
|
lang 11
|
|
m 4
|
|
decl (Decl
|
|
n "btns"
|
|
t "std_ulogic_vector"
|
|
b "(c_btnsNb -1 DOWNTO 0)"
|
|
o 4
|
|
suid 5,0
|
|
)
|
|
)
|
|
uid 432,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 67,0
|
|
optionalChildren [
|
|
*82 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *83 (MRCItem
|
|
litem &65
|
|
pos 4
|
|
dimension 20
|
|
)
|
|
uid 69,0
|
|
optionalChildren [
|
|
*84 (MRCItem
|
|
litem &66
|
|
pos 0
|
|
dimension 20
|
|
uid 70,0
|
|
)
|
|
*85 (MRCItem
|
|
litem &67
|
|
pos 1
|
|
dimension 23
|
|
uid 71,0
|
|
)
|
|
*86 (MRCItem
|
|
litem &68
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 72,0
|
|
)
|
|
*87 (MRCItem
|
|
litem &78
|
|
pos 0
|
|
dimension 20
|
|
uid 203,0
|
|
)
|
|
*88 (MRCItem
|
|
litem &79
|
|
pos 1
|
|
dimension 20
|
|
uid 205,0
|
|
)
|
|
*89 (MRCItem
|
|
litem &80
|
|
pos 2
|
|
dimension 20
|
|
uid 207,0
|
|
)
|
|
*90 (MRCItem
|
|
litem &81
|
|
pos 3
|
|
dimension 20
|
|
uid 433,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 73,0
|
|
optionalChildren [
|
|
*91 (MRCItem
|
|
litem &69
|
|
pos 0
|
|
dimension 20
|
|
uid 74,0
|
|
)
|
|
*92 (MRCItem
|
|
litem &71
|
|
pos 1
|
|
dimension 50
|
|
uid 75,0
|
|
)
|
|
*93 (MRCItem
|
|
litem &72
|
|
pos 2
|
|
dimension 100
|
|
uid 76,0
|
|
)
|
|
*94 (MRCItem
|
|
litem &73
|
|
pos 3
|
|
dimension 50
|
|
uid 77,0
|
|
)
|
|
*95 (MRCItem
|
|
litem &74
|
|
pos 4
|
|
dimension 100
|
|
uid 78,0
|
|
)
|
|
*96 (MRCItem
|
|
litem &75
|
|
pos 5
|
|
dimension 100
|
|
uid 79,0
|
|
)
|
|
*97 (MRCItem
|
|
litem &76
|
|
pos 6
|
|
dimension 50
|
|
uid 80,0
|
|
)
|
|
*98 (MRCItem
|
|
litem &77
|
|
pos 7
|
|
dimension 80
|
|
uid 81,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 68,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 53,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *99 (LEmptyRow
|
|
)
|
|
uid 83,0
|
|
optionalChildren [
|
|
*100 (RefLabelRowHdr
|
|
)
|
|
*101 (TitleRowHdr
|
|
)
|
|
*102 (FilterRowHdr
|
|
)
|
|
*103 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*104 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*105 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*106 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*107 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*108 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*109 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*110 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 95,0
|
|
optionalChildren [
|
|
*111 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *112 (MRCItem
|
|
litem &99
|
|
pos 0
|
|
dimension 20
|
|
)
|
|
uid 97,0
|
|
optionalChildren [
|
|
*113 (MRCItem
|
|
litem &100
|
|
pos 0
|
|
dimension 20
|
|
uid 98,0
|
|
)
|
|
*114 (MRCItem
|
|
litem &101
|
|
pos 1
|
|
dimension 23
|
|
uid 99,0
|
|
)
|
|
*115 (MRCItem
|
|
litem &102
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 100,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 101,0
|
|
optionalChildren [
|
|
*116 (MRCItem
|
|
litem &103
|
|
pos 0
|
|
dimension 20
|
|
uid 102,0
|
|
)
|
|
*117 (MRCItem
|
|
litem &105
|
|
pos 1
|
|
dimension 50
|
|
uid 103,0
|
|
)
|
|
*118 (MRCItem
|
|
litem &106
|
|
pos 2
|
|
dimension 100
|
|
uid 104,0
|
|
)
|
|
*119 (MRCItem
|
|
litem &107
|
|
pos 3
|
|
dimension 100
|
|
uid 105,0
|
|
)
|
|
*120 (MRCItem
|
|
litem &108
|
|
pos 4
|
|
dimension 50
|
|
uid 106,0
|
|
)
|
|
*121 (MRCItem
|
|
litem &109
|
|
pos 5
|
|
dimension 50
|
|
uid 107,0
|
|
)
|
|
*122 (MRCItem
|
|
litem &110
|
|
pos 6
|
|
dimension 80
|
|
uid 108,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 96,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 82,0
|
|
type 1
|
|
)
|
|
activeModelName "BlockDiag"
|
|
)
|