2653 lines
33 KiB
Plaintext
2653 lines
33 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "27.1"
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appVersion "2019.2 (Build 5)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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|
suid 24,0
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|
usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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|
uid 88,0
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|
optionalChildren [
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|
*2 (RefLabelRowHdr
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|
)
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|
*3 (TitleRowHdr
|
|
)
|
|
*4 (FilterRowHdr
|
|
)
|
|
*5 (RefLabelColHdr
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|
tm "RefLabelColHdrMgr"
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|
)
|
|
*6 (RowExpandColHdr
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|
tm "RowExpandColHdrMgr"
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)
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|
*7 (GroupColHdr
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|
tm "GroupColHdrMgr"
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|
)
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|
*8 (NameColHdr
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|
tm "NameColHdrMgr"
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)
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|
*9 (ModeColHdr
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|
tm "ModeColHdrMgr"
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|
)
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|
*10 (TypeColHdr
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|
tm "TypeColHdrMgr"
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|
)
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|
*11 (BoundsColHdr
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|
tm "BoundsColHdrMgr"
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|
)
|
|
*12 (InitColHdr
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|
tm "InitColHdrMgr"
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|
)
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|
*13 (EolColHdr
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|
tm "EolColHdrMgr"
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|
)
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|
*14 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "clock"
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t "std_ulogic"
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o 5
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suid 1,0
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)
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)
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|
uid 76,0
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)
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|
*15 (LogPort
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port (LogicalPort
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|
decl (Decl
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|
n "aluCode"
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|
t "std_ulogic_vector"
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|
b "( aluCodeBitNb-1 DOWNTO 0 )"
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o 3
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suid 2,0
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)
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)
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|
uid 78,0
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)
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*16 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "portInSel"
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t "std_ulogic"
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|
o 9
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suid 3,0
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)
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)
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uid 80,0
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)
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*17 (LogPort
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port (LogicalPort
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|
decl (Decl
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n "reset"
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t "std_ulogic"
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|
o 12
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suid 4,0
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)
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)
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uid 82,0
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)
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*18 (LogPort
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port (LogicalPort
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|
m 1
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decl (Decl
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|
n "portAddr"
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|
t "unsigned"
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b "(portAddressBitNb-1 DOWNTO 0)"
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o 16
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suid 5,0
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)
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)
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|
uid 84,0
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)
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|
*19 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "addrA"
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|
t "unsigned"
|
|
b "( registerAddressBitNb-1 DOWNTO 0 )"
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|
o 1
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suid 9,0
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)
|
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)
|
|
uid 415,0
|
|
)
|
|
*20 (LogPort
|
|
port (LogicalPort
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|
decl (Decl
|
|
n "addrB"
|
|
t "unsigned"
|
|
b "( registerAddressBitNb-1 DOWNTO 0 )"
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o 2
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suid 10,0
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)
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)
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|
uid 417,0
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)
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|
*21 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "instrData"
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|
t "signed"
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|
b "( registerBitNb-1 DOWNTO 0 )"
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o 6
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suid 11,0
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)
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)
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uid 419,0
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)
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|
*22 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "instrDataSel"
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|
t "std_ulogic"
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|
o 7
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suid 12,0
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)
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)
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|
uid 451,0
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|
)
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|
*23 (LogPort
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|
port (LogicalPort
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|
decl (Decl
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|
n "registerFileSel"
|
|
t "std_ulogic"
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|
o 11
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suid 13,0
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)
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)
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|
uid 453,0
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|
)
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|
*24 (LogPort
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|
port (LogicalPort
|
|
decl (Decl
|
|
n "scratchpadSel"
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|
t "std_ulogic"
|
|
o 13
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|
suid 14,0
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)
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)
|
|
uid 455,0
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|
)
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|
*25 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
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|
n "cIn"
|
|
t "std_ulogic"
|
|
o 4
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|
suid 15,0
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)
|
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)
|
|
uid 457,0
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|
)
|
|
*26 (LogPort
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|
port (LogicalPort
|
|
m 1
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|
decl (Decl
|
|
n "cOut"
|
|
t "std_ulogic"
|
|
o 15
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|
suid 16,0
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)
|
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)
|
|
uid 459,0
|
|
)
|
|
*27 (LogPort
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|
port (LogicalPort
|
|
m 1
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|
decl (Decl
|
|
n "zero"
|
|
t "std_ulogic"
|
|
o 20
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|
suid 17,0
|
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)
|
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)
|
|
uid 461,0
|
|
)
|
|
*28 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "portOut"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 17
|
|
suid 18,0
|
|
)
|
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)
|
|
uid 468,0
|
|
)
|
|
*29 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "portIn"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 8
|
|
suid 19,0
|
|
)
|
|
)
|
|
uid 499,0
|
|
)
|
|
*30 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "spadOut"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 19
|
|
suid 20,0
|
|
)
|
|
)
|
|
uid 540,0
|
|
)
|
|
*31 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "spadIn"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 14
|
|
suid 21,0
|
|
)
|
|
)
|
|
uid 542,0
|
|
)
|
|
*32 (LogPort
|
|
port (LogicalPort
|
|
decl (Decl
|
|
n "regWrite"
|
|
t "std_ulogic"
|
|
o 10
|
|
suid 23,0
|
|
)
|
|
)
|
|
uid 626,0
|
|
)
|
|
*33 (LogPort
|
|
port (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "scratchpadAddr"
|
|
t "unsigned"
|
|
b "(scratchpadAddressBitNb-1 DOWNTO 0)"
|
|
o 18
|
|
suid 24,0
|
|
)
|
|
)
|
|
uid 679,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 101,0
|
|
optionalChildren [
|
|
*34 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *35 (MRCItem
|
|
litem &1
|
|
pos 20
|
|
dimension 20
|
|
)
|
|
uid 103,0
|
|
optionalChildren [
|
|
*36 (MRCItem
|
|
litem &2
|
|
pos 0
|
|
dimension 20
|
|
uid 104,0
|
|
)
|
|
*37 (MRCItem
|
|
litem &3
|
|
pos 1
|
|
dimension 23
|
|
uid 105,0
|
|
)
|
|
*38 (MRCItem
|
|
litem &4
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 106,0
|
|
)
|
|
*39 (MRCItem
|
|
litem &14
|
|
pos 4
|
|
dimension 20
|
|
uid 77,0
|
|
)
|
|
*40 (MRCItem
|
|
litem &15
|
|
pos 2
|
|
dimension 20
|
|
uid 79,0
|
|
)
|
|
*41 (MRCItem
|
|
litem &16
|
|
pos 8
|
|
dimension 20
|
|
uid 81,0
|
|
)
|
|
*42 (MRCItem
|
|
litem &17
|
|
pos 10
|
|
dimension 20
|
|
uid 83,0
|
|
)
|
|
*43 (MRCItem
|
|
litem &18
|
|
pos 14
|
|
dimension 20
|
|
uid 85,0
|
|
)
|
|
*44 (MRCItem
|
|
litem &19
|
|
pos 0
|
|
dimension 20
|
|
uid 416,0
|
|
)
|
|
*45 (MRCItem
|
|
litem &20
|
|
pos 1
|
|
dimension 20
|
|
uid 418,0
|
|
)
|
|
*46 (MRCItem
|
|
litem &21
|
|
pos 5
|
|
dimension 20
|
|
uid 420,0
|
|
)
|
|
*47 (MRCItem
|
|
litem &22
|
|
pos 6
|
|
dimension 20
|
|
uid 452,0
|
|
)
|
|
*48 (MRCItem
|
|
litem &23
|
|
pos 9
|
|
dimension 20
|
|
uid 454,0
|
|
)
|
|
*49 (MRCItem
|
|
litem &24
|
|
pos 11
|
|
dimension 20
|
|
uid 456,0
|
|
)
|
|
*50 (MRCItem
|
|
litem &25
|
|
pos 3
|
|
dimension 20
|
|
uid 458,0
|
|
)
|
|
*51 (MRCItem
|
|
litem &26
|
|
pos 13
|
|
dimension 20
|
|
uid 460,0
|
|
)
|
|
*52 (MRCItem
|
|
litem &27
|
|
pos 17
|
|
dimension 20
|
|
uid 462,0
|
|
)
|
|
*53 (MRCItem
|
|
litem &28
|
|
pos 15
|
|
dimension 20
|
|
uid 469,0
|
|
)
|
|
*54 (MRCItem
|
|
litem &29
|
|
pos 7
|
|
dimension 20
|
|
uid 500,0
|
|
)
|
|
*55 (MRCItem
|
|
litem &30
|
|
pos 16
|
|
dimension 20
|
|
uid 541,0
|
|
)
|
|
*56 (MRCItem
|
|
litem &31
|
|
pos 12
|
|
dimension 20
|
|
uid 543,0
|
|
)
|
|
*57 (MRCItem
|
|
litem &32
|
|
pos 18
|
|
dimension 20
|
|
uid 627,0
|
|
)
|
|
*58 (MRCItem
|
|
litem &33
|
|
pos 19
|
|
dimension 20
|
|
uid 680,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 107,0
|
|
optionalChildren [
|
|
*59 (MRCItem
|
|
litem &5
|
|
pos 0
|
|
dimension 20
|
|
uid 108,0
|
|
)
|
|
*60 (MRCItem
|
|
litem &7
|
|
pos 1
|
|
dimension 50
|
|
uid 109,0
|
|
)
|
|
*61 (MRCItem
|
|
litem &8
|
|
pos 2
|
|
dimension 100
|
|
uid 110,0
|
|
)
|
|
*62 (MRCItem
|
|
litem &9
|
|
pos 3
|
|
dimension 50
|
|
uid 111,0
|
|
)
|
|
*63 (MRCItem
|
|
litem &10
|
|
pos 4
|
|
dimension 100
|
|
uid 112,0
|
|
)
|
|
*64 (MRCItem
|
|
litem &11
|
|
pos 5
|
|
dimension 250
|
|
uid 113,0
|
|
)
|
|
*65 (MRCItem
|
|
litem &12
|
|
pos 6
|
|
dimension 50
|
|
uid 114,0
|
|
)
|
|
*66 (MRCItem
|
|
litem &13
|
|
pos 7
|
|
dimension 80
|
|
uid 115,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 102,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 87,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *67 (LEmptyRow
|
|
)
|
|
uid 117,0
|
|
optionalChildren [
|
|
*68 (RefLabelRowHdr
|
|
)
|
|
*69 (TitleRowHdr
|
|
)
|
|
*70 (FilterRowHdr
|
|
)
|
|
*71 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*72 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*73 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*74 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*75 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*76 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*77 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*78 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
*79 (LogGeneric
|
|
generic (GiElement
|
|
name "registerBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 592,0
|
|
)
|
|
*80 (LogGeneric
|
|
generic (GiElement
|
|
name "registerAddressBitNb"
|
|
type "positive"
|
|
value "4"
|
|
)
|
|
uid 594,0
|
|
)
|
|
*81 (LogGeneric
|
|
generic (GiElement
|
|
name "aluCodeBitNb"
|
|
type "positive"
|
|
value "5"
|
|
)
|
|
uid 596,0
|
|
)
|
|
*82 (LogGeneric
|
|
generic (GiElement
|
|
name "scratchpadAddressBitNb"
|
|
type "natural"
|
|
value "4"
|
|
)
|
|
uid 727,0
|
|
)
|
|
*83 (LogGeneric
|
|
generic (GiElement
|
|
name "portAddressBitNb"
|
|
type "positive"
|
|
value "8"
|
|
)
|
|
uid 775,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 129,0
|
|
optionalChildren [
|
|
*84 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *85 (MRCItem
|
|
litem &67
|
|
pos 5
|
|
dimension 20
|
|
)
|
|
uid 131,0
|
|
optionalChildren [
|
|
*86 (MRCItem
|
|
litem &68
|
|
pos 0
|
|
dimension 20
|
|
uid 132,0
|
|
)
|
|
*87 (MRCItem
|
|
litem &69
|
|
pos 1
|
|
dimension 23
|
|
uid 133,0
|
|
)
|
|
*88 (MRCItem
|
|
litem &70
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 134,0
|
|
)
|
|
*89 (MRCItem
|
|
litem &79
|
|
pos 0
|
|
dimension 20
|
|
uid 593,0
|
|
)
|
|
*90 (MRCItem
|
|
litem &80
|
|
pos 1
|
|
dimension 20
|
|
uid 595,0
|
|
)
|
|
*91 (MRCItem
|
|
litem &81
|
|
pos 2
|
|
dimension 20
|
|
uid 597,0
|
|
)
|
|
*92 (MRCItem
|
|
litem &82
|
|
pos 4
|
|
dimension 20
|
|
uid 728,0
|
|
)
|
|
*93 (MRCItem
|
|
litem &83
|
|
pos 3
|
|
dimension 20
|
|
uid 776,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 135,0
|
|
optionalChildren [
|
|
*94 (MRCItem
|
|
litem &71
|
|
pos 0
|
|
dimension 20
|
|
uid 136,0
|
|
)
|
|
*95 (MRCItem
|
|
litem &73
|
|
pos 1
|
|
dimension 50
|
|
uid 137,0
|
|
)
|
|
*96 (MRCItem
|
|
litem &74
|
|
pos 2
|
|
dimension 233
|
|
uid 138,0
|
|
)
|
|
*97 (MRCItem
|
|
litem &75
|
|
pos 3
|
|
dimension 100
|
|
uid 139,0
|
|
)
|
|
*98 (MRCItem
|
|
litem &76
|
|
pos 4
|
|
dimension 50
|
|
uid 140,0
|
|
)
|
|
*99 (MRCItem
|
|
litem &77
|
|
pos 5
|
|
dimension 50
|
|
uid 141,0
|
|
)
|
|
*100 (MRCItem
|
|
litem &78
|
|
pos 6
|
|
dimension 80
|
|
uid 142,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 130,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 116,0
|
|
type 1
|
|
)
|
|
VExpander (VariableExpander
|
|
vvMap [
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds\\alu@and@regs\\symbol.sb.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds\\alu@and@regs\\symbol.sb.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_%(view)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds\\alu@and@regs"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds\\aluAndRegs"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "11.11.2019"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "Mon"
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "Monday"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "11"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "aluAndRegs"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_author"
|
|
value "silvan.zahno"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_date"
|
|
value "11.11.2019"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_host"
|
|
value "WE6996"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_time"
|
|
value "07:38:43"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "WE6996"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "NanoBlaze"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../PicoBlaze/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/ElN/Libraries/NanoBlaze/work"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "11"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "aluAndRegs"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "Nov"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "November"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds\\alu@and@regs\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "C:\\work\\git\\Education\\eln\\labo\\solution\\eln_labs\\Libs\\NanoBlaze\\hds\\aluAndRegs\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$ISE_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
|
|
(vvPair
|
|
variable "task_NC-SimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "sb"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "07:38:43"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "aluAndRegs"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "silvan.zahno"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2019.2 (Build 5)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2019"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "19"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "Vhdl2008LangMgr"
|
|
uid 86,0
|
|
optionalChildren [
|
|
*101 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*102 (CptPort
|
|
uid 51,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 52,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,36625,41000,37375"
|
|
)
|
|
tg (CPTG
|
|
uid 53,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 54,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,36500,44100,37500"
|
|
st "clock"
|
|
blo "42000,37300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 55,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,11200,20500,12000"
|
|
st "clock : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 5
|
|
suid 1,0
|
|
)
|
|
)
|
|
)
|
|
*103 (CptPort
|
|
uid 56,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 57,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "44625,12250,45375,13000"
|
|
)
|
|
tg (CPTG
|
|
uid 58,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 59,0
|
|
va (VaSet
|
|
)
|
|
xt "43300,14000,46500,15000"
|
|
st "aluCode"
|
|
blo "43300,14800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 60,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,9600,38000,10400"
|
|
st "aluCode : IN std_ulogic_vector ( aluCodeBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "aluCode"
|
|
t "std_ulogic_vector"
|
|
b "( aluCodeBitNb-1 DOWNTO 0 )"
|
|
o 3
|
|
suid 2,0
|
|
)
|
|
)
|
|
)
|
|
*104 (CptPort
|
|
uid 61,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 62,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,20625,41000,21375"
|
|
)
|
|
tg (CPTG
|
|
uid 63,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 64,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,20500,45400,21500"
|
|
st "portInSel"
|
|
blo "42000,21300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 65,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,14400,20500,15200"
|
|
st "portInSel : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "portInSel"
|
|
t "std_ulogic"
|
|
o 9
|
|
suid 3,0
|
|
)
|
|
)
|
|
)
|
|
*105 (CptPort
|
|
uid 66,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 67,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,38625,41000,39375"
|
|
)
|
|
tg (CPTG
|
|
uid 68,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 69,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,38500,44100,39500"
|
|
st "reset"
|
|
blo "42000,39300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 70,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,16800,20500,17600"
|
|
st "reset : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 12
|
|
suid 4,0
|
|
)
|
|
)
|
|
)
|
|
*106 (CptPort
|
|
uid 71,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 72,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,18625,65750,19375"
|
|
)
|
|
tg (CPTG
|
|
uid 73,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 74,0
|
|
va (VaSet
|
|
)
|
|
xt "60700,18500,64000,19500"
|
|
st "portAddr"
|
|
ju 2
|
|
blo "64000,19300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 75,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,20000,34500,20800"
|
|
st "portAddr : OUT unsigned (portAddressBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "portAddr"
|
|
t "unsigned"
|
|
b "(portAddressBitNb-1 DOWNTO 0)"
|
|
o 16
|
|
suid 5,0
|
|
)
|
|
)
|
|
)
|
|
*107 (CptPort
|
|
uid 400,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 401,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "48625,12250,49375,13000"
|
|
)
|
|
tg (CPTG
|
|
uid 402,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 403,0
|
|
va (VaSet
|
|
)
|
|
xt "48200,14000,50600,15000"
|
|
st "addrA"
|
|
blo "48200,14800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 404,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,8000,37500,8800"
|
|
st "addrA : IN unsigned ( registerAddressBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "addrA"
|
|
t "unsigned"
|
|
b "( registerAddressBitNb-1 DOWNTO 0 )"
|
|
o 1
|
|
suid 9,0
|
|
)
|
|
)
|
|
)
|
|
*108 (CptPort
|
|
uid 405,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 406,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "52625,12250,53375,13000"
|
|
)
|
|
tg (CPTG
|
|
uid 407,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 408,0
|
|
va (VaSet
|
|
)
|
|
xt "52400,14000,54800,15000"
|
|
st "addrB"
|
|
blo "52400,14800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 409,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,8800,37500,9600"
|
|
st "addrB : IN unsigned ( registerAddressBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "addrB"
|
|
t "unsigned"
|
|
b "( registerAddressBitNb-1 DOWNTO 0 )"
|
|
o 2
|
|
suid 10,0
|
|
)
|
|
)
|
|
)
|
|
*109 (CptPort
|
|
uid 410,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 411,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "60625,12250,61375,13000"
|
|
)
|
|
tg (CPTG
|
|
uid 412,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 413,0
|
|
va (VaSet
|
|
)
|
|
xt "59300,14000,62800,15000"
|
|
st "instrData"
|
|
blo "59300,14800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 414,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,12000,33000,12800"
|
|
st "instrData : IN signed ( registerBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "instrData"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 6
|
|
suid 11,0
|
|
)
|
|
)
|
|
)
|
|
*110 (CptPort
|
|
uid 421,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 422,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,18625,41000,19375"
|
|
)
|
|
tg (CPTG
|
|
uid 423,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 424,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,18500,47000,19500"
|
|
st "instrDataSel"
|
|
blo "42000,19300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 425,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,12800,20500,13600"
|
|
st "instrDataSel : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "instrDataSel"
|
|
t "std_ulogic"
|
|
o 7
|
|
suid 12,0
|
|
)
|
|
)
|
|
)
|
|
*111 (CptPort
|
|
uid 426,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 427,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,16625,41000,17375"
|
|
)
|
|
tg (CPTG
|
|
uid 428,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 429,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,16500,47900,17500"
|
|
st "registerFileSel"
|
|
blo "42000,17300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 430,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,16000,20500,16800"
|
|
st "registerFileSel : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "registerFileSel"
|
|
t "std_ulogic"
|
|
o 11
|
|
suid 13,0
|
|
)
|
|
)
|
|
)
|
|
*112 (CptPort
|
|
uid 431,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 432,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,22625,41000,23375"
|
|
)
|
|
tg (CPTG
|
|
uid 433,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 434,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,22500,47600,23500"
|
|
st "scratchpadSel"
|
|
blo "42000,23300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 435,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,17600,20500,18400"
|
|
st "scratchpadSel : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "scratchpadSel"
|
|
t "std_ulogic"
|
|
o 13
|
|
suid 14,0
|
|
)
|
|
)
|
|
)
|
|
*113 (CptPort
|
|
uid 436,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 437,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,28625,41000,29375"
|
|
)
|
|
tg (CPTG
|
|
uid 438,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 439,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,28500,43400,29500"
|
|
st "cIn"
|
|
blo "42000,29300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 440,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,10400,20500,11200"
|
|
st "cIn : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "cIn"
|
|
t "std_ulogic"
|
|
o 4
|
|
suid 15,0
|
|
)
|
|
)
|
|
)
|
|
*114 (CptPort
|
|
uid 441,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 493,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,30625,41000,31375"
|
|
)
|
|
tg (CPTG
|
|
uid 443,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 444,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,30500,44000,31500"
|
|
st "cOut"
|
|
blo "42000,31300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 445,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,19200,20500,20000"
|
|
st "cOut : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "cOut"
|
|
t "std_ulogic"
|
|
o 15
|
|
suid 16,0
|
|
)
|
|
)
|
|
)
|
|
*115 (CptPort
|
|
uid 446,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 447,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,32625,41000,33375"
|
|
)
|
|
tg (CPTG
|
|
uid 448,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 449,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,32500,43900,33500"
|
|
st "zero"
|
|
blo "42000,33300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 450,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,23200,19500,24000"
|
|
st "zero : OUT std_ulogic "
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "zero"
|
|
t "std_ulogic"
|
|
o 20
|
|
suid 17,0
|
|
)
|
|
)
|
|
)
|
|
*116 (CptPort
|
|
uid 463,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 464,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,20625,65750,21375"
|
|
)
|
|
tg (CPTG
|
|
uid 465,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 466,0
|
|
va (VaSet
|
|
)
|
|
xt "61100,20500,64000,21500"
|
|
st "portOut"
|
|
ju 2
|
|
blo "64000,21300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 467,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,20800,33000,21600"
|
|
st "portOut : OUT signed ( registerBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "portOut"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 17
|
|
suid 18,0
|
|
)
|
|
)
|
|
)
|
|
*117 (CptPort
|
|
uid 494,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 524,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,22625,65750,23375"
|
|
)
|
|
tg (CPTG
|
|
uid 496,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 497,0
|
|
va (VaSet
|
|
)
|
|
xt "61700,22500,64000,23500"
|
|
st "portIn"
|
|
ju 2
|
|
blo "64000,23300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 498,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,13600,33000,14400"
|
|
st "portIn : IN signed ( registerBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "portIn"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 8
|
|
suid 19,0
|
|
)
|
|
)
|
|
)
|
|
*118 (CptPort
|
|
uid 525,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 526,0
|
|
ro 180
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "56625,41000,57375,41750"
|
|
)
|
|
tg (CPTG
|
|
uid 527,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 528,0
|
|
va (VaSet
|
|
)
|
|
xt "56000,39000,59200,40000"
|
|
st "spadOut"
|
|
blo "56000,39800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 529,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,22400,33000,23200"
|
|
st "spadOut : OUT signed ( registerBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "spadOut"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 19
|
|
suid 20,0
|
|
)
|
|
)
|
|
)
|
|
*119 (CptPort
|
|
uid 530,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 531,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "60625,41000,61375,41750"
|
|
)
|
|
tg (CPTG
|
|
uid 532,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 533,0
|
|
va (VaSet
|
|
)
|
|
xt "60000,39000,62600,40000"
|
|
st "spadIn"
|
|
blo "60000,39800"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 534,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,18400,33000,19200"
|
|
st "spadIn : IN signed ( registerBitNb-1 DOWNTO 0 ) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "spadIn"
|
|
t "signed"
|
|
b "( registerBitNb-1 DOWNTO 0 )"
|
|
o 14
|
|
suid 21,0
|
|
)
|
|
)
|
|
)
|
|
*120 (CptPort
|
|
uid 621,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 622,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40250,24625,41000,25375"
|
|
)
|
|
tg (CPTG
|
|
uid 623,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 624,0
|
|
va (VaSet
|
|
)
|
|
xt "42000,24500,45400,25500"
|
|
st "regWrite"
|
|
blo "42000,25300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 625,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,15200,20500,16000"
|
|
st "regWrite : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "regWrite"
|
|
t "std_ulogic"
|
|
o 10
|
|
suid 23,0
|
|
)
|
|
)
|
|
)
|
|
*121 (CptPort
|
|
uid 674,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 675,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "65000,26625,65750,27375"
|
|
)
|
|
tg (CPTG
|
|
uid 676,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 677,0
|
|
va (VaSet
|
|
)
|
|
xt "57900,26500,64000,27500"
|
|
st "scratchpadAddr"
|
|
ju 2
|
|
blo "64000,27300"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 678,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,21600,37500,22400"
|
|
st "scratchpadAddr : OUT unsigned (scratchpadAddressBitNb-1 DOWNTO 0) ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "scratchpadAddr"
|
|
t "unsigned"
|
|
b "(scratchpadAddressBitNb-1 DOWNTO 0)"
|
|
o 18
|
|
suid 24,0
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 9,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "41000,13000,65000,41000"
|
|
)
|
|
oxt "15000,6000,31000,20000"
|
|
biTextGroup (BiTextGroup
|
|
uid 10,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
uid 11,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
|
|
xt "41600,41000,46000,42000"
|
|
st "NanoBlaze"
|
|
blo "41600,41800"
|
|
)
|
|
second (Text
|
|
uid 12,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
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|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,750,5300,2150"
|
|
st "Buffer0"
|
|
blo "0,1950"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
lang 11
|
|
m 3
|
|
decl (Decl
|
|
n "Buffer0"
|
|
t "unsigned"
|
|
b "(15 DOWNTO 0)"
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
DeclarativeBlock *138 (SymDeclBlock
|
|
uid 1,0
|
|
stg "SymDeclLayoutStrategy"
|
|
declLabel (Text
|
|
uid 2,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
|
|
xt "-2000,6000,3400,7000"
|
|
st "Declarations"
|
|
blo "-2000,6800"
|
|
)
|
|
portLabel (Text
|
|
uid 3,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
|
|
xt "-2000,7000,700,8000"
|
|
st "Ports:"
|
|
blo "-2000,7800"
|
|
)
|
|
externalLabel (Text
|
|
uid 4,0
|
|
va (VaSet
|
|
font "Arial,8,1"
|
|
)
|
|
xt "-2000,24000,400,25000"
|
|
st "User:"
|
|
blo "-2000,24800"
|
|
)
|
|
internalLabel (Text
|
|
uid 6,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Arial,8,1"
|
|
)
|
|
xt "-2000,6000,3800,7000"
|
|
st "Internal User:"
|
|
blo "-2000,6800"
|
|
)
|
|
externalText (MLText
|
|
uid 5,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,25000,0,25000"
|
|
tm "SyDeclarativeTextMgr"
|
|
)
|
|
internalText (MLText
|
|
uid 7,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "-2000,6000,-2000,6000"
|
|
tm "SyDeclarativeTextMgr"
|
|
)
|
|
)
|
|
lastUid 845,0
|
|
okToSyncOnLoad 1
|
|
OkToSyncGenericsOnLoad 1
|
|
activeModelName "Symbol"
|
|
)
|