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SEm-Labos/03-DigitalToAnalogConverter/Prefs/hds_user/v2018.1/templates/vhdl_architecture/architecture.vhd
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2024-02-23 13:01:05 +00:00

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VHDL

FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Architecture files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(architecture)