4006 lines
49 KiB
Plaintext
4006 lines
49 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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(DmPackageRef
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library "AhbLite"
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unitName "ahbLite"
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)
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]
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instances [
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(Instance
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name "I_tester"
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duLibraryName "AhbLiteComponents_test"
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duName "ahbGpio_tester"
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elements [
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(GiElement
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name "ioNb"
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type "positive"
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value "ioNb"
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)
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(GiElement
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name "clockFrequency"
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type "real"
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value "clockFrequency"
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)
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]
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mwi 0
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uid 12657,0
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)
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(Instance
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name "I_DUT"
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duLibraryName "AhbLiteComponents"
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duName "ahbGpio"
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elements [
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(GiElement
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name "ioNb"
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type "positive"
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value "ioNb"
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)
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]
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mwi 0
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uid 13194,0
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)
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]
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embeddedInstances [
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(EmbeddedInstance
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name "eb1"
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number "1"
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)
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]
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libraryRefs [
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"ieee"
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"AhbLite"
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]
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)
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version "32.1"
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appVersion "2019.2 (Build 5)"
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noEmbeddedEditors 1
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model (BlockDiag
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VExpander (VariableExpander
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vvMap [
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(vvPair
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variable " "
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value " "
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)
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(vvPair
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variable "HDLDir"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hdl"
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)
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(vvPair
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variable "HDSDir"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
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)
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(vvPair
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variable "SideDataDesignDir"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd.info"
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)
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(vvPair
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variable "SideDataUserDir"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd.user"
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)
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(vvPair
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variable "SourceDir"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds"
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)
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(vvPair
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variable "appl"
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value "HDL Designer"
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)
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(vvPair
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variable "arch_name"
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value "struct"
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)
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(vvPair
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|
variable "asm_file"
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|
value "beamer.asm"
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|
)
|
|
(vvPair
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|
variable "concat_file"
|
|
value "concatenated"
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|
)
|
|
(vvPair
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|
variable "config"
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|
value "%(unit)_%(view)_config"
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)
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|
(vvPair
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variable "d"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb"
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)
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|
(vvPair
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|
variable "d_logical"
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|
value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbGpio_tb"
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)
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(vvPair
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variable "date"
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value "28.04.2023"
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)
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(vvPair
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variable "day"
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value "ven."
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)
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|
(vvPair
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variable "day_long"
|
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value "vendredi"
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)
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(vvPair
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variable "dd"
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value "28"
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)
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|
(vvPair
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variable "designName"
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value "$DESIGN_NAME"
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)
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(vvPair
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variable "entity_name"
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value "ahbGpio_tb"
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)
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|
(vvPair
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variable "ext"
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value "<TBD>"
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)
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(vvPair
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variable "f"
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value "struct.bd"
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)
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(vvPair
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variable "f_logical"
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value "struct.bd"
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)
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(vvPair
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variable "f_noext"
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value "struct"
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)
|
|
(vvPair
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variable "graphical_source_author"
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value "axel.amand"
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)
|
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(vvPair
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variable "graphical_source_date"
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value "28.04.2023"
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)
|
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(vvPair
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variable "graphical_source_group"
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value "UNKNOWN"
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)
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|
(vvPair
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variable "graphical_source_host"
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value "WE7860"
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)
|
|
(vvPair
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variable "graphical_source_time"
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value "15:06:49"
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)
|
|
(vvPair
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variable "group"
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value "UNKNOWN"
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)
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(vvPair
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variable "host"
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value "WE7860"
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)
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|
(vvPair
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variable "language"
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value "VHDL"
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)
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(vvPair
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variable "library"
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value "AhbLiteComponents_test"
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)
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(vvPair
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variable "library_downstream_ModelSim"
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value "D:\\Users\\ELN_labs\\VHDL_comp"
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)
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(vvPair
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variable "library_downstream_ModelSimCompiler"
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value "$SCRATCH_DIR/AhbLiteComponents_test"
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)
|
|
(vvPair
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variable "mm"
|
|
value "04"
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|
)
|
|
(vvPair
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|
variable "module_name"
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value "ahbGpio_tb"
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)
|
|
(vvPair
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variable "month"
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value "avr."
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)
|
|
(vvPair
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|
variable "month_long"
|
|
value "avril"
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)
|
|
(vvPair
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variable "p"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahb@gpio_tb\\struct.bd"
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)
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(vvPair
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variable "p_logical"
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value "C:\\dev\\sem-labs\\06-07-08-09-SystemOnChip\\Prefs\\..\\AhbLiteComponents_test\\hds\\ahbGpio_tb\\struct.bd"
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)
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|
(vvPair
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variable "package_name"
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|
value "<Undefined Variable>"
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)
|
|
(vvPair
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|
variable "project_name"
|
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value "hds"
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|
)
|
|
(vvPair
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|
variable "series"
|
|
value "HDL Designer Series"
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|
)
|
|
(vvPair
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|
variable "task_ADMS"
|
|
value "<TBD>"
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)
|
|
(vvPair
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|
variable "task_AsmPath"
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value "$HDS_LIBS_DIR\\NanoBlaze\\hdl"
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)
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(vvPair
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variable "task_DesignCompilerPath"
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|
value "<TBD>"
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)
|
|
(vvPair
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|
variable "task_HDSPath"
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value "$HDS_HOME"
|
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)
|
|
(vvPair
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|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$ISE_SCRATCH_WORK_DIR"
|
|
)
|
|
(vvPair
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|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
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|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
|
|
(vvPair
|
|
variable "task_NC"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_NC-SimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "bd"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "struct"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "struct"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "15:06:49"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "ahbGpio_tb"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "axel.amand"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2019.2 (Build 5)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "struct"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2023"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "23"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "Vhdl2008LangMgr"
|
|
uid 198,0
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optionalChildren [
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|
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uid 1487,0
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optionalChildren [
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uid 1489,0
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text (MLText
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tm "CommentText"
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wrapOption 3
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visibleHeight 1600
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visibleWidth 18600
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position 1
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text (MLText
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st "
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ju 0
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tm "CommentText"
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wrapOption 3
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*35 (CptPort
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ps "OnEdgeStrategy"
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fg "0,65535,0"
|
|
)
|
|
xt "71250,56625,72000,57375"
|
|
)
|
|
tg (CPTG
|
|
uid 13176,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 13177,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "73000,56300,79800,57700"
|
|
st "hReset_n"
|
|
blo "73000,57500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hReset_n"
|
|
t "std_uLogic"
|
|
o 8
|
|
suid 2064,0
|
|
)
|
|
)
|
|
)
|
|
*36 (CptPort
|
|
uid 13178,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 13179,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "88000,38625,88750,39375"
|
|
)
|
|
tg (CPTG
|
|
uid 13180,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 13181,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "82800,38300,87000,39700"
|
|
st "ioOut"
|
|
ju 2
|
|
blo "87000,39500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "ioOut"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 10
|
|
suid 2065,0
|
|
)
|
|
)
|
|
)
|
|
*37 (CptPort
|
|
uid 13182,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 13183,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "71250,44625,72000,45375"
|
|
)
|
|
tg (CPTG
|
|
uid 13184,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 13185,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "73000,44300,76500,45700"
|
|
st "hSel"
|
|
blo "73000,45500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "hSel"
|
|
t "std_uLogic"
|
|
o 11
|
|
suid 2066,0
|
|
)
|
|
)
|
|
)
|
|
*38 (CptPort
|
|
uid 13186,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 13187,0
|
|
ro 270
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "88000,40625,88750,41375"
|
|
)
|
|
tg (CPTG
|
|
uid 13188,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 13189,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "83800,40300,87000,41700"
|
|
st "ioIn"
|
|
ju 2
|
|
blo "87000,41500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "ioIn"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 12
|
|
suid 2067,0
|
|
)
|
|
)
|
|
)
|
|
*39 (CptPort
|
|
uid 13190,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 13191,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "88000,36625,88750,37375"
|
|
)
|
|
tg (CPTG
|
|
uid 13192,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 13193,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "83500,36300,87000,37700"
|
|
st "ioEn"
|
|
ju 2
|
|
blo "87000,37500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "ioEn"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 13
|
|
suid 2068,0
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 13195,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "72000,33000,88000,59000"
|
|
)
|
|
oxt "47000,16000,63000,42000"
|
|
ttg (MlTextGroup
|
|
uid 13196,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*40 (Text
|
|
uid 13197,0
|
|
va (VaSet
|
|
)
|
|
xt "72100,58700,79600,59700"
|
|
st "AhbLiteComponents"
|
|
blo "72100,59500"
|
|
tm "BdLibraryNameMgr"
|
|
)
|
|
*41 (Text
|
|
uid 13198,0
|
|
va (VaSet
|
|
)
|
|
xt "72100,59700,75300,60700"
|
|
st "ahbGpio"
|
|
blo "72100,60500"
|
|
tm "CptNameMgr"
|
|
)
|
|
*42 (Text
|
|
uid 13199,0
|
|
va (VaSet
|
|
)
|
|
xt "72100,60700,74800,61700"
|
|
st "I_DUT"
|
|
blo "72100,61500"
|
|
tm "InstanceNameMgr"
|
|
)
|
|
]
|
|
)
|
|
ga (GenericAssociation
|
|
uid 13200,0
|
|
ps "EdgeToEdgeStrategy"
|
|
matrix (Matrix
|
|
uid 13201,0
|
|
text (MLText
|
|
uid 13202,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "72000,63000,88000,63800"
|
|
st "ioNb = ioNb ( positive ) "
|
|
)
|
|
header ""
|
|
)
|
|
elements [
|
|
(GiElement
|
|
name "ioNb"
|
|
type "positive"
|
|
value "ioNb"
|
|
)
|
|
]
|
|
)
|
|
viewicon (ZoomableIcon
|
|
uid 13203,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "49152,49152,49152"
|
|
)
|
|
xt "72250,57250,73750,58750"
|
|
iconName "VhdlFileViewIcon.png"
|
|
iconMaskName "VhdlFileViewIcon.msk"
|
|
ftype 10
|
|
)
|
|
viewiconposition 0
|
|
portVis (PortSigDisplay
|
|
sTC 0
|
|
sT 1
|
|
)
|
|
archFileType "UNKNOWN"
|
|
)
|
|
*43 (HdlText
|
|
uid 13204,0
|
|
optionalChildren [
|
|
*44 (EmbeddedText
|
|
uid 13246,0
|
|
commentText (CommentText
|
|
uid 13247,0
|
|
ps "CenterOffsetStrategy"
|
|
shape (Rectangle
|
|
uid 13248,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "0,0,32768"
|
|
lineWidth 2
|
|
)
|
|
xt "104000,34000,120000,44000"
|
|
)
|
|
oxt "0,0,18000,5000"
|
|
text (MLText
|
|
uid 13249,0
|
|
va (VaSet
|
|
)
|
|
xt "104200,34200,119200,43800"
|
|
st "
|
|
tristate: process(ioEn, ioOut)
|
|
begin
|
|
for index in io'range loop
|
|
if ioEn(index) = '1' then
|
|
io(index) <= ioOut(index);
|
|
else
|
|
io(index) <= 'Z';
|
|
end if;
|
|
end loop;
|
|
end process tristate;
|
|
|
|
ioIn <= std_ulogic_vector(io);
|
|
|
|
"
|
|
tm "HdlTextMgr"
|
|
wrapOption 3
|
|
visibleHeight 10000
|
|
visibleWidth 16000
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 13205,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,37120"
|
|
lineColor "0,0,32768"
|
|
lineWidth 2
|
|
)
|
|
xt "104000,33000,120000,45000"
|
|
)
|
|
oxt "0,0,8000,10000"
|
|
ttg (MlTextGroup
|
|
uid 13206,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*45 (Text
|
|
uid 13207,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "103850,45000,106150,46000"
|
|
st "eb1"
|
|
blo "103850,45800"
|
|
tm "HdlTextNameMgr"
|
|
)
|
|
*46 (Text
|
|
uid 13208,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "103850,46000,105050,47000"
|
|
st "1"
|
|
blo "103850,46800"
|
|
tm "HdlTextNumberMgr"
|
|
)
|
|
]
|
|
)
|
|
viewicon (ZoomableIcon
|
|
uid 13209,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "49152,49152,49152"
|
|
)
|
|
xt "104250,43250,105750,44750"
|
|
iconName "TextFile.png"
|
|
iconMaskName "TextFile.msk"
|
|
ftype 21
|
|
)
|
|
viewiconposition 0
|
|
)
|
|
*47 (Net
|
|
uid 13210,0
|
|
decl (Decl
|
|
n "ioEn"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 12
|
|
suid 118,0
|
|
)
|
|
declText (MLText
|
|
uid 13211,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "0,0,28000,1200"
|
|
st "SIGNAL ioEn : std_ulogic_vector(ioNb-1 DOWNTO 0)
|
|
"
|
|
)
|
|
)
|
|
*48 (Net
|
|
uid 13218,0
|
|
decl (Decl
|
|
n "ioOut"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 14
|
|
suid 119,0
|
|
)
|
|
declText (MLText
|
|
uid 13219,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "0,0,28000,1200"
|
|
st "SIGNAL ioOut : std_ulogic_vector(ioNb-1 DOWNTO 0)
|
|
"
|
|
)
|
|
)
|
|
*49 (Net
|
|
uid 13226,0
|
|
decl (Decl
|
|
n "ioIn"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 13
|
|
suid 120,0
|
|
)
|
|
declText (MLText
|
|
uid 13227,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "0,0,28000,1200"
|
|
st "SIGNAL ioIn : std_ulogic_vector(ioNb-1 DOWNTO 0)
|
|
"
|
|
)
|
|
)
|
|
*50 (Net
|
|
uid 13244,0
|
|
decl (Decl
|
|
n "io"
|
|
t "std_logic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 11
|
|
suid 122,0
|
|
)
|
|
declText (MLText
|
|
uid 13245,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "0,0,27500,1200"
|
|
st "SIGNAL io : std_logic_vector(ioNb-1 DOWNTO 0)
|
|
"
|
|
)
|
|
)
|
|
*51 (Wire
|
|
uid 12557,0
|
|
shape (OrthoPolyLine
|
|
uid 12558,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "70000,57000,71250,67000"
|
|
pts [
|
|
"71250,57000"
|
|
"70000,57000"
|
|
"70000,67000"
|
|
]
|
|
)
|
|
start &35
|
|
end &22
|
|
sat 32
|
|
eat 2
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 12561,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 12562,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "63250,55600,70050,57000"
|
|
st "hReset_n"
|
|
blo "63250,56800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &12
|
|
)
|
|
*52 (Wire
|
|
uid 12565,0
|
|
shape (OrthoPolyLine
|
|
uid 12566,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "68000,55000,71250,67000"
|
|
pts [
|
|
"71250,55000"
|
|
"68000,55000"
|
|
"68000,67000"
|
|
]
|
|
)
|
|
start &34
|
|
end &22
|
|
sat 32
|
|
eat 2
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 12569,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 12570,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "66250,53600,69750,55000"
|
|
st "hClk"
|
|
blo "66250,54800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &13
|
|
)
|
|
*53 (Wire
|
|
uid 12573,0
|
|
shape (OrthoPolyLine
|
|
uid 12574,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "64000,51000,71250,67000"
|
|
pts [
|
|
"71250,51000"
|
|
"64000,51000"
|
|
"64000,67000"
|
|
]
|
|
)
|
|
start &33
|
|
end &22
|
|
sat 32
|
|
eat 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 12577,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 12578,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "65250,49600,69950,51000"
|
|
st "hResp"
|
|
blo "65250,50800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &14
|
|
)
|
|
*54 (Wire
|
|
uid 12581,0
|
|
shape (OrthoPolyLine
|
|
uid 12582,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "62000,49000,71250,67000"
|
|
pts [
|
|
"71250,49000"
|
|
"62000,49000"
|
|
"62000,67000"
|
|
]
|
|
)
|
|
start &32
|
|
end &22
|
|
sat 32
|
|
eat 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 12585,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 12586,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "64250,47600,69750,49000"
|
|
st "hReady"
|
|
blo "64250,48800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &15
|
|
)
|
|
*55 (Wire
|
|
uid 12589,0
|
|
shape (OrthoPolyLine
|
|
uid 12590,0
|
|
va (VaSet
|
|
vasetType 3
|
|
lineWidth 2
|
|
)
|
|
xt "60000,47000,71250,67000"
|
|
pts [
|
|
"71250,47000"
|
|
"60000,47000"
|
|
"60000,67000"
|
|
]
|
|
)
|
|
start &29
|
|
end &22
|
|
sat 32
|
|
eat 1
|
|
sty 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 12593,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 12594,0
|
|
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ga (GenericAssociation
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ttg (MlTextGroup
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stg "VerticalLayoutStrategy"
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ga (GenericAssociation
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ps "EdgeToEdgeStrategy"
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text (MLText
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elements [
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entityPath ""
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defaultHdlText (HdlText
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shape (Rectangle
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ttg (MlTextGroup
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ps "CenterOffsetStrategy"
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stg "VerticalLayoutStrategy"
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textVec [
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st "eb1"
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blo "2950,4200"
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tm "HdlTextNameMgr"
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va (VaSet
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font "Verdana,8,1"
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st "1"
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blo "2950,5200"
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tm "HdlTextNumberMgr"
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viewicon (ZoomableIcon
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sl 0
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va (VaSet
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vasetType 1
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iconMaskName "UnknownFile.msk"
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viewiconposition 0
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)
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defaultEmbeddedText (EmbeddedText
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commentText (CommentText
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ps "CenterOffsetStrategy"
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shape (Rectangle
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va (VaSet
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vasetType 1
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fg "65535,65535,65535"
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lineColor "0,0,32768"
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xt "0,0,18000,5000"
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text (MLText
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va (VaSet
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xt "200,200,3200,1400"
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st "
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tm "HdlTextMgr"
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wrapOption 3
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visibleHeight 4600
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visibleWidth 17600
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)
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defaultGlobalConnector (GlobalConnector
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shape (Circle
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va (VaSet
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vasetType 1
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fg "65535,65535,0"
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name (Text
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va (VaSet
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st "G"
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defaultRipper (Ripper
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ps "OnConnectorStrategy"
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shape (Line2D
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]
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va (VaSet
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vasetType 1
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xt "0,0,1000,1000"
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)
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defaultBdJunction (BdJunction
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ps "OnConnectorStrategy"
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shape (Circle
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va (VaSet
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vasetType 1
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xt "-400,-400,400,400"
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radius 400
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)
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defaultPortIoIn (PortIoIn
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shape (CompositeShape
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va (VaSet
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vasetType 1
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fg "0,0,32768"
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)
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optionalChildren [
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sl 0
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ro 270
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(Line
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pts [
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)
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)
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stc 0
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sf 1
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tg (WTG
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ps "PortIoTextPlaceStrategy"
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stg "STSignalDisplayStrategy"
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f (Text
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va (VaSet
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font "Verdana,12,0"
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)
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xt "-2875,-375,-2875,-375"
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ju 2
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|
blo "-2875,-375"
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tm "WireNameMgr"
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)
|
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)
|
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)
|
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defaultPortIoOut (PortIoOut
|
|
shape (CompositeShape
|
|
va (VaSet
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|
vasetType 1
|
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fg "0,0,32768"
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)
|
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optionalChildren [
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(Pentagon
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sl 0
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(Line
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sl 0
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pts [
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)
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]
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)
|
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stc 0
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sf 1
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tg (WTG
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ps "PortIoTextPlaceStrategy"
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stg "STSignalDisplayStrategy"
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f (Text
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va (VaSet
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font "Verdana,12,0"
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)
|
|
xt "2875,-375,2875,-375"
|
|
blo "2875,-375"
|
|
tm "WireNameMgr"
|
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)
|
|
)
|
|
)
|
|
defaultPortIoInOut (PortIoInOut
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,0,32768"
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)
|
|
optionalChildren [
|
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(Hexagon
|
|
sl 0
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|
xt "500,-375,2000,375"
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)
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(Line
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sl 0
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|
xt "0,0,500,0"
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pts [
|
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|
]
|
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)
|
|
]
|
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)
|
|
stc 0
|
|
sf 1
|
|
tg (WTG
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ps "PortIoTextPlaceStrategy"
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|
stg "STSignalDisplayStrategy"
|
|
f (Text
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|
va (VaSet
|
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font "Verdana,12,0"
|
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)
|
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xt "3000,500,3000,500"
|
|
blo "3000,500"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultPortIoBuffer (PortIoBuffer
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "0,0,32768"
|
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)
|
|
optionalChildren [
|
|
(Hexagon
|
|
sl 0
|
|
xt "500,-375,2000,375"
|
|
)
|
|
(Line
|
|
sl 0
|
|
xt "0,0,500,0"
|
|
pts [
|
|
"0,0"
|
|
"500,0"
|
|
]
|
|
)
|
|
]
|
|
)
|
|
stc 0
|
|
sf 1
|
|
tg (WTG
|
|
ps "PortIoTextPlaceStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "3000,500,3000,500"
|
|
blo "3000,500"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultSignal (Wire
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
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f (Text
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va (VaSet
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font "Verdana,12,0"
|
|
)
|
|
xt "0,0,3400,1400"
|
|
st "sig0"
|
|
blo "0,1200"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultBus (Wire
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
lineWidth 2
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
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)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
sty 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,0,4700,1400"
|
|
st "dbus0"
|
|
blo "0,1200"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultBundle (Bundle
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
lineColor "32768,0,0"
|
|
lineWidth 2
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
textGroup (BiTextGroup
|
|
ps "ConnStartEndStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,400,3700,1400"
|
|
st "bundle0"
|
|
blo "0,1200"
|
|
tm "BundleNameMgr"
|
|
)
|
|
second (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,1400,1500,2600"
|
|
st "()"
|
|
tm "BundleContentsMgr"
|
|
)
|
|
)
|
|
bundleNet &0
|
|
)
|
|
defaultPortMapFrame (PortMapFrame
|
|
ps "PortMapFrameStrategy"
|
|
shape (RectFrame
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|
va (VaSet
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|
vasetType 1
|
|
fg "65535,65535,65535"
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|
lineColor "0,0,32768"
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|
lineWidth 2
|
|
)
|
|
xt "0,0,10000,12000"
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|
)
|
|
portMapText (BiTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,0,5000,1200"
|
|
st "Auto list"
|
|
)
|
|
second (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,1200,9600,2400"
|
|
st "User defined list"
|
|
tm "PortMapTextMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultGenFrame (Frame
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "26368,26368,26368"
|
|
lineStyle 2
|
|
lineWidth 3
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,-1400,18500,-200"
|
|
st "g0: FOR i IN 0 TO n GENERATE"
|
|
tm "FrameTitleTextMgr"
|
|
)
|
|
)
|
|
seqNum (FrameSequenceNumber
|
|
ps "TopLeftStrategy"
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "50,50,1050,1750"
|
|
)
|
|
num (Text
|
|
va (VaSet
|
|
)
|
|
xt "150,400,950,1400"
|
|
st "1"
|
|
blo "150,1200"
|
|
tm "FrameSeqNumMgr"
|
|
)
|
|
)
|
|
decls (MlTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*92 (Text
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "11800,20000,21800,21000"
|
|
st "Frame Declarations"
|
|
blo "11800,20800"
|
|
)
|
|
*93 (MLText
|
|
va (VaSet
|
|
)
|
|
xt "11800,21000,11800,21000"
|
|
tm "BdFrameDeclTextMgr"
|
|
)
|
|
]
|
|
)
|
|
)
|
|
defaultBlockFrame (Frame
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "26368,26368,26368"
|
|
lineStyle 1
|
|
lineWidth 3
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,-1400,11000,-200"
|
|
st "b0: BLOCK (guard)"
|
|
tm "FrameTitleTextMgr"
|
|
)
|
|
)
|
|
seqNum (FrameSequenceNumber
|
|
ps "TopLeftStrategy"
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "50,50,1050,1750"
|
|
)
|
|
num (Text
|
|
va (VaSet
|
|
)
|
|
xt "150,400,950,1400"
|
|
st "1"
|
|
blo "150,1200"
|
|
tm "FrameSeqNumMgr"
|
|
)
|
|
)
|
|
decls (MlTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*94 (Text
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "11800,20000,21800,21000"
|
|
st "Frame Declarations"
|
|
blo "11800,20800"
|
|
)
|
|
*95 (MLText
|
|
va (VaSet
|
|
)
|
|
xt "11800,21000,11800,21000"
|
|
tm "BdFrameDeclTextMgr"
|
|
)
|
|
]
|
|
)
|
|
style 3
|
|
)
|
|
defaultSaCptPort (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,750,2800,1950"
|
|
st "Port"
|
|
blo "0,1750"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "Port"
|
|
t ""
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultSaCptPortBuffer (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Diamond
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
)
|
|
xt "0,750,2800,1950"
|
|
st "Port"
|
|
blo "0,1750"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
m 3
|
|
decl (Decl
|
|
n "Port"
|
|
t ""
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultDeclText (MLText
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
)
|
|
archDeclarativeBlock (BdArchDeclBlock
|
|
uid 1,0
|
|
stg "BdArchDeclBlockLS"
|
|
declLabel (Text
|
|
uid 2,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "29000,26800,36000,27800"
|
|
st "Declarations"
|
|
blo "29000,27600"
|
|
)
|
|
portLabel (Text
|
|
uid 3,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "29000,28000,32400,29000"
|
|
st "Ports:"
|
|
blo "29000,28800"
|
|
)
|
|
preUserLabel (Text
|
|
uid 4,0
|
|
va (VaSet
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "29000,27800,33800,28800"
|
|
st "Pre User:"
|
|
blo "29000,28600"
|
|
)
|
|
preUserText (MLText
|
|
uid 5,0
|
|
va (VaSet
|
|
font "Courier New,10,0"
|
|
)
|
|
xt "31000,28800,59200,33600"
|
|
st "constant ioNb: positive := 8;
|
|
|
|
constant clockFrequency : real := 60.0E6;
|
|
--constant clockFrequency : real := 66.0E6;"
|
|
tm "BdDeclarativeTextMgr"
|
|
)
|
|
diagSignalLabel (Text
|
|
uid 6,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "29000,28000,38000,29000"
|
|
st "Diagram Signals:"
|
|
blo "29000,28800"
|
|
)
|
|
postUserLabel (Text
|
|
uid 7,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,8,1"
|
|
)
|
|
xt "29000,28000,35000,29000"
|
|
st "Post User:"
|
|
blo "29000,28800"
|
|
)
|
|
postUserText (MLText
|
|
uid 8,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,10,0"
|
|
)
|
|
xt "31000,42400,31000,42400"
|
|
tm "BdDeclarativeTextMgr"
|
|
)
|
|
)
|
|
commonDM (CommonDM
|
|
ldm (LogicalDM
|
|
suid 122,0
|
|
usingSuid 1
|
|
emptyRow *96 (LEmptyRow
|
|
)
|
|
uid 3310,0
|
|
optionalChildren [
|
|
*97 (RefLabelRowHdr
|
|
)
|
|
*98 (TitleRowHdr
|
|
)
|
|
*99 (FilterRowHdr
|
|
)
|
|
*100 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*101 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*102 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*103 (NameColHdr
|
|
tm "BlockDiagramNameColHdrMgr"
|
|
)
|
|
*104 (ModeColHdr
|
|
tm "BlockDiagramModeColHdrMgr"
|
|
)
|
|
*105 (TypeColHdr
|
|
tm "BlockDiagramTypeColHdrMgr"
|
|
)
|
|
*106 (BoundsColHdr
|
|
tm "BlockDiagramBoundsColHdrMgr"
|
|
)
|
|
*107 (InitColHdr
|
|
tm "BlockDiagramInitColHdrMgr"
|
|
)
|
|
*108 (EolColHdr
|
|
tm "BlockDiagramEolColHdrMgr"
|
|
)
|
|
*109 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hReset_n"
|
|
t "std_uLogic"
|
|
o 5
|
|
suid 108,0
|
|
)
|
|
)
|
|
uid 12637,0
|
|
)
|
|
*110 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hClk"
|
|
t "std_uLogic"
|
|
o 2
|
|
suid 109,0
|
|
)
|
|
)
|
|
uid 12639,0
|
|
)
|
|
*111 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hResp"
|
|
t "std_uLogic"
|
|
o 6
|
|
suid 110,0
|
|
)
|
|
)
|
|
uid 12641,0
|
|
)
|
|
*112 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hReady"
|
|
t "std_uLogic"
|
|
o 4
|
|
suid 111,0
|
|
)
|
|
)
|
|
uid 12643,0
|
|
)
|
|
*113 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hRData"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 3
|
|
suid 112,0
|
|
)
|
|
)
|
|
uid 12645,0
|
|
)
|
|
*114 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hSel"
|
|
t "std_uLogic"
|
|
o 7
|
|
suid 113,0
|
|
)
|
|
)
|
|
uid 12647,0
|
|
)
|
|
*115 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hWrite"
|
|
t "std_uLogic"
|
|
o 10
|
|
suid 114,0
|
|
)
|
|
)
|
|
uid 12649,0
|
|
)
|
|
*116 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hTrans"
|
|
t "std_ulogic_vector"
|
|
b "(ahbTransBitNb-1 DOWNTO 0)"
|
|
o 8
|
|
suid 115,0
|
|
)
|
|
)
|
|
uid 12651,0
|
|
)
|
|
*117 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hWData"
|
|
t "std_ulogic_vector"
|
|
b "(ahbDataBitNb-1 DOWNTO 0)"
|
|
o 9
|
|
suid 116,0
|
|
)
|
|
)
|
|
uid 12653,0
|
|
)
|
|
*118 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "hAddr"
|
|
t "unsigned"
|
|
b "( ahbAddressBitNb-1 DOWNTO 0 )"
|
|
o 1
|
|
suid 117,0
|
|
)
|
|
)
|
|
uid 12655,0
|
|
)
|
|
*119 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "ioEn"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 12
|
|
suid 118,0
|
|
)
|
|
)
|
|
uid 13250,0
|
|
)
|
|
*120 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "ioOut"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 14
|
|
suid 119,0
|
|
)
|
|
)
|
|
uid 13252,0
|
|
)
|
|
*121 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "ioIn"
|
|
t "std_ulogic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 13
|
|
suid 120,0
|
|
)
|
|
)
|
|
uid 13254,0
|
|
)
|
|
*122 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "io"
|
|
t "std_logic_vector"
|
|
b "(ioNb-1 DOWNTO 0)"
|
|
o 11
|
|
suid 122,0
|
|
)
|
|
)
|
|
uid 13256,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 3323,0
|
|
optionalChildren [
|
|
*123 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *124 (MRCItem
|
|
litem &96
|
|
pos 14
|
|
dimension 20
|
|
)
|
|
uid 3325,0
|
|
optionalChildren [
|
|
*125 (MRCItem
|
|
litem &97
|
|
pos 0
|
|
dimension 20
|
|
uid 3326,0
|
|
)
|
|
*126 (MRCItem
|
|
litem &98
|
|
pos 1
|
|
dimension 23
|
|
uid 3327,0
|
|
)
|
|
*127 (MRCItem
|
|
litem &99
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 3328,0
|
|
)
|
|
*128 (MRCItem
|
|
litem &109
|
|
pos 0
|
|
dimension 20
|
|
uid 12638,0
|
|
)
|
|
*129 (MRCItem
|
|
litem &110
|
|
pos 1
|
|
dimension 20
|
|
uid 12640,0
|
|
)
|
|
*130 (MRCItem
|
|
litem &111
|
|
pos 2
|
|
dimension 20
|
|
uid 12642,0
|
|
)
|
|
*131 (MRCItem
|
|
litem &112
|
|
pos 3
|
|
dimension 20
|
|
uid 12644,0
|
|
)
|
|
*132 (MRCItem
|
|
litem &113
|
|
pos 4
|
|
dimension 20
|
|
uid 12646,0
|
|
)
|
|
*133 (MRCItem
|
|
litem &114
|
|
pos 5
|
|
dimension 20
|
|
uid 12648,0
|
|
)
|
|
*134 (MRCItem
|
|
litem &115
|
|
pos 6
|
|
dimension 20
|
|
uid 12650,0
|
|
)
|
|
*135 (MRCItem
|
|
litem &116
|
|
pos 7
|
|
dimension 20
|
|
uid 12652,0
|
|
)
|
|
*136 (MRCItem
|
|
litem &117
|
|
pos 8
|
|
dimension 20
|
|
uid 12654,0
|
|
)
|
|
*137 (MRCItem
|
|
litem &118
|
|
pos 9
|
|
dimension 20
|
|
uid 12656,0
|
|
)
|
|
*138 (MRCItem
|
|
litem &119
|
|
pos 10
|
|
dimension 20
|
|
uid 13251,0
|
|
)
|
|
*139 (MRCItem
|
|
litem &120
|
|
pos 11
|
|
dimension 20
|
|
uid 13253,0
|
|
)
|
|
*140 (MRCItem
|
|
litem &121
|
|
pos 12
|
|
dimension 20
|
|
uid 13255,0
|
|
)
|
|
*141 (MRCItem
|
|
litem &122
|
|
pos 13
|
|
dimension 20
|
|
uid 13257,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 3329,0
|
|
optionalChildren [
|
|
*142 (MRCItem
|
|
litem &100
|
|
pos 0
|
|
dimension 20
|
|
uid 3330,0
|
|
)
|
|
*143 (MRCItem
|
|
litem &102
|
|
pos 1
|
|
dimension 50
|
|
uid 3331,0
|
|
)
|
|
*144 (MRCItem
|
|
litem &103
|
|
pos 2
|
|
dimension 100
|
|
uid 3332,0
|
|
)
|
|
*145 (MRCItem
|
|
litem &104
|
|
pos 3
|
|
dimension 50
|
|
uid 3333,0
|
|
)
|
|
*146 (MRCItem
|
|
litem &105
|
|
pos 4
|
|
dimension 100
|
|
uid 3334,0
|
|
)
|
|
*147 (MRCItem
|
|
litem &106
|
|
pos 5
|
|
dimension 100
|
|
uid 3335,0
|
|
)
|
|
*148 (MRCItem
|
|
litem &107
|
|
pos 6
|
|
dimension 50
|
|
uid 3336,0
|
|
)
|
|
*149 (MRCItem
|
|
litem &108
|
|
pos 7
|
|
dimension 80
|
|
uid 3337,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 3324,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 3309,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *150 (LEmptyRow
|
|
)
|
|
uid 3339,0
|
|
optionalChildren [
|
|
*151 (RefLabelRowHdr
|
|
)
|
|
*152 (TitleRowHdr
|
|
)
|
|
*153 (FilterRowHdr
|
|
)
|
|
*154 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*155 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*156 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*157 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*158 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*159 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*160 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*161 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
uid 3351,0
|
|
optionalChildren [
|
|
*162 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *163 (MRCItem
|
|
litem &150
|
|
pos 0
|
|
dimension 20
|
|
)
|
|
uid 3353,0
|
|
optionalChildren [
|
|
*164 (MRCItem
|
|
litem &151
|
|
pos 0
|
|
dimension 20
|
|
uid 3354,0
|
|
)
|
|
*165 (MRCItem
|
|
litem &152
|
|
pos 1
|
|
dimension 23
|
|
uid 3355,0
|
|
)
|
|
*166 (MRCItem
|
|
litem &153
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 3356,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 3357,0
|
|
optionalChildren [
|
|
*167 (MRCItem
|
|
litem &154
|
|
pos 0
|
|
dimension 20
|
|
uid 3358,0
|
|
)
|
|
*168 (MRCItem
|
|
litem &156
|
|
pos 1
|
|
dimension 50
|
|
uid 3359,0
|
|
)
|
|
*169 (MRCItem
|
|
litem &157
|
|
pos 2
|
|
dimension 100
|
|
uid 3360,0
|
|
)
|
|
*170 (MRCItem
|
|
litem &158
|
|
pos 3
|
|
dimension 100
|
|
uid 3361,0
|
|
)
|
|
*171 (MRCItem
|
|
litem &159
|
|
pos 4
|
|
dimension 50
|
|
uid 3362,0
|
|
)
|
|
*172 (MRCItem
|
|
litem &160
|
|
pos 5
|
|
dimension 50
|
|
uid 3363,0
|
|
)
|
|
*173 (MRCItem
|
|
litem &161
|
|
pos 6
|
|
dimension 80
|
|
uid 3364,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 3352,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 3338,0
|
|
type 1
|
|
)
|
|
activeModelName "BlockDiag"
|
|
)
|