From 86f265f22d6680ca119c744d02ee37fb84033052 Mon Sep 17 00:00:00 2001 From: Klagarge Date: Mon, 31 Mar 2025 16:31:52 +0200 Subject: [PATCH] ADD week 4 --- 02-Easy4/E4 | Bin 02-Easy4/E4.txt | 26 ++ 02-Easy4/code.c | 61 +++++ 03-Average1/A1 | Bin .../.gradle/8.5/checksums/checksums.lock | Bin 0 -> 40 bytes .../dependencies-accessors.lock | Bin 0 -> 40 bytes .../.gradle/8.5/fileHashes/fileHashes.lock | Bin 0 -> 40 bytes .../buildOutputCleanup.lock | Bin 0 -> 40 bytes .../buildOutputCleanup/cache.properties | 2 + 03-Average1/A1-vscode/.vscode/launch.json | 56 ++++ 03-Average1/A1-vscode/.vscode/settings.json | 241 +++++++++++++++++ 03-Average1/A1-vscode/Module.manifest | 0 03-Average1/A1-vscode/README.md | 1 + 03-Average1/A1-vscode/build.gradle | 66 +++++ 03-Average1/A1-vscode/data/README.txt | 15 ++ 03-Average1/A1-vscode/data/buildLanguage.xml | 50 ++++ .../A1-vscode/data/languages/skel.cspec | 121 +++++++++ .../A1-vscode/data/languages/skel.ldefs | 20 ++ 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mode 100644 SRE.rep/idata/00/~00000000.db/db.2.gbf create mode 100644 SRE.rep/idata/00/~00000001.db/db.3.gbf create mode 100644 SRE.rep/idata/00/~00000002.db/db.1.gbf create mode 100644 SRE.rep/idata/00/~00000004.db/db.2.gbf create mode 100644 SRE.rep/idata/00/~00000005.db/db.2.gbf create mode 100644 SRE.rep/idata/00/~00000006.db/db.1.gbf create mode 100644 SRE.rep/idata/~index.bak create mode 100644 SRE.rep/idata/~index.dat create mode 100644 SRE.rep/project.prp create mode 100644 SRE.rep/projectState create mode 100644 SRE.rep/user/00/00000000.prp create mode 100644 SRE.rep/user/00/00000001.prp create mode 100644 SRE.rep/user/00/00000002.prp create mode 100644 SRE.rep/user/00/00000003.prp create mode 100644 SRE.rep/user/00/00000004.prp create mode 100644 SRE.rep/user/00/~00000000.db/db.2.gbf create mode 100644 SRE.rep/user/00/~00000001.db/db.11.gbf create mode 100644 SRE.rep/user/00/~00000002.db/db.1.gbf create mode 100644 SRE.rep/user/00/~00000003.db/db.3.gbf create mode 100644 SRE.rep/user/00/~00000004.db/db.1.gbf create mode 100644 SRE.rep/user/~index.bak create mode 100644 SRE.rep/user/~index.dat create mode 100644 SRE.rep/user/~journal.bak create mode 100644 SRE.rep/versioned/~index.bak create mode 100644 SRE.rep/versioned/~index.dat diff --git a/02-Easy4/E4 b/02-Easy4/E4 old mode 100644 new mode 100755 diff --git a/02-Easy4/E4.txt b/02-Easy4/E4.txt new file mode 100644 index 0000000..181fc8b --- /dev/null +++ b/02-Easy4/E4.txt @@ -0,0 +1,26 @@ +1. Was this executable stripped? +yes + +2. How are the password checking functionalities entangled with the operating system? + + +3. What is the algorithm used to check the validity of a password? + + +4. Can you break this password checker, i.e., implementing a generator of valid passwords? You must send 16 different valid passwords by email to pascal+sre25@mod-p.ch before Mar. 24th, 2025, 12h00 CET to validate this lab and get 5 points. +3A3A3A3A3A3A +3A4B5C6D7E8F +SaSaSaSaSaSa +SaTbUcVdWeXf ++9+9+9+9+9+9 ++99GGUUccq4B +!//==KKYYggu +>L3AGUES3AN\ +HVESDRHVESDR +8F7E6D5C4B3A +XfWeVdUcTbSa +4BcqUcGU9G+9 +guYgKY=K/=!/ +N\3AESGU3A>L +DRESHVDRESHV +#1HVESLZP^#1 diff --git a/02-Easy4/code.c b/02-Easy4/code.c new file mode 100644 index 0000000..e6802d1 --- /dev/null +++ b/02-Easy4/code.c @@ -0,0 +1,61 @@ +#include +#include +#include +#include +#include +#include + +static char* input_pw; +static char return_check_pw; + + + +void check_pw(void) { + uint8_t bVar1; + char *pcVar2; + char *pcVar3; + + bVar1 = 0; + pcVar2 = input_pw; + do { + pcVar3 = pcVar2 + 2; + bVar1 = bVar1 | ((pcVar2[1] - 14) - pcVar2[0]); + pcVar2 = pcVar3; + } while (input_pw + 12 != pcVar3); + return_check_pw = (int)(char)bVar1; + return; +} + +void print_check_pw(void) { + if (return_check_pw != 0) { + fwrite("\nWrong password ! Try again...\n\n",1,0x20,stderr); + return; + } + fprintf(stderr,"\nCongratulations ! A right password is indeed %s :-)\n\n",input_pw); + return; +} + + +uint64_t main(int param_1,char* *param_2) { + char *__s; + size_t sVar1; + + if (param_1 == 2) { + __s = (char *)param_2[1]; + sVar1 = strlen(__s); + if (sVar1 == 12) { + input_pw = __s; + signal(10,check_pw); + signal(12,print_check_pw); + kill(0,10); + kill(0,12); + return 0; + } + fwrite("\nWrong password ! Try again...\n\n",1,0x20,stderr); + } else { + fwrite("\nMSE-SRE Challenge E4 --- Enjoy !\n",1,0x22,stderr); + fwrite("\nWhat I need is 1024 passwords passing the check!\n",1,0x32,stderr); + fprintf(stderr,"\nUsage: %s \n\n",*param_2); + } + return 1; +} diff --git a/03-Average1/A1 b/03-Average1/A1 old mode 100644 new mode 100755 diff --git a/03-Average1/A1-vscode/.gradle/8.5/checksums/checksums.lock b/03-Average1/A1-vscode/.gradle/8.5/checksums/checksums.lock new file mode 100644 index 0000000000000000000000000000000000000000..46e31881bd272aed55e0bfba7d7bcdd3ea25c47a GIT binary patch literal 40 qcmZP;$_!taF)wrv0~9bbFicrzaZfRHcE9;w1~xMjV?zrA1_l7qWeNEJ literal 0 HcmV?d00001 diff --git a/03-Average1/A1-vscode/.gradle/8.5/dependencies-accessors/dependencies-accessors.lock b/03-Average1/A1-vscode/.gradle/8.5/dependencies-accessors/dependencies-accessors.lock new file mode 100644 index 0000000000000000000000000000000000000000..31c222f67c834abc5bb2acf4dc2e2198d8be4eb6 GIT binary patch literal 40 qcmZP$>fAp&Zc^1p1}I==V3@LQiNAGpbAVM51DlzNv7v export GHIDRA_INSTALL_DIR= +// > gradle +// +// or +// +// > gradle -PGHIDRA_INSTALL_DIR= +// +// Gradle should be invoked from the directory of the project to build. Please see the +// application.gradle.version property in /Ghidra/application.properties +// for the correction version of Gradle to use for the Ghidra installation you specify. + +//----------------------START "DO NOT MODIFY" SECTION------------------------------ +def ghidraInstallDir + +if (System.env.GHIDRA_INSTALL_DIR) { + ghidraInstallDir = System.env.GHIDRA_INSTALL_DIR +} +else if (project.hasProperty("GHIDRA_INSTALL_DIR")) { + ghidraInstallDir = project.getProperty("GHIDRA_INSTALL_DIR") +} +else { + ghidraInstallDir = "/opt/ghidra" +} + +task distributeExtension { + group "Ghidra" + + apply from: new File(ghidraInstallDir).getCanonicalPath() + "/support/buildExtension.gradle" + dependsOn ':buildExtension' +} +//----------------------END "DO NOT MODIFY" SECTION------------------------------- + +repositories { + // Declare dependency repositories here. This is not needed if dependencies are manually + // dropped into the lib/ directory. + // See https://docs.gradle.org/current/userguide/declaring_repositories.html for more info. + // Ex: mavenCentral() +} + +dependencies { + // Any external dependencies added here will automatically be copied to the lib/ directory when + // this extension is built. +} + +// Exclude additional files from the built extension +// Ex: buildExtension.exclude '.idea/**' diff --git a/03-Average1/A1-vscode/data/README.txt b/03-Average1/A1-vscode/data/README.txt new file mode 100755 index 0000000..1222f67 --- /dev/null +++ b/03-Average1/A1-vscode/data/README.txt @@ -0,0 +1,15 @@ +The "data" directory is intended to hold data files that will be used by this module and will +not end up in the .jar file, but will be present in the zip or tar file. Typically, data +files are placed here rather than in the resources directory if the user may need to edit them. + +An optional data/languages directory can exist for the purpose of containing various Sleigh language +specification files and importer opinion files. + +The data/buildLanguage.xml is used for building the contents of the data/languages directory. + +The skel language definition has been commented-out within the skel.ldefs file so that the +skeleton language does not show-up within Ghidra. + +See the Sleigh language documentation (docs/languages/index.html) for details Sleigh language +specification syntax. + \ No newline at end of file diff --git a/03-Average1/A1-vscode/data/buildLanguage.xml b/03-Average1/A1-vscode/data/buildLanguage.xml new file mode 100755 index 0000000..1e2a627 --- /dev/null +++ b/03-Average1/A1-vscode/data/buildLanguage.xml @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/03-Average1/A1-vscode/data/languages/skel.cspec b/03-Average1/A1-vscode/data/languages/skel.cspec new file mode 100755 index 0000000..764e2ba --- /dev/null +++ b/03-Average1/A1-vscode/data/languages/skel.cspec @@ -0,0 +1,121 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/03-Average1/A1-vscode/data/languages/skel.ldefs b/03-Average1/A1-vscode/data/languages/skel.ldefs new file mode 100755 index 0000000..8cb0d2a --- /dev/null +++ b/03-Average1/A1-vscode/data/languages/skel.ldefs @@ -0,0 +1,20 @@ + + + + + + + + diff --git a/03-Average1/A1-vscode/data/languages/skel.opinion b/03-Average1/A1-vscode/data/languages/skel.opinion new file mode 100755 index 0000000..6b58b6f --- /dev/null +++ b/03-Average1/A1-vscode/data/languages/skel.opinion @@ -0,0 +1,12 @@ + + + + + diff --git a/03-Average1/A1-vscode/data/languages/skel.pspec b/03-Average1/A1-vscode/data/languages/skel.pspec new file mode 100755 index 0000000..c4f18fa --- /dev/null +++ b/03-Average1/A1-vscode/data/languages/skel.pspec @@ -0,0 +1,23 @@ + + + + + + + + + + + + + + + + + + + + + + + diff --git a/03-Average1/A1-vscode/data/languages/skel.sinc b/03-Average1/A1-vscode/data/languages/skel.sinc new file mode 100755 index 0000000..caee0ea --- /dev/null +++ b/03-Average1/A1-vscode/data/languages/skel.sinc @@ -0,0 +1,220 @@ +# sleigh include file for Skeleton language instructions + +define token opbyte (8) + op0_8 = (0,7) + op6_2 = (6,7) + + dRegPair4_2 = (4,5) + pRegPair4_2 = (4,5) + sRegPair4_2 = (4,5) + qRegPair4_2 = (4,5) + qRegPair4_2a = (4,5) + qRegPair4_2b = (4,5) + rRegPair4_2 = (4,5) + + reg3_3 = (3,5) + bits3_3 = (3,5) + + bits0_4 = (0,3) + + reg0_3 = (0,2) + bits0_3 = (0,2) +; + +define token data8 (8) + imm8 = (0,7) + sign8 = (7,7) + simm8 = (0,7) signed +; + +define token data16 (16) + timm4 = (12,15) + imm16 = (0,15) + sign16 = (15,15) + simm16 = (0,15) signed +; + +attach variables [ reg0_3 reg3_3 ] [ B C D E H L _ A ]; + +attach variables [ sRegPair4_2 dRegPair4_2 ] [ BC DE HL SP ]; + +attach variables [ qRegPair4_2 ] [ BC DE HL AF ]; +attach variables [ qRegPair4_2a ] [ B D H A ]; +attach variables [ qRegPair4_2b ] [ C E L F ]; + +attach variables [ pRegPair4_2 ] [ BC DE IX SP ]; +attach variables [ rRegPair4_2 ] [ BC DE IY SP ]; + +################################################################ +# Macros +################################################################ + +macro setResultFlags(result) { + $(Z_flag) = (result == 0); + $(S_flag) = (result s< 0); +} + +macro setAddCarryFlags(op1,op2) { + $(C_flag) = (carry(op1,zext($(C_flag))) || carry(op2,op1 + zext($(C_flag)))); +} + +macro setAddFlags(op1,op2) { + $(C_flag) = carry(op1,op2); +} + +macro setSubtractCarryFlags(op1,op2) { + notC = ~$(C_flag); + $(C_flag) = ((op1 < sext(notC)) || (op2 < (op1 - sext(notC)))); +} + +macro setSubtractFlags(op1,op2) { + $(C_flag) = (op1 < op2); +} + +macro push16(val16) { + SP = SP - 2; + *:2 SP = val16; +} + +macro pop16(ret16) { + ret16 = *:2 SP; + SP = SP + 2; +} + +macro push8(val8) { + SP = SP - 1; + ptr:2 = SP; + *:1 ptr = val8; +} + +macro pop8(ret8) { + ptr:2 = SP; + ret8 = *:1 ptr; + SP = SP + 1; +} + +################################################################ + +ixMem8: (IX+simm8) is IX & simm8 { ptr:2 = IX + simm8; export *:1 ptr; } +ixMem8: (IX-val) is IX & simm8 & sign8=1 [ val = -simm8; ] { ptr:2 = IX + simm8; export *:1 ptr; } + +iyMem8: (IY+simm8) is IY & simm8 { ptr:2 = IY + simm8; export *:1 ptr; } +iyMem8: (IY-val) is IY & simm8 & sign8=1 [ val = -simm8; ] { ptr:2 = IY + simm8; export *:1 ptr; } + +Addr16: imm16 is imm16 { export *:1 imm16; } + +Mem16: (imm16) is imm16 { export *:2 imm16; } + +RelAddr8: loc is simm8 [ loc = inst_next + simm8; ] { export *:1 loc; } + +cc: "NZ" is bits3_3=0x0 { c:1 = ($(Z_flag) == 0); export c; } +cc: "Z" is bits3_3=0x1 { c:1 = $(Z_flag); export c; } +cc: "NC" is bits3_3=0x2 { c:1 = ($(C_flag) == 0); export c; } +cc: "C" is bits3_3=0x3 { c:1 = $(C_flag); export c; } +cc: "PO" is bits3_3=0x4 { c:1 = ($(PV_flag) == 0); export c; } +cc: "PE" is bits3_3=0x5 { c:1 = $(PV_flag); export c; } +cc: "P" is bits3_3=0x6 { c:1 = ($(S_flag) == 0); export c; } +cc: "M" is bits3_3=0x7 { c:1 = $(S_flag); export c; } + +cc2: "NZ" is bits3_3=0x4 { c:1 = ($(Z_flag) == 0); export c; } +cc2: "Z" is bits3_3=0x5 { c:1 = $(Z_flag); export c; } +cc2: "NC" is bits3_3=0x6 { c:1 = ($(C_flag) == 0); export c; } +cc2: "C" is bits3_3=0x7 { c:1 = $(C_flag); export c; } + +################################################################ + + +:LD IX,Mem16 is op0_8=0xdd & IX; op0_8=0x2a; Mem16 { + IX = Mem16; +} + +:LD IY,Mem16 is op0_8=0xfd & IY; op0_8=0x2a; Mem16 { + IY = Mem16; +} + +:LD Mem16,HL is op0_8=0x22 & HL; Mem16 { + Mem16 = HL; +} + +:LD Mem16,dRegPair4_2 is op0_8=0xed; op6_2=0x1 & dRegPair4_2 & bits0_4=0x3; Mem16 { + Mem16 = dRegPair4_2; +} + +:LD Mem16,IX is op0_8=0xdd & IX; op0_8=0x22; Mem16 { + Mem16 = IX; +} + +:LD Mem16,IY is op0_8=0xfd & IY; op0_8=0x22; Mem16 { + Mem16 = IY; +} + +:NEG is op0_8=0xed; op0_8=0x44 { + $(PV_flag) = (A == 0x80); + $(C_flag) = (A != 0); + A = -A; + setResultFlags(A); +} + +:SET bits3_3,ixMem8 is op0_8=0xdd; op0_8=0xcb; ixMem8; op6_2=0x3 & bits3_3 & bits0_3=0x6 { + mask:1 = (1 << bits3_3); + val:1 = ixMem8; + ixMem8 = val | mask; +} + +:SET bits3_3,iyMem8 is op0_8=0xfd; op0_8=0xcb; iyMem8; op6_2=0x3 & bits3_3 & bits0_3=0x6 { + mask:1 = (1 << bits3_3); + val:1 = iyMem8; + iyMem8 = val | mask; +} + +:JP Addr16 is op0_8=0xc3; Addr16 { + goto Addr16; +} + +:JP cc,Addr16 is op6_2=0x3 & cc & bits0_3=0x2; Addr16 { + if (!cc) goto Addr16; +} + +:JR RelAddr8 is op0_8=0x18; RelAddr8 { + goto RelAddr8; +} + +:JR cc2,RelAddr8 is op6_2=0x0 & cc2 & bits0_3=0x0; RelAddr8 { + if (cc2) goto RelAddr8; +} + +:JP (HL) is op0_8=0xe9 & HL { + goto [HL]; +} + +:JP (IX) is op0_8=0xdd & IX; op0_8=0xe9 { + goto [IX]; +} + +:JP (IY) is op0_8=0xfd & IY; op0_8=0xe9 { + goto [IY]; +} + +:CALL Addr16 is op0_8=0xcd; Addr16 { + push16(&:2 inst_next); + call Addr16; +} + +:CALL cc,Addr16 is op6_2=0x3 & cc & bits0_3=0x4; Addr16 { + if (!cc) goto inst_next; + push16(&:2 inst_next); + call Addr16; +} + +:RET is op0_8=0xc9 { + pop16(PC); + ptr:2 = zext(PC); + return [ptr]; +} + +:RET cc is op6_2=0x3 & cc & bits0_3=0x0 { + if (!cc) goto inst_next; + pop16(PC); + ptr:2 = zext(PC); + return [ptr]; +} diff --git a/03-Average1/A1-vscode/data/languages/skel.slaspec b/03-Average1/A1-vscode/data/languages/skel.slaspec new file mode 100755 index 0000000..53669f9 --- /dev/null +++ b/03-Average1/A1-vscode/data/languages/skel.slaspec @@ -0,0 +1,39 @@ +# sleigh specification file for Skeleton Processor +# >> see docs/languages/sleigh.htm or sleigh.pdf for Sleigh syntax +# Other language modules (see Ghidra/Processors) may provide better examples +# when creating a new language module. + +define endian=little; +define alignment=1; + +define space ram type=ram_space size=2 default; + +define space io type=ram_space size=2; +define space register type=register_space size=1; + +define register offset=0x00 size=1 [ F A C B E D L H I R ]; +define register offset=0x00 size=2 [ AF BC DE HL ]; +define register offset=0x20 size=1 [ A_ F_ B_ C_ D_ E_ H_ L_ ]; # Alternate registers +define register offset=0x20 size=2 [ AF_ BC_ DE_ HL_ ]; # Alternate registers + +define register offset=0x40 size=2 [ _ PC SP IX IY ]; + +define register offset=0x50 size=1 [ rCBAR rCBR rBBR ]; + +# Define context bits (if defined, size must be multiple of 4-bytes) +define register offset=0xf0 size=4 contextreg; + +define context contextreg + assume8bitIOSpace = (0,0) +; + +# Flag bits (?? manual is very confusing - could be typos!) +@define C_flag "F[0,1]" # C: Carry +@define N_flag "F[1,1]" # N: Add/Subtract +@define PV_flag "F[2,1]" # PV: Parity/Overflow +@define H_flag "F[4,1]" # H: Half Carry +@define Z_flag "F[6,1]" # Z: Zero +@define S_flag "F[7,1]" # S: Sign + +# Include contents of skel.sinc file +@include "skel.sinc" diff --git a/03-Average1/A1-vscode/data/sleighArgs.txt b/03-Average1/A1-vscode/data/sleighArgs.txt new file mode 100755 index 0000000..ce06926 --- /dev/null +++ b/03-Average1/A1-vscode/data/sleighArgs.txt @@ -0,0 +1,6 @@ +# Add sleigh compiler options to this file (one per line) which will +# be used when compiling each language within this module. +# All options should start with a '-' character. +# +# IMPORTANT: The -a option should NOT be specified +# \ No newline at end of file diff --git a/03-Average1/A1-vscode/extension.properties b/03-Average1/A1-vscode/extension.properties new file mode 100755 index 0000000..86a8a29 --- /dev/null +++ b/03-Average1/A1-vscode/extension.properties @@ -0,0 +1,5 @@ +name=@extname@ +description=The extension description can be customized by editing the extension.properties file. +author= +createdOn= +version=@extversion@ diff --git a/03-Average1/A1-vscode/ghidra_scripts/README.txt b/03-Average1/A1-vscode/ghidra_scripts/README.txt new file mode 100755 index 0000000..9e408f4 --- /dev/null +++ b/03-Average1/A1-vscode/ghidra_scripts/README.txt @@ -0,0 +1 @@ +Java source directory to hold module-specific Ghidra scripts. diff --git a/03-Average1/A1-vscode/ghidra_scripts/SampleScript.java b/03-Average1/A1-vscode/ghidra_scripts/SampleScript.java new file mode 100644 index 0000000..4657be2 --- /dev/null +++ b/03-Average1/A1-vscode/ghidra_scripts/SampleScript.java @@ -0,0 +1,11 @@ +// Sample Java GhidraScript +// @category Examples +import ghidra.app.script.GhidraScript; + +public class SampleScript extends GhidraScript { + + @Override + protected void run() throws Exception { + println("Sample script!"); + } +} diff --git a/03-Average1/A1-vscode/ghidra_scripts/sample_script.py b/03-Average1/A1-vscode/ghidra_scripts/sample_script.py new file mode 100644 index 0000000..63942d6 --- /dev/null +++ b/03-Average1/A1-vscode/ghidra_scripts/sample_script.py @@ -0,0 +1,8 @@ +# Sample PyGhidra GhidraScript +# @category Examples +# @runtime PyGhidra + +from java.util import LinkedList +java_list = LinkedList([1,2,3]) + +block = currentProgram.memory.getBlock('.text') diff --git a/03-Average1/A1-vscode/lib/README.txt b/03-Average1/A1-vscode/lib/README.txt new file mode 100755 index 0000000..528dbc6 --- /dev/null +++ b/03-Average1/A1-vscode/lib/README.txt @@ -0,0 +1,3 @@ +The "lib" directory is intended to hold Jar files which this module is dependent upon. Jar files +may be placed in this directory manually, or automatically by maven via the dependencies block +of this module's build.gradle file. \ No newline at end of file diff --git a/03-Average1/A1-vscode/os/linux_x86_64/README.txt b/03-Average1/A1-vscode/os/linux_x86_64/README.txt new file mode 100755 index 0000000..7dd33ce --- /dev/null +++ b/03-Average1/A1-vscode/os/linux_x86_64/README.txt @@ -0,0 +1,3 @@ +The "os/linux_x86_64" directory is intended to hold Linux native binaries +which this module is dependent upon. This directory may be eliminated for a specific +module if native binaries are not provided for the corresponding platform. diff --git a/03-Average1/A1-vscode/os/mac_x86_64/README.txt b/03-Average1/A1-vscode/os/mac_x86_64/README.txt new file mode 100755 index 0000000..fbf2469 --- /dev/null +++ b/03-Average1/A1-vscode/os/mac_x86_64/README.txt @@ -0,0 +1,3 @@ +The "os/mac_x86_64" directory is intended to hold macOS (OS X) native binaries +which this module is dependent upon. This directory may be eliminated for a specific +module if native binaries are not provided for the corresponding platform. diff --git a/03-Average1/A1-vscode/os/win_x86_64/README.txt b/03-Average1/A1-vscode/os/win_x86_64/README.txt new file mode 100755 index 0000000..e035995 --- /dev/null +++ b/03-Average1/A1-vscode/os/win_x86_64/README.txt @@ -0,0 +1,3 @@ +The "os/win_x86_64" directory is intended to hold MS Windows native binaries (.exe) +which this module is dependent upon. This directory may be eliminated for a specific +module if native binaries are not provided for the corresponding platform. diff --git a/03-Average1/A1-vscode/src/main/help/help/TOC_Source.xml b/03-Average1/A1-vscode/src/main/help/help/TOC_Source.xml new file mode 100755 index 0000000..a34f62e --- /dev/null +++ b/03-Average1/A1-vscode/src/main/help/help/TOC_Source.xml @@ -0,0 +1,57 @@ + + + + + + + diff --git a/03-Average1/A1-vscode/src/main/help/help/topics/skeleton/help.html b/03-Average1/A1-vscode/src/main/help/help/topics/skeleton/help.html new file mode 100755 index 0000000..1f9d6a1 --- /dev/null +++ b/03-Average1/A1-vscode/src/main/help/help/topics/skeleton/help.html @@ -0,0 +1,23 @@ + + + + + + + + + + + Skeleton Help File for a Module + + + + +

Skeleton Help File for a Module

+ +

This is a simple skeleton help topic. For a better description of what should and should not + go in here, see the "sample" Ghidra extension in the Extensions/Ghidra directory, or see your + favorite help topic. In general, language modules do not have their own help topics.

+ + diff --git a/03-Average1/A1-vscode/src/main/java/a1-vscode/A1-vscodeAnalyzer.java b/03-Average1/A1-vscode/src/main/java/a1-vscode/A1-vscodeAnalyzer.java new file mode 100755 index 0000000..3fa6082 --- /dev/null +++ b/03-Average1/A1-vscode/src/main/java/a1-vscode/A1-vscodeAnalyzer.java @@ -0,0 +1,74 @@ +/* ### + * IP: GHIDRA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package a1-vscode; + +import ghidra.app.services.AbstractAnalyzer; +import ghidra.app.services.AnalyzerType; +import ghidra.app.util.importer.MessageLog; +import ghidra.framework.options.Options; +import ghidra.program.model.address.AddressSetView; +import ghidra.program.model.listing.Program; +import ghidra.util.exception.CancelledException; +import ghidra.util.task.TaskMonitor; + +/** + * Provide class-level documentation that describes what this analyzer does. + */ +public class A1-vscodeAnalyzer extends AbstractAnalyzer { + + public A1-vscodeAnalyzer() { + + // Name the analyzer and give it a description. + + super("My Analyzer", "Analyzer description goes here", AnalyzerType.BYTE_ANALYZER); + } + + @Override + public boolean getDefaultEnablement(Program program) { + + // Return true if analyzer should be enabled by default + + return true; + } + + @Override + public boolean canAnalyze(Program program) { + + // Examine 'program' to determine of this analyzer should analyze it. Return true + // if it can. + + return true; + } + + @Override + public void registerOptions(Options options, Program program) { + + // If this analyzer has custom options, register them here + + options.registerOption("Option name goes here", false, null, + "Option description goes here"); + } + + @Override + public boolean added(Program program, AddressSetView set, TaskMonitor monitor, MessageLog log) + throws CancelledException { + + // Perform analysis when things get added to the 'program'. Return true if the + // analysis succeeded. + + return false; + } +} diff --git a/03-Average1/A1-vscode/src/main/java/a1-vscode/A1-vscodeExporter.java b/03-Average1/A1-vscode/src/main/java/a1-vscode/A1-vscodeExporter.java new file mode 100755 index 0000000..594c81a --- /dev/null +++ b/03-Average1/A1-vscode/src/main/java/a1-vscode/A1-vscodeExporter.java @@ -0,0 +1,77 @@ +/* ### + * IP: GHIDRA + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +package a1-vscode; + +import java.io.File; +import java.io.IOException; +import java.util.ArrayList; +import java.util.List; + +import ghidra.app.util.*; +import ghidra.app.util.exporter.Exporter; +import ghidra.app.util.exporter.ExporterException; +import ghidra.framework.model.DomainObject; +import ghidra.program.model.address.AddressSetView; +import ghidra.util.task.TaskMonitor; + +/** + * Provide class-level documentation that describes what this exporter does. + */ +public class A1-vscodeExporter extends Exporter { + + /** + * Exporter constructor. + */ + public A1-vscodeExporter() { + + // Name the exporter and associate a file extension with it + + super("My Exporter", "exp", null); + } + + @Override + public boolean supportsAddressRestrictedExport() { + + // Return true if addrSet export parameter can be used to restrict export + + return false; + } + + @Override + public boolean export(File file, DomainObject domainObj, AddressSetView addrSet, + TaskMonitor monitor) throws ExporterException, IOException { + + // Perform the export, and return true if it succeeded + + return false; + } + + @Override + public List