// File: STM32F74x_75x.dbgconf // Version: 1.0.0 // Note: refer to STM32F75xxx STM32F74xxx reference manual (RM0385) // refer to STM32F75xxx STM32F74xxx datasheets // <<< Use Configuration Wizard in Context Menu >>> // Debug MCU configuration register (DBGMCU_CR) // DBG_STANDBY Debug standby mode // DBG_STOP Debug stop mode // DBG_SLEEP Debug sleep mode // DbgMCU_CR = 0x00000007; // Debug MCU APB1 freeze register (DBGMCU_APB1_FZ) // Reserved bits must be kept at reset value // DBG_CAN2_STOP Debug CAN2 stopped when core is halted // DBG_CAN1_STOP Debug CAN1 stopped when core is halted // DBG_I2C4_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted // DBG_IWDG_STOP Debug independent watchdog stopped when core is halted // DBG_WWDG_STOP Debug window watchdog stopped when core is halted // DBG_RTC_STOP RTC stopped when core is halted // DBG_LPTIM1_STOP LPTMI1 counter stopped when core is halted // DBG_TIM14_STOP TIM14 counter stopped when core is halted // DBG_TIM13_STOP TIM13 counter stopped when core is halted // DBG_TIM12_STOP TIM12 counter stopped when core is halted // DBG_TIM7_STOP TIM7 counter stopped when core is halted // DBG_TIM6_STOP TIM6 counter stopped when core is halted // DBG_TIM5_STOP TIM5 counter stopped when core is halted // DBG_TIM4_STOP TIM4 counter stopped when core is halted // DBG_TIM3_STOP TIM3 counter stopped when core is halted // DBG_TIM2_STOP TIM2 counter stopped when core is halted // DbgMCU_APB1_Fz = 0x00000000; // Debug MCU APB2 freeze register (DBGMCU_APB2_FZ) // Reserved bits must be kept at reset value // DBG_TIM11_STOP TIM11 counter stopped when core is halted // DBG_TIM10_STOP TIM10 counter stopped when core is halted // DBG_TIM9_STOP TIM9 counter stopped when core is halted // DBG_TIM8_STOP TIM8 counter stopped when core is halted // DBG_TIM1_STOP TIM1 counter stopped when core is halted // DbgMCU_APB2_Fz = 0x00000000; // TPIU Pin Routing (TRACECLK fixed on Pin PE2) // TRACECLK: Pin PE2 // TRACED0 // ETM Trace Data 0 // <0x00040003=> Pin PE3 // <0x00020001=> Pin PC1 // <0x0006000D=> Pin PG13 // TRACED1 // ETM Trace Data 1 // <0x00040004=> Pin PE4 // <0x00020008=> Pin PC8 // <0x0006000E=> Pin PG14 // TRACED2 // ETM Trace Data 2 // <0x00040005=> Pin PE5 // <0x00030002=> Pin PD2 // TRACED3 // ETM Trace Data 3 // <0x00040006=> Pin PE6 // <0x0002000C=> Pin PC12 // TraceClk_Pin = 0x00040002; TraceD0_Pin = 0x00040003; TraceD1_Pin = 0x00040004; TraceD2_Pin = 0x00040005; TraceD3_Pin = 0x00040006; // <<< end of configuration section >>>