commit 157655cbfeccbcd6a6221b0d7e1e0f69fa3ffda5 Author: RĂ©mi Heredero Date: Fri Feb 24 14:34:16 2023 +0100 Initial commit diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..de7f2fd --- /dev/null +++ b/.gitignore @@ -0,0 +1,3 @@ +/build/ +/debug/ +/dist/ \ No newline at end of file diff --git a/solar_panel.X/Makefile b/solar_panel.X/Makefile new file mode 100644 index 0000000..fca8e2c --- /dev/null +++ b/solar_panel.X/Makefile @@ -0,0 +1,113 @@ +# +# There exist several targets which are by default empty and which can be +# used for execution of your targets. These targets are usually executed +# before and after some main targets. They are: +# +# .build-pre: called before 'build' target +# .build-post: called after 'build' target +# .clean-pre: called before 'clean' target +# .clean-post: called after 'clean' target +# .clobber-pre: called before 'clobber' target +# .clobber-post: called after 'clobber' target +# .all-pre: called before 'all' target +# .all-post: called after 'all' target +# .help-pre: called before 'help' target +# .help-post: called after 'help' target +# +# Targets beginning with '.' are not intended to be called on their own. +# +# Main targets can be executed directly, and they are: +# +# build build a specific configuration +# clean remove built files from a configuration +# clobber remove all built files +# all build all configurations +# help print help mesage +# +# Targets .build-impl, .clean-impl, .clobber-impl, .all-impl, and +# .help-impl are implemented in nbproject/makefile-impl.mk. +# +# Available make variables: +# +# CND_BASEDIR base directory for relative paths +# CND_DISTDIR default top distribution directory (build artifacts) +# CND_BUILDDIR default top build directory (object files, ...) +# CONF name of current configuration +# CND_ARTIFACT_DIR_${CONF} directory of build artifact (current configuration) +# CND_ARTIFACT_NAME_${CONF} name of build artifact (current configuration) +# CND_ARTIFACT_PATH_${CONF} path to build artifact (current configuration) +# CND_PACKAGE_DIR_${CONF} directory of package (current configuration) +# CND_PACKAGE_NAME_${CONF} name of package (current configuration) +# CND_PACKAGE_PATH_${CONF} path to package (current configuration) +# +# NOCDDL + + +# Environment +MKDIR=mkdir +CP=cp +CCADMIN=CCadmin +RANLIB=ranlib + + +# build +build: .build-post + +.build-pre: +# Add your pre 'build' code here... + +.build-post: .build-impl +# Add your post 'build' code here... + + +# clean +clean: .clean-post + +.clean-pre: +# Add your pre 'clean' code here... +# WARNING: the IDE does not call this target since it takes a long time to +# simply run make. Instead, the IDE removes the configuration directories +# under build and dist directly without calling make. +# This target is left here so people can do a clean when running a clean +# outside the IDE. + +.clean-post: .clean-impl +# Add your post 'clean' code here... + + +# clobber +clobber: .clobber-post + +.clobber-pre: +# Add your pre 'clobber' code here... + +.clobber-post: .clobber-impl +# Add your post 'clobber' code here... + + +# all +all: .all-post + +.all-pre: +# Add your pre 'all' code here... + +.all-post: .all-impl +# Add your post 'all' code here... + + +# help +help: .help-post + +.help-pre: +# Add your pre 'help' code here... + +.help-post: .help-impl +# Add your post 'help' code here... + + + +# include project implementation makefile +include nbproject/Makefile-impl.mk + +# include project make variables +include nbproject/Makefile-variables.mk diff --git a/solar_panel.X/build/default/debug/lcd/arialRoundedMTBold18ptBitmaps.d b/solar_panel.X/build/default/debug/lcd/arialRoundedMTBold18ptBitmaps.d new file mode 100644 index 0000000..0109a18 --- /dev/null +++ b/solar_panel.X/build/default/debug/lcd/arialRoundedMTBold18ptBitmaps.d @@ -0,0 +1,2 @@ +build/default/debug/lcd\arialRoundedMTBold18ptBitmaps.p1: \ + lcd/arialRoundedMTBold18ptBitmaps.c lcd/lcd.h diff --git a/solar_panel.X/build/default/debug/lcd/arialRoundedMTBold18ptBitmaps.i b/solar_panel.X/build/default/debug/lcd/arialRoundedMTBold18ptBitmaps.i new file mode 100644 index 0000000..434ffad --- /dev/null +++ b/solar_panel.X/build/default/debug/lcd/arialRoundedMTBold18ptBitmaps.i @@ -0,0 +1,11532 @@ +# 1 "lcd/arialRoundedMTBold18ptBitmaps.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "lcd/arialRoundedMTBold18ptBitmaps.c" 2 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; + + + + +typedef __int24 int24_t; + + + + +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; + + + + +typedef __uint24 uint24_t; + + + + +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 4 "lcd/arialRoundedMTBold18ptBitmaps.c" 2 + +# 1 "lcd/lcd.h" 1 +# 34 "lcd/lcd.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + + + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 34 "lcd/lcd.h" 2 +# 50 "lcd/lcd.h" +int8_t Lcd_Init(void); +void LCD_2x16_WriteCmd(uint8_t command); +void LCD_2x16_WriteData(uint8_t command); +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +# 5 "lcd/arialRoundedMTBold18ptBitmaps.c" 2 + + + + +const uint8_t arialRoundedMTBold18ptBitmaps[] = +{ + + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + + + 0x00, + 0x00, + 0x00, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xC0, + 0x40, + 0x00, + 0x00, + 0xE0, + 0xE0, + 0xE0, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + + + 0x00, + 0x00, + 0x00, + 0xE7, + 0xE7, + 0xE7, + 0xE7, + 0xE7, + 0xE7, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + + + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x0E, 0x30, + 0x0E, 0x70, + 0x0C, 0x70, + 0x1C, 0x60, + 0xFF, 0xF8, + 0xFF, 0xF8, + 0x18, 0xE0, + 0x18, 0xE0, + 0x38, 0xC0, + 0x38, 0xC0, + 0xFF, 0xF8, + 0xFF, 0xF8, + 0x31, 0x80, + 0x71, 0x80, + 0x73, 0x80, + 0x73, 0x80, + 0x61, 0x80, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + + + 0x06, 0x00, + 0x06, 0x00, + 0x0F, 0x00, + 0x3F, 0xC0, + 0x7F, 0xE0, + 0xF6, 0xE0, + 0xE6, 0xE0, + 0xE6, 0x60, + 0xF6, 0x00, + 0xFE, 0x00, + 0x7F, 0x80, + 0x1F, 0xC0, + 0x07, 0xE0, + 0x06, 0xF0, + 0xC6, 0x70, + 0xE6, 0x70, + 0xE6, 0x70, + 0xF6, 0xF0, + 0x7F, 0xE0, + 0x3F, 0xC0, + 0x0F, 0x00, + 0x06, 0x00, + 0x06, 0x00, + 0x06, 0x00, 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0x3B, 0x80, + 0x7B, 0xC0, + 0xF1, 0xE0, + 0xE0, 0xE0, + 0xC0, 0xE0, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + + + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0xE0, 0x60, + 0xE0, 0xE0, + 0xE0, 0xE0, + 0x71, 0xC0, + 0x71, 0xC0, + 0x71, 0xC0, + 0x3B, 0x80, + 0x3B, 0x80, + 0x1B, 0x00, + 0x1F, 0x00, + 0x1F, 0x00, + 0x0E, 0x00, + 0x0E, 0x00, + 0x0E, 0x00, + 0x1C, 0x00, + 0xFC, 0x00, + 0xF8, 0x00, + + + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x7F, 0xE0, + 0xFF, 0xE0, + 0x01, 0xE0, + 0x03, 0xC0, + 0x07, 0x80, + 0x0F, 0x00, + 0x1E, 0x00, + 0x1C, 0x00, + 0x38, 0x00, + 0x78, 0x00, + 0xFF, 0xF0, + 0xFF, 0xF0, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + + + 0x00, + 0x00, + 0x00, + 0x07, + 0x0F, + 0x1F, + 0x1C, + 0x1C, + 0x1C, + 0x1C, + 0x1C, + 0x1C, + 0x78, + 0xF8, + 0xF8, + 0x78, + 0x1C, + 0x1C, + 0x1C, + 0x1C, + 0x1C, + 0x1C, + 0x1F, + 0x0F, + 0x07, + + + 0x00, + 0x00, + 0x00, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + 0xE0, + + + 0x00, + 0x00, + 0x00, + 0xE0, + 0xF0, + 0xF8, + 0x38, + 0x38, + 0x38, + 0x38, + 0x38, + 0x38, + 0x1E, + 0x1F, + 0x1F, + 0x1E, + 0x38, + 0x38, + 0x38, + 0x38, + 0x38, + 0x38, + 0xF8, + 0xF0, + 0xE0, + + + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x7C, 0x10, + 0xFF, 0xF0, + 0xFF, 0xF0, + 0x83, 0xE0, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, + 0x00, 0x00, +}; + + + +const FONT_CHAR_INFO arialRoundedMTBold18ptDescriptors[] = +{ + {8, 0}, + {3, 25}, + {8, 50}, + {13, 75}, + {12, 125}, + {19, 175}, + {15, 250}, + {3, 300}, + {6, 325}, + {6, 350}, + {10, 375}, + {12, 425}, + {4, 475}, + {7, 500}, + {3, 525}, + {6, 550}, + {12, 575}, + {8, 625}, + {12, 650}, + {12, 700}, + {14, 750}, + {12, 800}, + {12, 850}, + {12, 900}, + {12, 950}, + {12, 1000}, + {3, 1050}, + {3, 1075}, + {12, 1100}, + {12, 1150}, + {12, 1200}, + {11, 1250}, + {23, 1300}, + {16, 1375}, + {14, 1425}, + {15, 1475}, + {14, 1525}, + {13, 1575}, + {12, 1625}, + {16, 1675}, + {14, 1725}, + {3, 1775}, + {11, 1800}, + {14, 1850}, + {12, 1900}, + {16, 1950}, + {14, 2000}, + {17, 2050}, + {13, 2125}, + {18, 2175}, + {14, 2250}, + {13, 2300}, + {15, 2350}, + {14, 2400}, + {15, 2450}, + {21, 2500}, + {13, 2575}, + {13, 2625}, + {15, 2675}, + {6, 2725}, + {6, 2750}, + {6, 2775}, + {12, 2800}, + {12, 2850}, + {5, 2900}, + {13, 2925}, + {12, 2975}, + {12, 3025}, + {12, 3075}, + {12, 3125}, + {9, 3175}, + {12, 3225}, + {11, 3275}, + {3, 3325}, + {6, 3350}, + {11, 3375}, + {3, 3425}, + {18, 3450}, + {11, 3525}, + {13, 3575}, + {12, 3625}, + {12, 3675}, + {9, 3725}, + {11, 3775}, + {9, 3825}, + {11, 3875}, + {11, 3925}, + {18, 3975}, + {11, 4050}, + {11, 4100}, + {12, 4150}, + {8, 4200}, + {3, 4225}, + {8, 4250}, + {12, 4275}, +}; + + +const FONT_INFO arialRoundedMTBold18ptFontInfo = +{ + 25, + ' ', + '~', + arialRoundedMTBold18ptDescriptors, + arialRoundedMTBold18ptBitmaps, +}; diff --git a/solar_panel.X/build/default/debug/lcd/lcd.i b/solar_panel.X/build/default/debug/lcd/lcd.i new file mode 100644 index 0000000..407c668 --- /dev/null +++ b/solar_panel.X/build/default/debug/lcd/lcd.i @@ -0,0 +1,8969 @@ +# 1 "lcd/lcd.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "lcd/lcd.c" 2 +# 10 "lcd/lcd.c" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 10 "lcd/lcd.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 1 3 +# 25 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 411 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct __locale_struct * locale_t; +# 25 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 2 3 + + +void *memcpy (void *restrict, const void *restrict, size_t); +void *memmove (void *, const void *, size_t); +void *memset (void *, int, size_t); +int memcmp (const void *, const void *, size_t); +void *memchr (const void *, int, size_t); + +char *strcpy (char *restrict, const char *restrict); +char *strncpy (char *restrict, const char *restrict, size_t); + +char *strcat (char *restrict, const char *restrict); +char *strncat (char *restrict, const char *restrict, size_t); + +int strcmp (const char *, const char *); +int strncmp (const char *, const char *, size_t); + +int strcoll (const char *, const char *); +size_t strxfrm (char *restrict, const char *restrict, size_t); + +char *strchr (const char *, int); +char *strrchr (const char *, int); + +size_t strcspn (const char *, const char *); +size_t strspn (const char *, const char *); +char *strpbrk (const char *, const char *); +char *strstr (const char *, const char *); +char *strtok (char *restrict, const char *restrict); + +size_t strlen (const char *); + +char *strerror (int); +# 65 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 3 +char *strtok_r (char *restrict, const char *restrict, char **restrict); +int strerror_r (int, char *, size_t); +char *stpcpy(char *restrict, const char *restrict); +char *stpncpy(char *restrict, const char *restrict, size_t); +size_t strnlen (const char *, size_t); +char *strdup (const char *); +char *strndup (const char *, size_t); +char *strsignal(int); +char *strerror_l (int, locale_t); +int strcoll_l (const char *, const char *, locale_t); +size_t strxfrm_l (char *restrict, const char *restrict, size_t, locale_t); + + + + +void *memccpy (void *restrict, const void *restrict, int, size_t); +# 11 "lcd/lcd.c" 2 + +# 1 "lcd/lcd.h" 1 +# 50 "lcd/lcd.h" +int8_t Lcd_Init(void); +void LCD_2x16_WriteCmd(uint8_t command); +void LCD_2x16_WriteData(uint8_t command); +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +# 12 "lcd/lcd.c" 2 + +# 1 "lcd/ssd1963_cmd.h" 1 +# 13 "lcd/lcd.c" 2 + + + + +int8_t Lcd_Init(void) +{ + + + TRISDbits.TRISD3 = 0; + LATDbits.LATD3 = 0; + TRISDbits.TRISD2 = 0; + LATDbits.LATD2 = 0; + TRISJ = TRISJ & 0x0F; + + _delay((unsigned long)((200)*(25000000L/4000.0))); + LCD_2x16_WriteCmd(0x02); + + LCD_2x16_WriteCmd(0x28); + + + LCD_2x16_WriteCmd(0x01); + LCD_2x16_WriteCmd(0x0C); + + + LCD_2x16_WriteCmd(0x06); + + return 0; +} + + +void LCD_2x16_WriteCmd(uint8_t command) +{ + LATDbits.LATD3 = 0; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((10)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + command = command << 4; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((10)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((3)*(25000000L/4000.0))); +} +void LCD_2x16_WriteData(uint8_t command) +{ + LATDbits.LATD3 = 1; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + command = command << 4; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((100)*(25000000L/4000000.0))); +} + +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line) +{ + LCD_2x16_WriteCmd(0x80 | (line << 6)); + do + { + LCD_2x16_WriteData(*msg); + msg++; + }while(*msg != 0); +} diff --git a/solar_panel.X/build/default/debug/lcd/lcd.p1 b/solar_panel.X/build/default/debug/lcd/lcd.p1 new file mode 100644 index 0000000..24dda01 --- /dev/null +++ b/solar_panel.X/build/default/debug/lcd/lcd.p1 @@ -0,0 +1,1107 @@ +Version 4.0 HI-TECH Software Intermediate Code +"7620 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7620: struct { +[s S272 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S272 . TRISD0 TRISD1 TRISD2 TRISD3 TRISD4 TRISD5 TRISD6 TRISD7 ] +"7630 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7630: struct { +[s S273 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S273 . RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 ] +"7619 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7619: typedef union { +[u S271 `S272 1 `S273 1 ] +[n S271 . . . ] +"7641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7641: extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +[v _TRISDbits `VS271 ~T0 @X0 0 e@3989 ] +"6343 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6343: struct { +[s S236 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S236 . LATD0 LATD1 LATD2 LATD3 LATD4 LATD5 LATD6 LATD7 ] +"6353 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6353: struct { +[s S237 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S237 . LD0 LD1 LD2 LD3 LD4 LD5 LD6 LD7 ] +"6342 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6342: typedef union { +[u S235 `S236 1 `S237 1 ] +[n S235 . . . ] +"6364 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6364: extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +[v _LATDbits `VS235 ~T0 @X0 0 e@3980 ] +"8719 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8719: extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); +[v _TRISJ `Vuc ~T0 @X0 0 e@3994 ] +[v F192 `(v ~T0 @X0 1 tf1`ul ] +"12 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\builtins.h +[v __delay `JF192 ~T0 @X0 0 e ] +[p i __delay ] +"51 lcd/lcd.h +[; ;lcd/lcd.h: 51: void LCD_2x16_WriteCmd(uint8_t command); +[v _LCD_2x16_WriteCmd `(v ~T0 @X0 0 ef1`uc ] +"6879 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6879: extern volatile unsigned char LATJ __attribute__((address(0xF91))); +[v _LATJ `Vuc ~T0 @X0 0 e@3985 ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"17 lcd/lcd.c +[; ;lcd/lcd.c: 17: int8_t Lcd_Init(void) +[v _Lcd_Init `(c ~T0 @X0 1 ef ] +"18 +[; ;lcd/lcd.c: 18: { +{ +[e :U _Lcd_Init ] +[f ] +"21 +[; ;lcd/lcd.c: 21: TRISDbits.TRISD3 = 0; +[e = . . _TRISDbits 0 3 -> -> 0 `i `uc ] +"22 +[; ;lcd/lcd.c: 22: LATDbits.LATD3 = 0; +[e = . . _LATDbits 0 3 -> -> 0 `i `uc ] +"23 +[; ;lcd/lcd.c: 23: TRISDbits.TRISD2 = 0; +[e = . . _TRISDbits 0 2 -> -> 0 `i `uc ] +"24 +[; ;lcd/lcd.c: 24: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"25 +[; ;lcd/lcd.c: 25: TRISJ = TRISJ & 0x0F; +[e = _TRISJ -> & -> _TRISJ `i -> 15 `i `uc ] +"27 +[; ;lcd/lcd.c: 27: _delay((unsigned long)((200)*(25000000L/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 25000000 `l `d .4000.0 `ul ] +"28 +[; ;lcd/lcd.c: 28: LCD_2x16_WriteCmd(0x02); +[e ( _LCD_2x16_WriteCmd (1 -> -> 2 `i `uc ] +"30 +[; ;lcd/lcd.c: 30: LCD_2x16_WriteCmd(0x28); +[e ( _LCD_2x16_WriteCmd (1 -> -> 40 `i `uc ] +"33 +[; ;lcd/lcd.c: 33: LCD_2x16_WriteCmd(0x01); +[e ( _LCD_2x16_WriteCmd (1 -> -> 1 `i `uc ] +"34 +[; ;lcd/lcd.c: 34: LCD_2x16_WriteCmd(0x0C); +[e ( _LCD_2x16_WriteCmd (1 -> -> 12 `i `uc ] +"37 +[; ;lcd/lcd.c: 37: LCD_2x16_WriteCmd(0x06); +[e ( _LCD_2x16_WriteCmd (1 -> -> 6 `i `uc ] +"39 +[; ;lcd/lcd.c: 39: return 0; +[e ) -> -> 0 `i `c ] +[e $UE 539 ] +"40 +[; ;lcd/lcd.c: 40: } +[e :UE 539 ] +} +"43 +[; ;lcd/lcd.c: 43: void LCD_2x16_WriteCmd(uint8_t command) +[v _LCD_2x16_WriteCmd `(v ~T0 @X0 1 ef1`uc ] +"44 +[; ;lcd/lcd.c: 44: { +{ +[e :U _LCD_2x16_WriteCmd ] +"43 +[; ;lcd/lcd.c: 43: void LCD_2x16_WriteCmd(uint8_t command) +[v _command `uc ~T0 @X0 1 r1 ] +"44 +[; ;lcd/lcd.c: 44: { +[f ] +"45 +[; ;lcd/lcd.c: 45: LATDbits.LATD3 = 0; +[e = . . _LATDbits 0 3 -> -> 0 `i `uc ] +"46 +[; ;lcd/lcd.c: 46: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"47 +[; ;lcd/lcd.c: 47: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"48 +[; ;lcd/lcd.c: 48: _delay((unsigned long)((10)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"49 +[; ;lcd/lcd.c: 49: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"50 +[; ;lcd/lcd.c: 50: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"51 +[; ;lcd/lcd.c: 51: command = command << 4; +[e = _command -> << -> _command `i -> 4 `i `uc ] +"52 +[; ;lcd/lcd.c: 52: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"53 +[; ;lcd/lcd.c: 53: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"54 +[; ;lcd/lcd.c: 54: _delay((unsigned long)((10)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"55 +[; ;lcd/lcd.c: 55: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"56 +[; ;lcd/lcd.c: 56: _delay((unsigned long)((3)*(25000000L/4000.0))); +[e ( __delay (1 -> * -> -> 3 `i `d / -> -> 25000000 `l `d .4000.0 `ul ] +"57 +[; ;lcd/lcd.c: 57: } +[e :UE 540 ] +} +"58 +[; ;lcd/lcd.c: 58: void LCD_2x16_WriteData(uint8_t command) +[v _LCD_2x16_WriteData `(v ~T0 @X0 1 ef1`uc ] +"59 +[; ;lcd/lcd.c: 59: { +{ +[e :U _LCD_2x16_WriteData ] +"58 +[; ;lcd/lcd.c: 58: void LCD_2x16_WriteData(uint8_t command) +[v _command `uc ~T0 @X0 1 r1 ] +"59 +[; ;lcd/lcd.c: 59: { +[f ] +"60 +[; ;lcd/lcd.c: 60: LATDbits.LATD3 = 1; +[e = . . _LATDbits 0 3 -> -> 1 `i `uc ] +"61 +[; ;lcd/lcd.c: 61: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"62 +[; ;lcd/lcd.c: 62: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"63 +[; ;lcd/lcd.c: 63: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"64 +[; ;lcd/lcd.c: 64: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"65 +[; ;lcd/lcd.c: 65: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"66 +[; ;lcd/lcd.c: 66: command = command << 4; +[e = _command -> << -> _command `i -> 4 `i `uc ] +"67 +[; ;lcd/lcd.c: 67: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"68 +[; ;lcd/lcd.c: 68: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"69 +[; ;lcd/lcd.c: 69: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"70 +[; ;lcd/lcd.c: 70: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"71 +[; ;lcd/lcd.c: 71: _delay((unsigned long)((100)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 100 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"72 +[; ;lcd/lcd.c: 72: } +[e :UE 541 ] +} +"74 +[; ;lcd/lcd.c: 74: void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line) +[v _LCD_2x16_WriteMsg `(v ~T0 @X0 1 ef2`*uc`uc ] +"75 +[; ;lcd/lcd.c: 75: { +{ +[e :U _LCD_2x16_WriteMsg ] +"74 +[; ;lcd/lcd.c: 74: void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line) +[v _msg `*uc ~T0 @X0 1 r1 ] +[v _line `uc ~T0 @X0 1 r2 ] +"75 +[; ;lcd/lcd.c: 75: { +[f ] +"76 +[; ;lcd/lcd.c: 76: LCD_2x16_WriteCmd(0x80 | (line << 6)); +[e ( _LCD_2x16_WriteCmd (1 -> | -> 128 `i << -> _line `i -> 6 `i `uc ] +"77 +[; ;lcd/lcd.c: 77: do +[e :U 545 ] +"78 +[; ;lcd/lcd.c: 78: { +{ +"79 +[; ;lcd/lcd.c: 79: LCD_2x16_WriteData(*msg); +[e ( _LCD_2x16_WriteData (1 *U _msg ] +"80 +[; ;lcd/lcd.c: 80: msg++; +[e ++ _msg * -> -> 1 `i `x -> -> # *U _msg `i `x ] +"81 +[; ;lcd/lcd.c: 81: }while(*msg != 0); +} +[e $ != -> *U _msg `i -> 0 `i 545 ] +[e :U 544 ] +"82 +[; ;lcd/lcd.c: 82: } +[e :UE 542 ] +} diff --git a/solar_panel.X/build/default/debug/lcd/lcd.p1.d b/solar_panel.X/build/default/debug/lcd/lcd.p1.d new file mode 100644 index 0000000..b3513ff --- /dev/null +++ b/solar_panel.X/build/default/debug/lcd/lcd.p1.d @@ -0,0 +1,4 @@ +build/default/debug/lcd/lcd.p1: \ +lcd/lcd.c \ +lcd/lcd.h \ +lcd/ssd1963_cmd.h diff --git a/solar_panel.X/build/default/debug/main.i b/solar_panel.X/build/default/debug/main.i new file mode 100644 index 0000000..f4aa71a --- /dev/null +++ b/solar_panel.X/build/default/debug/main.i @@ -0,0 +1,9072 @@ +# 1 "main.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "main.c" 2 +# 44 "main.c" +# 1 "./mcc_generated_files/mcc.h" 1 +# 49 "./mcc_generated_files/mcc.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 49 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/device_config.h" 1 +# 50 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/pin_manager.h" 1 +# 109 "./mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 121 "./mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 51 "./mcc_generated_files/mcc.h" 2 + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdbool.h" 1 3 +# 53 "./mcc_generated_files/mcc.h" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 1 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 1 3 +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 + + + + + +typedef void * va_list[1]; + + + + +typedef void * __isoc_va_list[1]; +# 137 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long ssize_t; +# 246 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long off_t; +# 399 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct _IO_FILE FILE; +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 2 3 +# 52 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +typedef union _G_fpos64_t { + char __opaque[16]; + double __align; +} fpos_t; + +extern FILE *const stdin; +extern FILE *const stdout; +extern FILE *const stderr; + + + + + +FILE *fopen(const char *restrict, const char *restrict); +FILE *freopen(const char *restrict, const char *restrict, FILE *restrict); +int fclose(FILE *); + +int remove(const char *); +int rename(const char *, const char *); + +int feof(FILE *); +int ferror(FILE *); +int fflush(FILE *); +void clearerr(FILE *); + +int fseek(FILE *, long, int); +long ftell(FILE *); +void rewind(FILE *); + +int fgetpos(FILE *restrict, fpos_t *restrict); +int fsetpos(FILE *, const fpos_t *); + +size_t fread(void *restrict, size_t, size_t, FILE *restrict); +size_t fwrite(const void *restrict, size_t, size_t, FILE *restrict); + +int fgetc(FILE *); +int getc(FILE *); +int getchar(void); +int ungetc(int, FILE *); + +int fputc(int, FILE *); +int putc(int, FILE *); +int putchar(int); + +char *fgets(char *restrict, int, FILE *restrict); + +char *gets(char *); + + +int fputs(const char *restrict, FILE *restrict); +int puts(const char *); + +__attribute__((__format__(__printf__, 1, 2))) +int printf(const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int fprintf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int sprintf(char *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 3, 4))) +int snprintf(char *restrict, size_t, const char *restrict, ...); + +__attribute__((__format__(__printf__, 1, 0))) +int vprintf(const char *restrict, __isoc_va_list); +int vfprintf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 2, 0))) +int vsprintf(char *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 3, 0))) +int vsnprintf(char *restrict, size_t, const char *restrict, __isoc_va_list); + +__attribute__((__format__(__scanf__, 1, 2))) +int scanf(const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int fscanf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int sscanf(const char *restrict, const char *restrict, ...); + +__attribute__((__format__(__scanf__, 1, 0))) +int vscanf(const char *restrict, __isoc_va_list); +int vfscanf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__scanf__, 2, 0))) +int vsscanf(const char *restrict, const char *restrict, __isoc_va_list); + +void perror(const char *); + +int setvbuf(FILE *restrict, char *restrict, int, size_t); +void setbuf(FILE *restrict, char *restrict); + +char *tmpnam(char *); +FILE *tmpfile(void); + + + + +FILE *fmemopen(void *restrict, size_t, const char *restrict); +FILE *open_memstream(char **, size_t *); +FILE *fdopen(int, const char *); +FILE *popen(const char *, const char *); +int pclose(FILE *); +int fileno(FILE *); +int fseeko(FILE *, off_t, int); +off_t ftello(FILE *); +int dprintf(int, const char *restrict, ...); +int vdprintf(int, const char *restrict, __isoc_va_list); +void flockfile(FILE *); +int ftrylockfile(FILE *); +void funlockfile(FILE *); +int getc_unlocked(FILE *); +int getchar_unlocked(void); +int putc_unlocked(int, FILE *); +int putchar_unlocked(int); +ssize_t getdelim(char **restrict, size_t *restrict, int, FILE *restrict); +ssize_t getline(char **restrict, size_t *restrict, FILE *restrict); +int renameat(int, const char *, int, const char *); +char *ctermid(char *); + + + + + + + +char *tempnam(const char *, const char *); +# 7 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 2 3 +# 54 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/adc.h" 1 +# 72 "./mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "./mcc_generated_files/adc.h" +typedef enum +{ + voltage = 0x5, + current = 0x6 +} adc_channel_t; +# 134 "./mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 164 "./mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 191 "./mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 223 "./mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 256 "./mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 286 "./mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 314 "./mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 55 "./mcc_generated_files/mcc.h" 2 +# 70 "./mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 83 "./mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 44 "main.c" 2 + +# 1 "./lcd/lcd.h" 1 +# 50 "./lcd/lcd.h" +int8_t Lcd_Init(void); +void LCD_2x16_WriteCmd(uint8_t command); +void LCD_2x16_WriteData(uint8_t command); +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +# 45 "main.c" 2 + + + + + +void main(void) +{ + + SYSTEM_Initialize(); + + Lcd_Init(); +# 73 "main.c" + while (1) + { + uint16_t value; + + value = ADC_GetConversion(voltage); + char* msg; + sprintf(msg, "%i", value); + + LCD_2x16_WriteMsg(msg,0); +# 98 "main.c" + } +} diff --git a/solar_panel.X/build/default/debug/main.p1 b/solar_panel.X/build/default/debug/main.p1 new file mode 100644 index 0000000..2168d0d --- /dev/null +++ b/solar_panel.X/build/default/debug/main.p1 @@ -0,0 +1,939 @@ +Version 4.0 HI-TECH Software Intermediate Code +[p mainexit ] +"70 ./mcc_generated_files/mcc.h +[; ;./mcc_generated_files/mcc.h: 70: void SYSTEM_Initialize(void); +[v _SYSTEM_Initialize `(v ~T0 @X0 0 ef ] +"50 ./lcd/lcd.h +[; ;./lcd/lcd.h: 50: int8_t Lcd_Init(void); +[v _Lcd_Init `(c ~T0 @X0 0 ef ] +"77 main.c +[; ;main.c: 77: value = ADC_GetConversion(voltage); +[c E5238 5 6 .. ] +[n E5238 . voltage current ] +"286 ./mcc_generated_files/adc.h +[; ;./mcc_generated_files/adc.h: 286: adc_result_t ADC_GetConversion(adc_channel_t channel); +[v _ADC_GetConversion `(us ~T0 @X0 0 ef1`E5238 ] +"109 C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdio.h +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdio.h: 109: int sprintf(char *restrict, const char *restrict, ...); +[v _sprintf `(i ~T0 @X0 0 e1v`*uc`*Cuc ] +"53 ./lcd/lcd.h +[; ;./lcd/lcd.h: 53: void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +[v _LCD_2x16_WriteMsg `(v ~T0 @X0 0 ef2`*uc`uc ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +[v $root$_main `(v ~T0 @X0 0 e ] +"50 main.c +[; ;main.c: 50: void main(void) +[v _main `(v ~T0 @X0 1 ef ] +"51 +[; ;main.c: 51: { +{ +[e :U _main ] +[f ] +"53 +[; ;main.c: 53: SYSTEM_Initialize(); +[e ( _SYSTEM_Initialize .. ] +"55 +[; ;main.c: 55: Lcd_Init(); +[e ( _Lcd_Init .. ] +"73 +[; ;main.c: 73: while (1) +[e :U 543 ] +"74 +[; ;main.c: 74: { +{ +"75 +[; ;main.c: 75: uint16_t value; +[v _value `us ~T0 @X0 1 a ] +"77 +[; ;main.c: 77: value = ADC_GetConversion(voltage); +[e = _value ( _ADC_GetConversion (1 . `E5238 0 ] +"78 +[; ;main.c: 78: char* msg; +[v _msg `*uc ~T0 @X0 1 a ] +"79 +[; ;main.c: 79: sprintf(msg, "%i", value); +[e ( _sprintf (1 , (. , _msg :s 1C -> _value `ui ] +"81 +[; ;main.c: 81: LCD_2x16_WriteMsg(msg,0); +[e ( _LCD_2x16_WriteMsg (2 , -> _msg `*uc -> -> 0 `i `uc ] +"98 +[; ;main.c: 98: } +} +[e :U 542 ] +[e $U 543 ] +[e :U 544 ] +"99 +[; ;main.c: 99: } +[e :UE 541 ] +} +[p f _sprintf 8388736 ] +[a 1C 37 105 0 ] diff --git a/solar_panel.X/build/default/debug/main.p1.d b/solar_panel.X/build/default/debug/main.p1.d new file mode 100644 index 0000000..735d491 --- /dev/null +++ b/solar_panel.X/build/default/debug/main.p1.d @@ -0,0 +1,7 @@ +build/default/debug/main.p1: \ +main.c \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/adc.h \ +lcd/lcd.h diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/adc.i b/solar_panel.X/build/default/debug/mcc_generated_files/adc.i new file mode 100644 index 0000000..67d6574 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/adc.i @@ -0,0 +1,8951 @@ +# 1 "mcc_generated_files/adc.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/adc.c" 2 +# 51 "mcc_generated_files/adc.c" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 51 "mcc_generated_files/adc.c" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 56 "mcc_generated_files/adc.h" +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdbool.h" 1 3 +# 56 "mcc_generated_files/adc.h" 2 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + voltage = 0x5, + current = 0x6 +} adc_channel_t; +# 134 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 164 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 191 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 223 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 256 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 286 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 314 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 52 "mcc_generated_files/adc.c" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 53 "mcc_generated_files/adc.c" 2 + + +void (*ADC_InterruptHandler)(void); + + + + + +void ADC_Initialize(void) +{ + + + + ADCON1 = 0x00; + + + ADCON2 = 0x80; + + + ADRESL = 0x00; + + + ADRESH = 0x00; + + + ADCON0 = 0x01; + +} + +void ADC_SelectChannel(adc_channel_t channel) +{ + + ADCON0bits.CHS = channel; + + ADCON0bits.ADON = 1; +} + +void ADC_StartConversion(void) +{ + + ADCON0bits.GO_nDONE = 1; +} + + +_Bool ADC_IsConversionDone(void) +{ + + return ((_Bool)(!ADCON0bits.GO_nDONE)); +} + +adc_result_t ADC_GetConversionResult(void) +{ + + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +adc_result_t ADC_GetConversion(adc_channel_t channel) +{ + + ADCON0bits.CHS = channel; + + + ADCON0bits.ADON = 1; + + + ADCON0bits.GO_nDONE = 1; + + + while (ADCON0bits.GO_nDONE) + { + } + + + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +void ADC_TemperatureAcquisitionDelay(void) +{ + _delay((unsigned long)((200)*(25000000/4000000.0))); +} diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/adc.p1 b/solar_panel.X/build/default/debug/mcc_generated_files/adc.p1 new file mode 100644 index 0000000..4cfc90b --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/adc.p1 @@ -0,0 +1,1094 @@ +Version 4.0 HI-TECH Software Intermediate Code +[v F4932 `(v ~T0 @X0 0 tf ] +"11643 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11643: extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); +[v _ADCON1 `Vuc ~T0 @X0 0 e@4033 ] +"11572 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11572: extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); +[v _ADCON2 `Vuc ~T0 @X0 0 e@4032 ] +"11861 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11861: extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); +[v _ADRESL `Vuc ~T0 @X0 0 e@4035 ] +"11868 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11868: extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); +[v _ADRESH `Vuc ~T0 @X0 0 e@4036 ] +"11728 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11728: extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); +[v _ADCON0 `Vuc ~T0 @X0 0 e@4034 ] +"82 mcc_generated_files/adc.c +[; ;mcc_generated_files/adc.c: 82: void ADC_SelectChannel(adc_channel_t channel) +[c E4918 5 6 .. ] +[n E4918 . voltage current ] +"11734 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11734: struct { +[s S425 :1 `uc 1 :1 `uc 1 ] +[n S425 . . GO_NOT_DONE ] +"11738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11738: struct { +[s S426 :1 `uc 1 :1 `uc 1 :4 `uc 1 ] +[n S426 . ADON GO_nDONE CHS ] +"11743 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11743: struct { +[s S427 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S427 . . DONE CHS0 CHS1 CHS2 CHS3 . ADCAL ] +"11753 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11753: struct { +[s S428 :1 `uc 1 :1 `uc 1 ] +[n S428 . . GO_DONE ] +"11757 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11757: struct { +[s S429 :1 `uc 1 :1 `uc 1 ] +[n S429 . . GO ] +"11761 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11761: struct { +[s S430 :1 `uc 1 :1 `uc 1 ] +[n S430 . . NOT_DONE ] +"11765 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11765: struct { +[s S431 :1 `uc 1 :1 `uc 1 ] +[n S431 . . nDONE ] +"11769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11769: struct { +[s S432 :1 `uc 1 :1 `uc 1 ] +[n S432 . . GODONE ] +"11733 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11733: typedef union { +[u S424 `S425 1 `S426 1 `S427 1 `S428 1 `S429 1 `S430 1 `S431 1 `S432 1 ] +[n S424 . . . . . . . . . ] +"11774 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11774: extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +[v _ADCON0bits `VS424 ~T0 @X0 0 e@4034 ] +[v F192 `(v ~T0 @X0 1 tf1`ul ] +"12 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\builtins.h +[v __delay `JF192 ~T0 @X0 0 e ] +[p i __delay ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"55 mcc_generated_files/adc.c +[; ;mcc_generated_files/adc.c: 55: void (*ADC_InterruptHandler)(void); +[v _ADC_InterruptHandler `*F4932 ~T0 @X0 1 e ] +"61 +[; ;mcc_generated_files/adc.c: 61: void ADC_Initialize(void) +[v _ADC_Initialize `(v ~T0 @X0 1 ef ] +"62 +[; ;mcc_generated_files/adc.c: 62: { +{ +[e :U _ADC_Initialize ] +[f ] +"66 +[; ;mcc_generated_files/adc.c: 66: ADCON1 = 0x00; +[e = _ADCON1 -> -> 0 `i `uc ] +"69 +[; ;mcc_generated_files/adc.c: 69: ADCON2 = 0x80; +[e = _ADCON2 -> -> 128 `i `uc ] +"72 +[; ;mcc_generated_files/adc.c: 72: ADRESL = 0x00; +[e = _ADRESL -> -> 0 `i `uc ] +"75 +[; ;mcc_generated_files/adc.c: 75: ADRESH = 0x00; +[e = _ADRESH -> -> 0 `i `uc ] +"78 +[; ;mcc_generated_files/adc.c: 78: ADCON0 = 0x01; +[e = _ADCON0 -> -> 1 `i `uc ] +"80 +[; ;mcc_generated_files/adc.c: 80: } +[e :UE 539 ] +} +"82 +[; ;mcc_generated_files/adc.c: 82: void ADC_SelectChannel(adc_channel_t channel) +[v _ADC_SelectChannel `(v ~T0 @X0 1 ef1`E4918 ] +"83 +[; ;mcc_generated_files/adc.c: 83: { +{ +[e :U _ADC_SelectChannel ] +"82 +[; ;mcc_generated_files/adc.c: 82: void ADC_SelectChannel(adc_channel_t channel) +[v _channel `E4918 ~T0 @X0 1 r1 ] +"83 +[; ;mcc_generated_files/adc.c: 83: { +[f ] +"85 +[; ;mcc_generated_files/adc.c: 85: ADCON0bits.CHS = channel; +[e = . . _ADCON0bits 1 2 -> _channel `uc ] +"87 +[; ;mcc_generated_files/adc.c: 87: ADCON0bits.ADON = 1; +[e = . . _ADCON0bits 1 0 -> -> 1 `i `uc ] +"88 +[; ;mcc_generated_files/adc.c: 88: } +[e :UE 540 ] +} +"90 +[; ;mcc_generated_files/adc.c: 90: void ADC_StartConversion(void) +[v _ADC_StartConversion `(v ~T0 @X0 1 ef ] +"91 +[; ;mcc_generated_files/adc.c: 91: { +{ +[e :U _ADC_StartConversion ] +[f ] +"93 +[; ;mcc_generated_files/adc.c: 93: ADCON0bits.GO_nDONE = 1; +[e = . . _ADCON0bits 1 1 -> -> 1 `i `uc ] +"94 +[; ;mcc_generated_files/adc.c: 94: } +[e :UE 541 ] +} +"97 +[; ;mcc_generated_files/adc.c: 97: _Bool ADC_IsConversionDone(void) +[v _ADC_IsConversionDone `(a ~T0 @X0 1 ef ] +"98 +[; ;mcc_generated_files/adc.c: 98: { +{ +[e :U _ADC_IsConversionDone ] +[f ] +"100 +[; ;mcc_generated_files/adc.c: 100: return ((_Bool)(!ADCON0bits.GO_nDONE)); +[e ) -> -> ! != -> . . _ADCON0bits 1 1 `i -> 0 `i `i `a ] +[e $UE 542 ] +"101 +[; ;mcc_generated_files/adc.c: 101: } +[e :UE 542 ] +} +"103 +[; ;mcc_generated_files/adc.c: 103: adc_result_t ADC_GetConversionResult(void) +[v _ADC_GetConversionResult `(us ~T0 @X0 1 ef ] +"104 +[; ;mcc_generated_files/adc.c: 104: { +{ +[e :U _ADC_GetConversionResult ] +[f ] +"106 +[; ;mcc_generated_files/adc.c: 106: return ((adc_result_t)((ADRESH << 8) + ADRESL)); +[e ) -> + << -> _ADRESH `i -> 8 `i -> _ADRESL `i `us ] +[e $UE 543 ] +"107 +[; ;mcc_generated_files/adc.c: 107: } +[e :UE 543 ] +} +"109 +[; ;mcc_generated_files/adc.c: 109: adc_result_t ADC_GetConversion(adc_channel_t channel) +[v _ADC_GetConversion `(us ~T0 @X0 1 ef1`E4918 ] +"110 +[; ;mcc_generated_files/adc.c: 110: { +{ +[e :U _ADC_GetConversion ] +"109 +[; ;mcc_generated_files/adc.c: 109: adc_result_t ADC_GetConversion(adc_channel_t channel) +[v _channel `E4918 ~T0 @X0 1 r1 ] +"110 +[; ;mcc_generated_files/adc.c: 110: { +[f ] +"112 +[; ;mcc_generated_files/adc.c: 112: ADCON0bits.CHS = channel; +[e = . . _ADCON0bits 1 2 -> _channel `uc ] +"115 +[; ;mcc_generated_files/adc.c: 115: ADCON0bits.ADON = 1; +[e = . . _ADCON0bits 1 0 -> -> 1 `i `uc ] +"118 +[; ;mcc_generated_files/adc.c: 118: ADCON0bits.GO_nDONE = 1; +[e = . . _ADCON0bits 1 1 -> -> 1 `i `uc ] +"121 +[; ;mcc_generated_files/adc.c: 121: while (ADCON0bits.GO_nDONE) +[e $U 545 ] +[e :U 546 ] +"122 +[; ;mcc_generated_files/adc.c: 122: { +{ +"123 +[; ;mcc_generated_files/adc.c: 123: } +} +[e :U 545 ] +"121 +[; ;mcc_generated_files/adc.c: 121: while (ADCON0bits.GO_nDONE) +[e $ != -> . . _ADCON0bits 1 1 `i -> 0 `i 546 ] +[e :U 547 ] +"126 +[; ;mcc_generated_files/adc.c: 126: return ((adc_result_t)((ADRESH << 8) + ADRESL)); +[e ) -> + << -> _ADRESH `i -> 8 `i -> _ADRESL `i `us ] +[e $UE 544 ] +"127 +[; ;mcc_generated_files/adc.c: 127: } +[e :UE 544 ] +} +"129 +[; ;mcc_generated_files/adc.c: 129: void ADC_TemperatureAcquisitionDelay(void) +[v _ADC_TemperatureAcquisitionDelay `(v ~T0 @X0 1 ef ] +"130 +[; ;mcc_generated_files/adc.c: 130: { +{ +[e :U _ADC_TemperatureAcquisitionDelay ] +[f ] +"131 +[; ;mcc_generated_files/adc.c: 131: _delay((unsigned long)((200)*(25000000/4000000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"132 +[; ;mcc_generated_files/adc.c: 132: } +[e :UE 548 ] +} diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/adc.p1.d b/solar_panel.X/build/default/debug/mcc_generated_files/adc.p1.d new file mode 100644 index 0000000..14cde2e --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/adc.p1.d @@ -0,0 +1,4 @@ +build/default/debug/mcc_generated_files/adc.p1: \ +mcc_generated_files/adc.c \ +mcc_generated_files/adc.h \ +mcc_generated_files/device_config.h diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/device_config.i b/solar_panel.X/build/default/debug/mcc_generated_files/device_config.i new file mode 100644 index 0000000..425358e --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/device_config.i @@ -0,0 +1,39 @@ +# 1 "mcc_generated_files/device_config.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/device_config.c" 2 +# 50 "mcc_generated_files/device_config.c" +#pragma config WDT = OFF +#pragma config STVR = ON +#pragma config XINST = OFF +#pragma config DEBUG = OFF + + +#pragma config CP0 = OFF + + +#pragma config FOSC = HS +#pragma config FOSC2 = ON +#pragma config FCMEN = ON +#pragma config IESO = ON + + +#pragma config WDTPS = 32768 + + +#pragma config EASHFT = ON +#pragma config MODE = MM +#pragma config BW = 16 +#pragma config WAIT = OFF + + +#pragma config CCP2MX = ON +#pragma config ECCPMX = ON +#pragma config ETHLED = ON +# 76 "mcc_generated_files/device_config.c" + diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/device_config.p1 b/solar_panel.X/build/default/debug/mcc_generated_files/device_config.p1 new file mode 100644 index 0000000..13c7034 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/device_config.p1 @@ -0,0 +1,36 @@ +Version 4.0 HI-TECH Software Intermediate Code +"50 mcc_generated_files/device_config.c +[p x WDT = OFF ] +"51 +[p x STVR = ON ] +"52 +[p x XINST = OFF ] +"53 +[p x DEBUG = OFF ] +"56 +[p x CP0 = OFF ] +"59 +[p x FOSC = HS ] +"60 +[p x FOSC2 = ON ] +"61 +[p x FCMEN = ON ] +"62 +[p x IESO = ON ] +"65 +[p x WDTPS = 32768 ] +"68 +[p x EASHFT = ON ] +"69 +[p x MODE = MM ] +"70 +[p x BW = 16 ] +"71 +[p x WAIT = OFF ] +"74 +[p x CCP2MX = ON ] +"75 +[p x ECCPMX = ON ] +"76 +[; ;mcc_generated_files/device_config.c: 76: +[p x ETHLED = ON ] diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/device_config.p1.d b/solar_panel.X/build/default/debug/mcc_generated_files/device_config.p1.d new file mode 100644 index 0000000..4a862c4 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/device_config.p1.d @@ -0,0 +1,2 @@ +build/default/debug/mcc_generated_files/device_config.p1: \ +mcc_generated_files/device_config.c diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/mcc.i b/solar_panel.X/build/default/debug/mcc_generated_files/mcc.i new file mode 100644 index 0000000..b0a2f26 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/mcc.i @@ -0,0 +1,9058 @@ +# 1 "mcc_generated_files/mcc.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/mcc.c" 2 +# 47 "mcc_generated_files/mcc.c" +# 1 "mcc_generated_files/mcc.h" 1 +# 49 "mcc_generated_files/mcc.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 49 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 50 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/pin_manager.h" 1 +# 109 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 121 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 51 "mcc_generated_files/mcc.h" 2 + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdbool.h" 1 3 +# 53 "mcc_generated_files/mcc.h" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 1 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 1 3 +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 + + + + + +typedef void * va_list[1]; + + + + +typedef void * __isoc_va_list[1]; +# 137 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long ssize_t; +# 246 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long off_t; +# 399 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct _IO_FILE FILE; +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 2 3 +# 52 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +typedef union _G_fpos64_t { + char __opaque[16]; + double __align; +} fpos_t; + +extern FILE *const stdin; +extern FILE *const stdout; +extern FILE *const stderr; + + + + + +FILE *fopen(const char *restrict, const char *restrict); +FILE *freopen(const char *restrict, const char *restrict, FILE *restrict); +int fclose(FILE *); + +int remove(const char *); +int rename(const char *, const char *); + +int feof(FILE *); +int ferror(FILE *); +int fflush(FILE *); +void clearerr(FILE *); + +int fseek(FILE *, long, int); +long ftell(FILE *); +void rewind(FILE *); + +int fgetpos(FILE *restrict, fpos_t *restrict); +int fsetpos(FILE *, const fpos_t *); + +size_t fread(void *restrict, size_t, size_t, FILE *restrict); +size_t fwrite(const void *restrict, size_t, size_t, FILE *restrict); + +int fgetc(FILE *); +int getc(FILE *); +int getchar(void); +int ungetc(int, FILE *); + +int fputc(int, FILE *); +int putc(int, FILE *); +int putchar(int); + +char *fgets(char *restrict, int, FILE *restrict); + +char *gets(char *); + + +int fputs(const char *restrict, FILE *restrict); +int puts(const char *); + +__attribute__((__format__(__printf__, 1, 2))) +int printf(const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int fprintf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int sprintf(char *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 3, 4))) +int snprintf(char *restrict, size_t, const char *restrict, ...); + +__attribute__((__format__(__printf__, 1, 0))) +int vprintf(const char *restrict, __isoc_va_list); +int vfprintf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 2, 0))) +int vsprintf(char *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 3, 0))) +int vsnprintf(char *restrict, size_t, const char *restrict, __isoc_va_list); + +__attribute__((__format__(__scanf__, 1, 2))) +int scanf(const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int fscanf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int sscanf(const char *restrict, const char *restrict, ...); + +__attribute__((__format__(__scanf__, 1, 0))) +int vscanf(const char *restrict, __isoc_va_list); +int vfscanf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__scanf__, 2, 0))) +int vsscanf(const char *restrict, const char *restrict, __isoc_va_list); + +void perror(const char *); + +int setvbuf(FILE *restrict, char *restrict, int, size_t); +void setbuf(FILE *restrict, char *restrict); + +char *tmpnam(char *); +FILE *tmpfile(void); + + + + +FILE *fmemopen(void *restrict, size_t, const char *restrict); +FILE *open_memstream(char **, size_t *); +FILE *fdopen(int, const char *); +FILE *popen(const char *, const char *); +int pclose(FILE *); +int fileno(FILE *); +int fseeko(FILE *, off_t, int); +off_t ftello(FILE *); +int dprintf(int, const char *restrict, ...); +int vdprintf(int, const char *restrict, __isoc_va_list); +void flockfile(FILE *); +int ftrylockfile(FILE *); +void funlockfile(FILE *); +int getc_unlocked(FILE *); +int getchar_unlocked(void); +int putc_unlocked(int, FILE *); +int putchar_unlocked(int); +ssize_t getdelim(char **restrict, size_t *restrict, int, FILE *restrict); +ssize_t getline(char **restrict, size_t *restrict, FILE *restrict); +int renameat(int, const char *, int, const char *); +char *ctermid(char *); + + + + + + + +char *tempnam(const char *, const char *); +# 7 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 2 3 +# 54 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + voltage = 0x5, + current = 0x6 +} adc_channel_t; +# 134 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 164 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 191 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 223 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 256 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 286 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 314 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 55 "mcc_generated_files/mcc.h" 2 +# 70 "mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 83 "mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 47 "mcc_generated_files/mcc.c" 2 + + + +void SYSTEM_Initialize(void) +{ + + PIN_MANAGER_Initialize(); + OSCILLATOR_Initialize(); + ADC_Initialize(); +} + +void OSCILLATOR_Initialize(void) +{ + + OSCCON = 0x02; + + OSCTUNE = 0x00; +} diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/mcc.p1 b/solar_panel.X/build/default/debug/mcc_generated_files/mcc.p1 new file mode 100644 index 0000000..391e7b8 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/mcc.p1 @@ -0,0 +1,925 @@ +Version 4.0 HI-TECH Software Intermediate Code +"109 mcc_generated_files/pin_manager.h +[; ;mcc_generated_files/pin_manager.h: 109: void PIN_MANAGER_Initialize (void); +[v _PIN_MANAGER_Initialize `(v ~T0 @X0 0 ef ] +"83 mcc_generated_files/mcc.h +[; ;mcc_generated_files/mcc.h: 83: void OSCILLATOR_Initialize(void); +[v _OSCILLATOR_Initialize `(v ~T0 @X0 0 ef ] +"134 mcc_generated_files/adc.h +[; ;mcc_generated_files/adc.h: 134: void ADC_Initialize(void); +[v _ADC_Initialize `(v ~T0 @X0 0 ef ] +"13762 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13762: extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); +[v _OSCCON `Vuc ~T0 @X0 0 e@4051 ] +"8941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8941: extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); +[v _OSCTUNE `Vuc ~T0 @X0 0 e@3995 ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"50 mcc_generated_files/mcc.c +[; ;mcc_generated_files/mcc.c: 50: void SYSTEM_Initialize(void) +[v _SYSTEM_Initialize `(v ~T0 @X0 1 ef ] +"51 +[; ;mcc_generated_files/mcc.c: 51: { +{ +[e :U _SYSTEM_Initialize ] +[f ] +"53 +[; ;mcc_generated_files/mcc.c: 53: PIN_MANAGER_Initialize(); +[e ( _PIN_MANAGER_Initialize .. ] +"54 +[; ;mcc_generated_files/mcc.c: 54: OSCILLATOR_Initialize(); +[e ( _OSCILLATOR_Initialize .. ] +"55 +[; ;mcc_generated_files/mcc.c: 55: ADC_Initialize(); +[e ( _ADC_Initialize .. ] +"56 +[; ;mcc_generated_files/mcc.c: 56: } +[e :UE 541 ] +} +"58 +[; ;mcc_generated_files/mcc.c: 58: void OSCILLATOR_Initialize(void) +[v _OSCILLATOR_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/mcc.c: 59: { +{ +[e :U _OSCILLATOR_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/mcc.c: 61: OSCCON = 0x02; +[e = _OSCCON -> -> 2 `i `uc ] +"63 +[; ;mcc_generated_files/mcc.c: 63: OSCTUNE = 0x00; +[e = _OSCTUNE -> -> 0 `i `uc ] +"64 +[; ;mcc_generated_files/mcc.c: 64: } +[e :UE 542 ] +} diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/mcc.p1.d b/solar_panel.X/build/default/debug/mcc_generated_files/mcc.p1.d new file mode 100644 index 0000000..175fa8c --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/mcc.p1.d @@ -0,0 +1,6 @@ +build/default/debug/mcc_generated_files/mcc.p1: \ +mcc_generated_files/mcc.c \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/adc.h diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.i b/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.i new file mode 100644 index 0000000..3512034 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.i @@ -0,0 +1,8885 @@ +# 1 "mcc_generated_files/pin_manager.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/pin_manager.c" 2 +# 47 "mcc_generated_files/pin_manager.c" +# 1 "mcc_generated_files/pin_manager.h" 1 +# 56 "mcc_generated_files/pin_manager.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 56 "mcc_generated_files/pin_manager.h" 2 +# 109 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 121 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 47 "mcc_generated_files/pin_manager.c" 2 + + + +void PIN_MANAGER_Initialize(void) +{ + + + + LATE = 0x00; + LATJ = 0x00; + LATD = 0x00; + LATA = 0x00; + LATF = 0x00; + LATB = 0x00; + LATG = 0x00; + LATC = 0x00; + LATH = 0x00; + + + + + TRISE = 0xFF; + TRISF = 0xFF; + TRISA = 0x3F; + TRISG = 0xFF; + TRISB = 0xFF; + TRISH = 0xFF; + TRISC = 0xFF; + TRISD = 0xFF; + TRISJ = 0xFF; + + + + + ADCON1bits.PCFG = 0x00; + + + + + + +} + +void PIN_MANAGER_IOC(void) +{ + +} diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.p1 b/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.p1 new file mode 100644 index 0000000..347b820 --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.p1 @@ -0,0 +1,1025 @@ +Version 4.0 HI-TECH Software Intermediate Code +"6449 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6449: extern volatile unsigned char LATE __attribute__((address(0xF8D))); +[v _LATE `Vuc ~T0 @X0 0 e@3981 ] +"6879 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6879: extern volatile unsigned char LATJ __attribute__((address(0xF91))); +[v _LATJ `Vuc ~T0 @X0 0 e@3985 ] +"6337 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6337: extern volatile unsigned char LATD __attribute__((address(0xF8C))); +[v _LATD `Vuc ~T0 @X0 0 e@3980 ] +"5992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5992: extern volatile unsigned char LATA __attribute__((address(0xF89))); +[v _LATA `Vuc ~T0 @X0 0 e@3977 ] +"6561 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6561: extern volatile unsigned char LATF __attribute__((address(0xF8E))); +[v _LATF `Vuc ~T0 @X0 0 e@3982 ] +"6113 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6113: extern volatile unsigned char LATB __attribute__((address(0xF8A))); +[v _LATB `Vuc ~T0 @X0 0 e@3978 ] +"6673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6673: extern volatile unsigned char LATG __attribute__((address(0xF8F))); +[v _LATG `Vuc ~T0 @X0 0 e@3983 ] +"6225 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6225: extern volatile unsigned char LATC __attribute__((address(0xF8B))); +[v _LATC `Vuc ~T0 @X0 0 e@3979 ] +"6767 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6767: extern volatile unsigned char LATH __attribute__((address(0xF90))); +[v _LATH `Vuc ~T0 @X0 0 e@3984 ] +"7831 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7831: extern volatile unsigned char TRISE __attribute__((address(0xF96))); +[v _TRISE `Vuc ~T0 @X0 0 e@3990 ] +"8053 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8053: extern volatile unsigned char TRISF __attribute__((address(0xF97))); +[v _TRISF `Vuc ~T0 @X0 0 e@3991 ] +"6991 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6991: extern volatile unsigned char TRISA __attribute__((address(0xF92))); +[v _TRISA `Vuc ~T0 @X0 0 e@3986 ] +"8275 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8275: extern volatile unsigned char TRISG __attribute__((address(0xF98))); +[v _TRISG `Vuc ~T0 @X0 0 e@3992 ] +"7165 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7165: extern volatile unsigned char TRISB __attribute__((address(0xF93))); +[v _TRISB `Vuc ~T0 @X0 0 e@3987 ] +"8497 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8497: extern volatile unsigned char TRISH __attribute__((address(0xF99))); +[v _TRISH `Vuc ~T0 @X0 0 e@3993 ] +"7387 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7387: extern volatile unsigned char TRISC __attribute__((address(0xF94))); +[v _TRISC `Vuc ~T0 @X0 0 e@3988 ] +"7609 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7609: extern volatile unsigned char TRISD __attribute__((address(0xF95))); +[v _TRISD `Vuc ~T0 @X0 0 e@3989 ] +"8719 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8719: extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); +[v _TRISJ `Vuc ~T0 @X0 0 e@3994 ] +"11649 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11649: struct { +[s S421 :4 `uc 1 :2 `uc 1 ] +[n S421 . PCFG VCFG ] +"11653 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11653: struct { +[s S422 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S422 . PCFG0 PCFG1 PCFG2 PCFG3 VCFG0 VCFG1 ] +"11661 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11661: struct { +[s S423 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S423 . . CHSN3 VCFG01 VCFG11 ] +"11648 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11648: typedef union { +[u S420 `S421 1 `S422 1 `S423 1 ] +[n S420 . . . . ] +"11668 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11668: extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +[v _ADCON1bits `VS420 ~T0 @X0 0 e@4033 ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"50 mcc_generated_files/pin_manager.c +[; ;mcc_generated_files/pin_manager.c: 50: void PIN_MANAGER_Initialize(void) +[v _PIN_MANAGER_Initialize `(v ~T0 @X0 1 ef ] +"51 +[; ;mcc_generated_files/pin_manager.c: 51: { +{ +[e :U _PIN_MANAGER_Initialize ] +[f ] +"55 +[; ;mcc_generated_files/pin_manager.c: 55: LATE = 0x00; +[e = _LATE -> -> 0 `i `uc ] +"56 +[; ;mcc_generated_files/pin_manager.c: 56: LATJ = 0x00; +[e = _LATJ -> -> 0 `i `uc ] +"57 +[; ;mcc_generated_files/pin_manager.c: 57: LATD = 0x00; +[e = _LATD -> -> 0 `i `uc ] +"58 +[; ;mcc_generated_files/pin_manager.c: 58: LATA = 0x00; +[e = _LATA -> -> 0 `i `uc ] +"59 +[; ;mcc_generated_files/pin_manager.c: 59: LATF = 0x00; +[e = _LATF -> -> 0 `i `uc ] +"60 +[; ;mcc_generated_files/pin_manager.c: 60: LATB = 0x00; +[e = _LATB -> -> 0 `i `uc ] +"61 +[; ;mcc_generated_files/pin_manager.c: 61: LATG = 0x00; +[e = _LATG -> -> 0 `i `uc ] +"62 +[; ;mcc_generated_files/pin_manager.c: 62: LATC = 0x00; +[e = _LATC -> -> 0 `i `uc ] +"63 +[; ;mcc_generated_files/pin_manager.c: 63: LATH = 0x00; +[e = _LATH -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/pin_manager.c: 68: TRISE = 0xFF; +[e = _TRISE -> -> 255 `i `uc ] +"69 +[; ;mcc_generated_files/pin_manager.c: 69: TRISF = 0xFF; +[e = _TRISF -> -> 255 `i `uc ] +"70 +[; ;mcc_generated_files/pin_manager.c: 70: TRISA = 0x3F; +[e = _TRISA -> -> 63 `i `uc ] +"71 +[; ;mcc_generated_files/pin_manager.c: 71: TRISG = 0xFF; +[e = _TRISG -> -> 255 `i `uc ] +"72 +[; ;mcc_generated_files/pin_manager.c: 72: TRISB = 0xFF; +[e = _TRISB -> -> 255 `i `uc ] +"73 +[; ;mcc_generated_files/pin_manager.c: 73: TRISH = 0xFF; +[e = _TRISH -> -> 255 `i `uc ] +"74 +[; ;mcc_generated_files/pin_manager.c: 74: TRISC = 0xFF; +[e = _TRISC -> -> 255 `i `uc ] +"75 +[; ;mcc_generated_files/pin_manager.c: 75: TRISD = 0xFF; +[e = _TRISD -> -> 255 `i `uc ] +"76 +[; ;mcc_generated_files/pin_manager.c: 76: TRISJ = 0xFF; +[e = _TRISJ -> -> 255 `i `uc ] +"81 +[; ;mcc_generated_files/pin_manager.c: 81: ADCON1bits.PCFG = 0x00; +[e = . . _ADCON1bits 0 0 -> -> 0 `i `uc ] +"88 +[; ;mcc_generated_files/pin_manager.c: 88: } +[e :UE 538 ] +} +"90 +[; ;mcc_generated_files/pin_manager.c: 90: void PIN_MANAGER_IOC(void) +[v _PIN_MANAGER_IOC `(v ~T0 @X0 1 ef ] +"91 +[; ;mcc_generated_files/pin_manager.c: 91: { +{ +[e :U _PIN_MANAGER_IOC ] +[f ] +"93 +[; ;mcc_generated_files/pin_manager.c: 93: } +[e :UE 539 ] +} diff --git a/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.p1.d b/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.p1.d new file mode 100644 index 0000000..93caf3d --- /dev/null +++ b/solar_panel.X/build/default/debug/mcc_generated_files/pin_manager.p1.d @@ -0,0 +1,3 @@ +build/default/debug/mcc_generated_files/pin_manager.p1: \ +mcc_generated_files/pin_manager.c \ +mcc_generated_files/pin_manager.h diff --git a/solar_panel.X/build/default/production/lcd/lcd.i b/solar_panel.X/build/default/production/lcd/lcd.i new file mode 100644 index 0000000..407c668 --- /dev/null +++ b/solar_panel.X/build/default/production/lcd/lcd.i @@ -0,0 +1,8969 @@ +# 1 "lcd/lcd.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "lcd/lcd.c" 2 +# 10 "lcd/lcd.c" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 10 "lcd/lcd.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 1 3 +# 25 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 411 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct __locale_struct * locale_t; +# 25 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 2 3 + + +void *memcpy (void *restrict, const void *restrict, size_t); +void *memmove (void *, const void *, size_t); +void *memset (void *, int, size_t); +int memcmp (const void *, const void *, size_t); +void *memchr (const void *, int, size_t); + +char *strcpy (char *restrict, const char *restrict); +char *strncpy (char *restrict, const char *restrict, size_t); + +char *strcat (char *restrict, const char *restrict); +char *strncat (char *restrict, const char *restrict, size_t); + +int strcmp (const char *, const char *); +int strncmp (const char *, const char *, size_t); + +int strcoll (const char *, const char *); +size_t strxfrm (char *restrict, const char *restrict, size_t); + +char *strchr (const char *, int); +char *strrchr (const char *, int); + +size_t strcspn (const char *, const char *); +size_t strspn (const char *, const char *); +char *strpbrk (const char *, const char *); +char *strstr (const char *, const char *); +char *strtok (char *restrict, const char *restrict); + +size_t strlen (const char *); + +char *strerror (int); +# 65 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 3 +char *strtok_r (char *restrict, const char *restrict, char **restrict); +int strerror_r (int, char *, size_t); +char *stpcpy(char *restrict, const char *restrict); +char *stpncpy(char *restrict, const char *restrict, size_t); +size_t strnlen (const char *, size_t); +char *strdup (const char *); +char *strndup (const char *, size_t); +char *strsignal(int); +char *strerror_l (int, locale_t); +int strcoll_l (const char *, const char *, locale_t); +size_t strxfrm_l (char *restrict, const char *restrict, size_t, locale_t); + + + + +void *memccpy (void *restrict, const void *restrict, int, size_t); +# 11 "lcd/lcd.c" 2 + +# 1 "lcd/lcd.h" 1 +# 50 "lcd/lcd.h" +int8_t Lcd_Init(void); +void LCD_2x16_WriteCmd(uint8_t command); +void LCD_2x16_WriteData(uint8_t command); +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +# 12 "lcd/lcd.c" 2 + +# 1 "lcd/ssd1963_cmd.h" 1 +# 13 "lcd/lcd.c" 2 + + + + +int8_t Lcd_Init(void) +{ + + + TRISDbits.TRISD3 = 0; + LATDbits.LATD3 = 0; + TRISDbits.TRISD2 = 0; + LATDbits.LATD2 = 0; + TRISJ = TRISJ & 0x0F; + + _delay((unsigned long)((200)*(25000000L/4000.0))); + LCD_2x16_WriteCmd(0x02); + + LCD_2x16_WriteCmd(0x28); + + + LCD_2x16_WriteCmd(0x01); + LCD_2x16_WriteCmd(0x0C); + + + LCD_2x16_WriteCmd(0x06); + + return 0; +} + + +void LCD_2x16_WriteCmd(uint8_t command) +{ + LATDbits.LATD3 = 0; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((10)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + command = command << 4; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((10)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((3)*(25000000L/4000.0))); +} +void LCD_2x16_WriteData(uint8_t command) +{ + LATDbits.LATD3 = 1; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + command = command << 4; + LATJ = (command & 0xF0) | (LATJ & 0x0F); + LATDbits.LATD2 = 1; + _delay((unsigned long)((1)*(25000000L/4000000.0))); + LATDbits.LATD2 = 0; + _delay((unsigned long)((100)*(25000000L/4000000.0))); +} + +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line) +{ + LCD_2x16_WriteCmd(0x80 | (line << 6)); + do + { + LCD_2x16_WriteData(*msg); + msg++; + }while(*msg != 0); +} diff --git a/solar_panel.X/build/default/production/lcd/lcd.p1 b/solar_panel.X/build/default/production/lcd/lcd.p1 new file mode 100644 index 0000000..24dda01 --- /dev/null +++ b/solar_panel.X/build/default/production/lcd/lcd.p1 @@ -0,0 +1,1107 @@ +Version 4.0 HI-TECH Software Intermediate Code +"7620 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7620: struct { +[s S272 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S272 . TRISD0 TRISD1 TRISD2 TRISD3 TRISD4 TRISD5 TRISD6 TRISD7 ] +"7630 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7630: struct { +[s S273 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S273 . RD0 RD1 RD2 RD3 RD4 RD5 RD6 RD7 ] +"7619 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7619: typedef union { +[u S271 `S272 1 `S273 1 ] +[n S271 . . . ] +"7641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7641: extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +[v _TRISDbits `VS271 ~T0 @X0 0 e@3989 ] +"6343 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6343: struct { +[s S236 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S236 . LATD0 LATD1 LATD2 LATD3 LATD4 LATD5 LATD6 LATD7 ] +"6353 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6353: struct { +[s S237 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S237 . LD0 LD1 LD2 LD3 LD4 LD5 LD6 LD7 ] +"6342 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6342: typedef union { +[u S235 `S236 1 `S237 1 ] +[n S235 . . . ] +"6364 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6364: extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +[v _LATDbits `VS235 ~T0 @X0 0 e@3980 ] +"8719 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8719: extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); +[v _TRISJ `Vuc ~T0 @X0 0 e@3994 ] +[v F192 `(v ~T0 @X0 1 tf1`ul ] +"12 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\builtins.h +[v __delay `JF192 ~T0 @X0 0 e ] +[p i __delay ] +"51 lcd/lcd.h +[; ;lcd/lcd.h: 51: void LCD_2x16_WriteCmd(uint8_t command); +[v _LCD_2x16_WriteCmd `(v ~T0 @X0 0 ef1`uc ] +"6879 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6879: extern volatile unsigned char LATJ __attribute__((address(0xF91))); +[v _LATJ `Vuc ~T0 @X0 0 e@3985 ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"17 lcd/lcd.c +[; ;lcd/lcd.c: 17: int8_t Lcd_Init(void) +[v _Lcd_Init `(c ~T0 @X0 1 ef ] +"18 +[; ;lcd/lcd.c: 18: { +{ +[e :U _Lcd_Init ] +[f ] +"21 +[; ;lcd/lcd.c: 21: TRISDbits.TRISD3 = 0; +[e = . . _TRISDbits 0 3 -> -> 0 `i `uc ] +"22 +[; ;lcd/lcd.c: 22: LATDbits.LATD3 = 0; +[e = . . _LATDbits 0 3 -> -> 0 `i `uc ] +"23 +[; ;lcd/lcd.c: 23: TRISDbits.TRISD2 = 0; +[e = . . _TRISDbits 0 2 -> -> 0 `i `uc ] +"24 +[; ;lcd/lcd.c: 24: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"25 +[; ;lcd/lcd.c: 25: TRISJ = TRISJ & 0x0F; +[e = _TRISJ -> & -> _TRISJ `i -> 15 `i `uc ] +"27 +[; ;lcd/lcd.c: 27: _delay((unsigned long)((200)*(25000000L/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 25000000 `l `d .4000.0 `ul ] +"28 +[; ;lcd/lcd.c: 28: LCD_2x16_WriteCmd(0x02); +[e ( _LCD_2x16_WriteCmd (1 -> -> 2 `i `uc ] +"30 +[; ;lcd/lcd.c: 30: LCD_2x16_WriteCmd(0x28); +[e ( _LCD_2x16_WriteCmd (1 -> -> 40 `i `uc ] +"33 +[; ;lcd/lcd.c: 33: LCD_2x16_WriteCmd(0x01); +[e ( _LCD_2x16_WriteCmd (1 -> -> 1 `i `uc ] +"34 +[; ;lcd/lcd.c: 34: LCD_2x16_WriteCmd(0x0C); +[e ( _LCD_2x16_WriteCmd (1 -> -> 12 `i `uc ] +"37 +[; ;lcd/lcd.c: 37: LCD_2x16_WriteCmd(0x06); +[e ( _LCD_2x16_WriteCmd (1 -> -> 6 `i `uc ] +"39 +[; ;lcd/lcd.c: 39: return 0; +[e ) -> -> 0 `i `c ] +[e $UE 539 ] +"40 +[; ;lcd/lcd.c: 40: } +[e :UE 539 ] +} +"43 +[; ;lcd/lcd.c: 43: void LCD_2x16_WriteCmd(uint8_t command) +[v _LCD_2x16_WriteCmd `(v ~T0 @X0 1 ef1`uc ] +"44 +[; ;lcd/lcd.c: 44: { +{ +[e :U _LCD_2x16_WriteCmd ] +"43 +[; ;lcd/lcd.c: 43: void LCD_2x16_WriteCmd(uint8_t command) +[v _command `uc ~T0 @X0 1 r1 ] +"44 +[; ;lcd/lcd.c: 44: { +[f ] +"45 +[; ;lcd/lcd.c: 45: LATDbits.LATD3 = 0; +[e = . . _LATDbits 0 3 -> -> 0 `i `uc ] +"46 +[; ;lcd/lcd.c: 46: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"47 +[; ;lcd/lcd.c: 47: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"48 +[; ;lcd/lcd.c: 48: _delay((unsigned long)((10)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"49 +[; ;lcd/lcd.c: 49: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"50 +[; ;lcd/lcd.c: 50: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"51 +[; ;lcd/lcd.c: 51: command = command << 4; +[e = _command -> << -> _command `i -> 4 `i `uc ] +"52 +[; ;lcd/lcd.c: 52: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"53 +[; ;lcd/lcd.c: 53: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"54 +[; ;lcd/lcd.c: 54: _delay((unsigned long)((10)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 10 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"55 +[; ;lcd/lcd.c: 55: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"56 +[; ;lcd/lcd.c: 56: _delay((unsigned long)((3)*(25000000L/4000.0))); +[e ( __delay (1 -> * -> -> 3 `i `d / -> -> 25000000 `l `d .4000.0 `ul ] +"57 +[; ;lcd/lcd.c: 57: } +[e :UE 540 ] +} +"58 +[; ;lcd/lcd.c: 58: void LCD_2x16_WriteData(uint8_t command) +[v _LCD_2x16_WriteData `(v ~T0 @X0 1 ef1`uc ] +"59 +[; ;lcd/lcd.c: 59: { +{ +[e :U _LCD_2x16_WriteData ] +"58 +[; ;lcd/lcd.c: 58: void LCD_2x16_WriteData(uint8_t command) +[v _command `uc ~T0 @X0 1 r1 ] +"59 +[; ;lcd/lcd.c: 59: { +[f ] +"60 +[; ;lcd/lcd.c: 60: LATDbits.LATD3 = 1; +[e = . . _LATDbits 0 3 -> -> 1 `i `uc ] +"61 +[; ;lcd/lcd.c: 61: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"62 +[; ;lcd/lcd.c: 62: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"63 +[; ;lcd/lcd.c: 63: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"64 +[; ;lcd/lcd.c: 64: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"65 +[; ;lcd/lcd.c: 65: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"66 +[; ;lcd/lcd.c: 66: command = command << 4; +[e = _command -> << -> _command `i -> 4 `i `uc ] +"67 +[; ;lcd/lcd.c: 67: LATJ = (command & 0xF0) | (LATJ & 0x0F); +[e = _LATJ -> | & -> _command `i -> 240 `i & -> _LATJ `i -> 15 `i `uc ] +"68 +[; ;lcd/lcd.c: 68: LATDbits.LATD2 = 1; +[e = . . _LATDbits 0 2 -> -> 1 `i `uc ] +"69 +[; ;lcd/lcd.c: 69: _delay((unsigned long)((1)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 1 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"70 +[; ;lcd/lcd.c: 70: LATDbits.LATD2 = 0; +[e = . . _LATDbits 0 2 -> -> 0 `i `uc ] +"71 +[; ;lcd/lcd.c: 71: _delay((unsigned long)((100)*(25000000L/4000000.0))); +[e ( __delay (1 -> * -> -> 100 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"72 +[; ;lcd/lcd.c: 72: } +[e :UE 541 ] +} +"74 +[; ;lcd/lcd.c: 74: void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line) +[v _LCD_2x16_WriteMsg `(v ~T0 @X0 1 ef2`*uc`uc ] +"75 +[; ;lcd/lcd.c: 75: { +{ +[e :U _LCD_2x16_WriteMsg ] +"74 +[; ;lcd/lcd.c: 74: void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line) +[v _msg `*uc ~T0 @X0 1 r1 ] +[v _line `uc ~T0 @X0 1 r2 ] +"75 +[; ;lcd/lcd.c: 75: { +[f ] +"76 +[; ;lcd/lcd.c: 76: LCD_2x16_WriteCmd(0x80 | (line << 6)); +[e ( _LCD_2x16_WriteCmd (1 -> | -> 128 `i << -> _line `i -> 6 `i `uc ] +"77 +[; ;lcd/lcd.c: 77: do +[e :U 545 ] +"78 +[; ;lcd/lcd.c: 78: { +{ +"79 +[; ;lcd/lcd.c: 79: LCD_2x16_WriteData(*msg); +[e ( _LCD_2x16_WriteData (1 *U _msg ] +"80 +[; ;lcd/lcd.c: 80: msg++; +[e ++ _msg * -> -> 1 `i `x -> -> # *U _msg `i `x ] +"81 +[; ;lcd/lcd.c: 81: }while(*msg != 0); +} +[e $ != -> *U _msg `i -> 0 `i 545 ] +[e :U 544 ] +"82 +[; ;lcd/lcd.c: 82: } +[e :UE 542 ] +} diff --git a/solar_panel.X/build/default/production/lcd/lcd.p1.d b/solar_panel.X/build/default/production/lcd/lcd.p1.d new file mode 100644 index 0000000..3ce60d3 --- /dev/null +++ b/solar_panel.X/build/default/production/lcd/lcd.p1.d @@ -0,0 +1,4 @@ +build/default/production/lcd/lcd.p1: \ +lcd/lcd.c \ +lcd/lcd.h \ +lcd/ssd1963_cmd.h diff --git a/solar_panel.X/build/default/production/main.i b/solar_panel.X/build/default/production/main.i new file mode 100644 index 0000000..89891a4 --- /dev/null +++ b/solar_panel.X/build/default/production/main.i @@ -0,0 +1,9066 @@ +# 1 "main.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "main.c" 2 +# 44 "main.c" +# 1 "./mcc_generated_files/mcc.h" 1 +# 49 "./mcc_generated_files/mcc.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 49 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/device_config.h" 1 +# 50 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/pin_manager.h" 1 +# 109 "./mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 121 "./mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 51 "./mcc_generated_files/mcc.h" 2 + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdbool.h" 1 3 +# 53 "./mcc_generated_files/mcc.h" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 1 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 1 3 +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 + + + + + +typedef void * va_list[1]; + + + + +typedef void * __isoc_va_list[1]; +# 137 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long ssize_t; +# 246 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long off_t; +# 399 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct _IO_FILE FILE; +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 2 3 +# 52 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +typedef union _G_fpos64_t { + char __opaque[16]; + double __align; +} fpos_t; + +extern FILE *const stdin; +extern FILE *const stdout; +extern FILE *const stderr; + + + + + +FILE *fopen(const char *restrict, const char *restrict); +FILE *freopen(const char *restrict, const char *restrict, FILE *restrict); +int fclose(FILE *); + +int remove(const char *); +int rename(const char *, const char *); + +int feof(FILE *); +int ferror(FILE *); +int fflush(FILE *); +void clearerr(FILE *); + +int fseek(FILE *, long, int); +long ftell(FILE *); +void rewind(FILE *); + +int fgetpos(FILE *restrict, fpos_t *restrict); +int fsetpos(FILE *, const fpos_t *); + +size_t fread(void *restrict, size_t, size_t, FILE *restrict); +size_t fwrite(const void *restrict, size_t, size_t, FILE *restrict); + +int fgetc(FILE *); +int getc(FILE *); +int getchar(void); +int ungetc(int, FILE *); + +int fputc(int, FILE *); +int putc(int, FILE *); +int putchar(int); + +char *fgets(char *restrict, int, FILE *restrict); + +char *gets(char *); + + +int fputs(const char *restrict, FILE *restrict); +int puts(const char *); + +__attribute__((__format__(__printf__, 1, 2))) +int printf(const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int fprintf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int sprintf(char *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 3, 4))) +int snprintf(char *restrict, size_t, const char *restrict, ...); + +__attribute__((__format__(__printf__, 1, 0))) +int vprintf(const char *restrict, __isoc_va_list); +int vfprintf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 2, 0))) +int vsprintf(char *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 3, 0))) +int vsnprintf(char *restrict, size_t, const char *restrict, __isoc_va_list); + +__attribute__((__format__(__scanf__, 1, 2))) +int scanf(const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int fscanf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int sscanf(const char *restrict, const char *restrict, ...); + +__attribute__((__format__(__scanf__, 1, 0))) +int vscanf(const char *restrict, __isoc_va_list); +int vfscanf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__scanf__, 2, 0))) +int vsscanf(const char *restrict, const char *restrict, __isoc_va_list); + +void perror(const char *); + +int setvbuf(FILE *restrict, char *restrict, int, size_t); +void setbuf(FILE *restrict, char *restrict); + +char *tmpnam(char *); +FILE *tmpfile(void); + + + + +FILE *fmemopen(void *restrict, size_t, const char *restrict); +FILE *open_memstream(char **, size_t *); +FILE *fdopen(int, const char *); +FILE *popen(const char *, const char *); +int pclose(FILE *); +int fileno(FILE *); +int fseeko(FILE *, off_t, int); +off_t ftello(FILE *); +int dprintf(int, const char *restrict, ...); +int vdprintf(int, const char *restrict, __isoc_va_list); +void flockfile(FILE *); +int ftrylockfile(FILE *); +void funlockfile(FILE *); +int getc_unlocked(FILE *); +int getchar_unlocked(void); +int putc_unlocked(int, FILE *); +int putchar_unlocked(int); +ssize_t getdelim(char **restrict, size_t *restrict, int, FILE *restrict); +ssize_t getline(char **restrict, size_t *restrict, FILE *restrict); +int renameat(int, const char *, int, const char *); +char *ctermid(char *); + + + + + + + +char *tempnam(const char *, const char *); +# 7 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 2 3 +# 54 "./mcc_generated_files/mcc.h" 2 + +# 1 "./mcc_generated_files/adc.h" 1 +# 72 "./mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "./mcc_generated_files/adc.h" +typedef enum +{ + channel_AN5 = 0x5, + channel_AN6 = 0x6 +} adc_channel_t; +# 134 "./mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 164 "./mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 191 "./mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 223 "./mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 256 "./mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 286 "./mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 314 "./mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 55 "./mcc_generated_files/mcc.h" 2 +# 70 "./mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 83 "./mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 44 "main.c" 2 + +# 1 "./lcd/lcd.h" 1 +# 50 "./lcd/lcd.h" +int8_t Lcd_Init(void); +void LCD_2x16_WriteCmd(uint8_t command); +void LCD_2x16_WriteData(uint8_t command); +void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +# 45 "main.c" 2 + + + + + +void main(void) +{ + + SYSTEM_Initialize(); + + int8_t Lcd_Init(); +# 73 "main.c" + while (1) + { + char* msg = "test"; + LCD_2x16_WriteMsg(msg,0); + } +} diff --git a/solar_panel.X/build/default/production/main.p1 b/solar_panel.X/build/default/production/main.p1 new file mode 100644 index 0000000..fa2e17a --- /dev/null +++ b/solar_panel.X/build/default/production/main.p1 @@ -0,0 +1,914 @@ +Version 4.0 HI-TECH Software Intermediate Code +[p mainexit ] +"70 ./mcc_generated_files/mcc.h +[; ;./mcc_generated_files/mcc.h: 70: void SYSTEM_Initialize(void); +[v _SYSTEM_Initialize `(v ~T0 @X0 0 ef ] +"53 ./lcd/lcd.h +[; ;./lcd/lcd.h: 53: void LCD_2x16_WriteMsg(unsigned char * msg, uint8_t line); +[v _LCD_2x16_WriteMsg `(v ~T0 @X0 0 ef2`*uc`uc ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +[v $root$_main `(v ~T0 @X0 0 e ] +"50 main.c +[; ;main.c: 50: void main(void) +[v _main `(v ~T0 @X0 1 ef ] +"51 +[; ;main.c: 51: { +{ +[e :U _main ] +[f ] +"53 +[; ;main.c: 53: SYSTEM_Initialize(); +[e ( _SYSTEM_Initialize .. ] +"73 +[; ;main.c: 73: while (1) +[e :U 543 ] +"74 +[; ;main.c: 74: { +{ +"75 +[; ;main.c: 75: char* msg = "test"; +[v _msg `*uc ~T0 @X0 1 a ] +[e = _msg :s 1C ] +"76 +[; ;main.c: 76: LCD_2x16_WriteMsg(msg,0); +[e ( _LCD_2x16_WriteMsg (2 , -> _msg `*uc -> -> 0 `i `uc ] +"77 +[; ;main.c: 77: } +} +[e :U 542 ] +[e $U 543 ] +[e :U 544 ] +"78 +[; ;main.c: 78: } +[e :UE 541 ] +} +[a 1C 116 101 115 116 0 ] diff --git a/solar_panel.X/build/default/production/main.p1.d b/solar_panel.X/build/default/production/main.p1.d new file mode 100644 index 0000000..57ae3f5 --- /dev/null +++ b/solar_panel.X/build/default/production/main.p1.d @@ -0,0 +1,7 @@ +build/default/production/main.p1: \ +main.c \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/adc.h \ +lcd/lcd.h diff --git a/solar_panel.X/build/default/production/mcc_generated_files/adc.i b/solar_panel.X/build/default/production/mcc_generated_files/adc.i new file mode 100644 index 0000000..6aff97c --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/adc.i @@ -0,0 +1,8951 @@ +# 1 "mcc_generated_files/adc.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/adc.c" 2 +# 51 "mcc_generated_files/adc.c" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 51 "mcc_generated_files/adc.c" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 56 "mcc_generated_files/adc.h" +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdbool.h" 1 3 +# 56 "mcc_generated_files/adc.h" 2 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + channel_AN5 = 0x5, + channel_AN6 = 0x6 +} adc_channel_t; +# 134 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 164 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 191 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 223 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 256 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 286 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 314 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 52 "mcc_generated_files/adc.c" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 53 "mcc_generated_files/adc.c" 2 + + +void (*ADC_InterruptHandler)(void); + + + + + +void ADC_Initialize(void) +{ + + + + ADCON1 = 0x00; + + + ADCON2 = 0x00; + + + ADRESL = 0x00; + + + ADRESH = 0x00; + + + ADCON0 = 0x01; + +} + +void ADC_SelectChannel(adc_channel_t channel) +{ + + ADCON0bits.CHS = channel; + + ADCON0bits.ADON = 1; +} + +void ADC_StartConversion(void) +{ + + ADCON0bits.GO_nDONE = 1; +} + + +_Bool ADC_IsConversionDone(void) +{ + + return ((_Bool)(!ADCON0bits.GO_nDONE)); +} + +adc_result_t ADC_GetConversionResult(void) +{ + + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +adc_result_t ADC_GetConversion(adc_channel_t channel) +{ + + ADCON0bits.CHS = channel; + + + ADCON0bits.ADON = 1; + + + ADCON0bits.GO_nDONE = 1; + + + while (ADCON0bits.GO_nDONE) + { + } + + + return ((adc_result_t)((ADRESH << 8) + ADRESL)); +} + +void ADC_TemperatureAcquisitionDelay(void) +{ + _delay((unsigned long)((200)*(25000000/4000000.0))); +} diff --git a/solar_panel.X/build/default/production/mcc_generated_files/adc.p1 b/solar_panel.X/build/default/production/mcc_generated_files/adc.p1 new file mode 100644 index 0000000..251b62c --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/adc.p1 @@ -0,0 +1,1094 @@ +Version 4.0 HI-TECH Software Intermediate Code +[v F4932 `(v ~T0 @X0 0 tf ] +"11643 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11643: extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); +[v _ADCON1 `Vuc ~T0 @X0 0 e@4033 ] +"11572 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11572: extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); +[v _ADCON2 `Vuc ~T0 @X0 0 e@4032 ] +"11861 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11861: extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); +[v _ADRESL `Vuc ~T0 @X0 0 e@4035 ] +"11868 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11868: extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); +[v _ADRESH `Vuc ~T0 @X0 0 e@4036 ] +"11728 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11728: extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); +[v _ADCON0 `Vuc ~T0 @X0 0 e@4034 ] +"82 mcc_generated_files/adc.c +[; ;mcc_generated_files/adc.c: 82: void ADC_SelectChannel(adc_channel_t channel) +[c E4918 5 6 .. ] +[n E4918 . channel_AN5 channel_AN6 ] +"11734 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11734: struct { +[s S425 :1 `uc 1 :1 `uc 1 ] +[n S425 . . GO_NOT_DONE ] +"11738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11738: struct { +[s S426 :1 `uc 1 :1 `uc 1 :4 `uc 1 ] +[n S426 . ADON GO_nDONE CHS ] +"11743 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11743: struct { +[s S427 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S427 . . DONE CHS0 CHS1 CHS2 CHS3 . ADCAL ] +"11753 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11753: struct { +[s S428 :1 `uc 1 :1 `uc 1 ] +[n S428 . . GO_DONE ] +"11757 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11757: struct { +[s S429 :1 `uc 1 :1 `uc 1 ] +[n S429 . . GO ] +"11761 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11761: struct { +[s S430 :1 `uc 1 :1 `uc 1 ] +[n S430 . . NOT_DONE ] +"11765 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11765: struct { +[s S431 :1 `uc 1 :1 `uc 1 ] +[n S431 . . nDONE ] +"11769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11769: struct { +[s S432 :1 `uc 1 :1 `uc 1 ] +[n S432 . . GODONE ] +"11733 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11733: typedef union { +[u S424 `S425 1 `S426 1 `S427 1 `S428 1 `S429 1 `S430 1 `S431 1 `S432 1 ] +[n S424 . . . . . . . . . ] +"11774 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11774: extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +[v _ADCON0bits `VS424 ~T0 @X0 0 e@4034 ] +[v F192 `(v ~T0 @X0 1 tf1`ul ] +"12 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\builtins.h +[v __delay `JF192 ~T0 @X0 0 e ] +[p i __delay ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"55 mcc_generated_files/adc.c +[; ;mcc_generated_files/adc.c: 55: void (*ADC_InterruptHandler)(void); +[v _ADC_InterruptHandler `*F4932 ~T0 @X0 1 e ] +"61 +[; ;mcc_generated_files/adc.c: 61: void ADC_Initialize(void) +[v _ADC_Initialize `(v ~T0 @X0 1 ef ] +"62 +[; ;mcc_generated_files/adc.c: 62: { +{ +[e :U _ADC_Initialize ] +[f ] +"66 +[; ;mcc_generated_files/adc.c: 66: ADCON1 = 0x00; +[e = _ADCON1 -> -> 0 `i `uc ] +"69 +[; ;mcc_generated_files/adc.c: 69: ADCON2 = 0x00; +[e = _ADCON2 -> -> 0 `i `uc ] +"72 +[; ;mcc_generated_files/adc.c: 72: ADRESL = 0x00; +[e = _ADRESL -> -> 0 `i `uc ] +"75 +[; ;mcc_generated_files/adc.c: 75: ADRESH = 0x00; +[e = _ADRESH -> -> 0 `i `uc ] +"78 +[; ;mcc_generated_files/adc.c: 78: ADCON0 = 0x01; +[e = _ADCON0 -> -> 1 `i `uc ] +"80 +[; ;mcc_generated_files/adc.c: 80: } +[e :UE 539 ] +} +"82 +[; ;mcc_generated_files/adc.c: 82: void ADC_SelectChannel(adc_channel_t channel) +[v _ADC_SelectChannel `(v ~T0 @X0 1 ef1`E4918 ] +"83 +[; ;mcc_generated_files/adc.c: 83: { +{ +[e :U _ADC_SelectChannel ] +"82 +[; ;mcc_generated_files/adc.c: 82: void ADC_SelectChannel(adc_channel_t channel) +[v _channel `E4918 ~T0 @X0 1 r1 ] +"83 +[; ;mcc_generated_files/adc.c: 83: { +[f ] +"85 +[; ;mcc_generated_files/adc.c: 85: ADCON0bits.CHS = channel; +[e = . . _ADCON0bits 1 2 -> _channel `uc ] +"87 +[; ;mcc_generated_files/adc.c: 87: ADCON0bits.ADON = 1; +[e = . . _ADCON0bits 1 0 -> -> 1 `i `uc ] +"88 +[; ;mcc_generated_files/adc.c: 88: } +[e :UE 540 ] +} +"90 +[; ;mcc_generated_files/adc.c: 90: void ADC_StartConversion(void) +[v _ADC_StartConversion `(v ~T0 @X0 1 ef ] +"91 +[; ;mcc_generated_files/adc.c: 91: { +{ +[e :U _ADC_StartConversion ] +[f ] +"93 +[; ;mcc_generated_files/adc.c: 93: ADCON0bits.GO_nDONE = 1; +[e = . . _ADCON0bits 1 1 -> -> 1 `i `uc ] +"94 +[; ;mcc_generated_files/adc.c: 94: } +[e :UE 541 ] +} +"97 +[; ;mcc_generated_files/adc.c: 97: _Bool ADC_IsConversionDone(void) +[v _ADC_IsConversionDone `(a ~T0 @X0 1 ef ] +"98 +[; ;mcc_generated_files/adc.c: 98: { +{ +[e :U _ADC_IsConversionDone ] +[f ] +"100 +[; ;mcc_generated_files/adc.c: 100: return ((_Bool)(!ADCON0bits.GO_nDONE)); +[e ) -> -> ! != -> . . _ADCON0bits 1 1 `i -> 0 `i `i `a ] +[e $UE 542 ] +"101 +[; ;mcc_generated_files/adc.c: 101: } +[e :UE 542 ] +} +"103 +[; ;mcc_generated_files/adc.c: 103: adc_result_t ADC_GetConversionResult(void) +[v _ADC_GetConversionResult `(us ~T0 @X0 1 ef ] +"104 +[; ;mcc_generated_files/adc.c: 104: { +{ +[e :U _ADC_GetConversionResult ] +[f ] +"106 +[; ;mcc_generated_files/adc.c: 106: return ((adc_result_t)((ADRESH << 8) + ADRESL)); +[e ) -> + << -> _ADRESH `i -> 8 `i -> _ADRESL `i `us ] +[e $UE 543 ] +"107 +[; ;mcc_generated_files/adc.c: 107: } +[e :UE 543 ] +} +"109 +[; ;mcc_generated_files/adc.c: 109: adc_result_t ADC_GetConversion(adc_channel_t channel) +[v _ADC_GetConversion `(us ~T0 @X0 1 ef1`E4918 ] +"110 +[; ;mcc_generated_files/adc.c: 110: { +{ +[e :U _ADC_GetConversion ] +"109 +[; ;mcc_generated_files/adc.c: 109: adc_result_t ADC_GetConversion(adc_channel_t channel) +[v _channel `E4918 ~T0 @X0 1 r1 ] +"110 +[; ;mcc_generated_files/adc.c: 110: { +[f ] +"112 +[; ;mcc_generated_files/adc.c: 112: ADCON0bits.CHS = channel; +[e = . . _ADCON0bits 1 2 -> _channel `uc ] +"115 +[; ;mcc_generated_files/adc.c: 115: ADCON0bits.ADON = 1; +[e = . . _ADCON0bits 1 0 -> -> 1 `i `uc ] +"118 +[; ;mcc_generated_files/adc.c: 118: ADCON0bits.GO_nDONE = 1; +[e = . . _ADCON0bits 1 1 -> -> 1 `i `uc ] +"121 +[; ;mcc_generated_files/adc.c: 121: while (ADCON0bits.GO_nDONE) +[e $U 545 ] +[e :U 546 ] +"122 +[; ;mcc_generated_files/adc.c: 122: { +{ +"123 +[; ;mcc_generated_files/adc.c: 123: } +} +[e :U 545 ] +"121 +[; ;mcc_generated_files/adc.c: 121: while (ADCON0bits.GO_nDONE) +[e $ != -> . . _ADCON0bits 1 1 `i -> 0 `i 546 ] +[e :U 547 ] +"126 +[; ;mcc_generated_files/adc.c: 126: return ((adc_result_t)((ADRESH << 8) + ADRESL)); +[e ) -> + << -> _ADRESH `i -> 8 `i -> _ADRESL `i `us ] +[e $UE 544 ] +"127 +[; ;mcc_generated_files/adc.c: 127: } +[e :UE 544 ] +} +"129 +[; ;mcc_generated_files/adc.c: 129: void ADC_TemperatureAcquisitionDelay(void) +[v _ADC_TemperatureAcquisitionDelay `(v ~T0 @X0 1 ef ] +"130 +[; ;mcc_generated_files/adc.c: 130: { +{ +[e :U _ADC_TemperatureAcquisitionDelay ] +[f ] +"131 +[; ;mcc_generated_files/adc.c: 131: _delay((unsigned long)((200)*(25000000/4000000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 25000000 `l `d .4000000.0 `ul ] +"132 +[; ;mcc_generated_files/adc.c: 132: } +[e :UE 548 ] +} diff --git a/solar_panel.X/build/default/production/mcc_generated_files/adc.p1.d b/solar_panel.X/build/default/production/mcc_generated_files/adc.p1.d new file mode 100644 index 0000000..d65e03f --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/adc.p1.d @@ -0,0 +1,4 @@ +build/default/production/mcc_generated_files/adc.p1: \ +mcc_generated_files/adc.c \ +mcc_generated_files/adc.h \ +mcc_generated_files/device_config.h diff --git a/solar_panel.X/build/default/production/mcc_generated_files/device_config.i b/solar_panel.X/build/default/production/mcc_generated_files/device_config.i new file mode 100644 index 0000000..425358e --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/device_config.i @@ -0,0 +1,39 @@ +# 1 "mcc_generated_files/device_config.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/device_config.c" 2 +# 50 "mcc_generated_files/device_config.c" +#pragma config WDT = OFF +#pragma config STVR = ON +#pragma config XINST = OFF +#pragma config DEBUG = OFF + + +#pragma config CP0 = OFF + + +#pragma config FOSC = HS +#pragma config FOSC2 = ON +#pragma config FCMEN = ON +#pragma config IESO = ON + + +#pragma config WDTPS = 32768 + + +#pragma config EASHFT = ON +#pragma config MODE = MM +#pragma config BW = 16 +#pragma config WAIT = OFF + + +#pragma config CCP2MX = ON +#pragma config ECCPMX = ON +#pragma config ETHLED = ON +# 76 "mcc_generated_files/device_config.c" + diff --git a/solar_panel.X/build/default/production/mcc_generated_files/device_config.p1 b/solar_panel.X/build/default/production/mcc_generated_files/device_config.p1 new file mode 100644 index 0000000..13c7034 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/device_config.p1 @@ -0,0 +1,36 @@ +Version 4.0 HI-TECH Software Intermediate Code +"50 mcc_generated_files/device_config.c +[p x WDT = OFF ] +"51 +[p x STVR = ON ] +"52 +[p x XINST = OFF ] +"53 +[p x DEBUG = OFF ] +"56 +[p x CP0 = OFF ] +"59 +[p x FOSC = HS ] +"60 +[p x FOSC2 = ON ] +"61 +[p x FCMEN = ON ] +"62 +[p x IESO = ON ] +"65 +[p x WDTPS = 32768 ] +"68 +[p x EASHFT = ON ] +"69 +[p x MODE = MM ] +"70 +[p x BW = 16 ] +"71 +[p x WAIT = OFF ] +"74 +[p x CCP2MX = ON ] +"75 +[p x ECCPMX = ON ] +"76 +[; ;mcc_generated_files/device_config.c: 76: +[p x ETHLED = ON ] diff --git a/solar_panel.X/build/default/production/mcc_generated_files/device_config.p1.d b/solar_panel.X/build/default/production/mcc_generated_files/device_config.p1.d new file mode 100644 index 0000000..c820398 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/device_config.p1.d @@ -0,0 +1,2 @@ +build/default/production/mcc_generated_files/device_config.p1: \ +mcc_generated_files/device_config.c diff --git a/solar_panel.X/build/default/production/mcc_generated_files/mcc.i b/solar_panel.X/build/default/production/mcc_generated_files/mcc.i new file mode 100644 index 0000000..c5bffa2 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/mcc.i @@ -0,0 +1,9058 @@ +# 1 "mcc_generated_files/mcc.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/mcc.c" 2 +# 47 "mcc_generated_files/mcc.c" +# 1 "mcc_generated_files/mcc.h" 1 +# 49 "mcc_generated_files/mcc.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 49 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/device_config.h" 1 +# 50 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/pin_manager.h" 1 +# 109 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 121 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 51 "mcc_generated_files/mcc.h" 2 + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdbool.h" 1 3 +# 53 "mcc_generated_files/mcc.h" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 1 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 1 3 +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 + + + + + +typedef void * va_list[1]; + + + + +typedef void * __isoc_va_list[1]; +# 137 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long ssize_t; +# 246 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long off_t; +# 399 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct _IO_FILE FILE; +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 2 3 +# 52 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +typedef union _G_fpos64_t { + char __opaque[16]; + double __align; +} fpos_t; + +extern FILE *const stdin; +extern FILE *const stdout; +extern FILE *const stderr; + + + + + +FILE *fopen(const char *restrict, const char *restrict); +FILE *freopen(const char *restrict, const char *restrict, FILE *restrict); +int fclose(FILE *); + +int remove(const char *); +int rename(const char *, const char *); + +int feof(FILE *); +int ferror(FILE *); +int fflush(FILE *); +void clearerr(FILE *); + +int fseek(FILE *, long, int); +long ftell(FILE *); +void rewind(FILE *); + +int fgetpos(FILE *restrict, fpos_t *restrict); +int fsetpos(FILE *, const fpos_t *); + +size_t fread(void *restrict, size_t, size_t, FILE *restrict); +size_t fwrite(const void *restrict, size_t, size_t, FILE *restrict); + +int fgetc(FILE *); +int getc(FILE *); +int getchar(void); +int ungetc(int, FILE *); + +int fputc(int, FILE *); +int putc(int, FILE *); +int putchar(int); + +char *fgets(char *restrict, int, FILE *restrict); + +char *gets(char *); + + +int fputs(const char *restrict, FILE *restrict); +int puts(const char *); + +__attribute__((__format__(__printf__, 1, 2))) +int printf(const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int fprintf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int sprintf(char *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 3, 4))) +int snprintf(char *restrict, size_t, const char *restrict, ...); + +__attribute__((__format__(__printf__, 1, 0))) +int vprintf(const char *restrict, __isoc_va_list); +int vfprintf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 2, 0))) +int vsprintf(char *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 3, 0))) +int vsnprintf(char *restrict, size_t, const char *restrict, __isoc_va_list); + +__attribute__((__format__(__scanf__, 1, 2))) +int scanf(const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int fscanf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int sscanf(const char *restrict, const char *restrict, ...); + +__attribute__((__format__(__scanf__, 1, 0))) +int vscanf(const char *restrict, __isoc_va_list); +int vfscanf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__scanf__, 2, 0))) +int vsscanf(const char *restrict, const char *restrict, __isoc_va_list); + +void perror(const char *); + +int setvbuf(FILE *restrict, char *restrict, int, size_t); +void setbuf(FILE *restrict, char *restrict); + +char *tmpnam(char *); +FILE *tmpfile(void); + + + + +FILE *fmemopen(void *restrict, size_t, const char *restrict); +FILE *open_memstream(char **, size_t *); +FILE *fdopen(int, const char *); +FILE *popen(const char *, const char *); +int pclose(FILE *); +int fileno(FILE *); +int fseeko(FILE *, off_t, int); +off_t ftello(FILE *); +int dprintf(int, const char *restrict, ...); +int vdprintf(int, const char *restrict, __isoc_va_list); +void flockfile(FILE *); +int ftrylockfile(FILE *); +void funlockfile(FILE *); +int getc_unlocked(FILE *); +int getchar_unlocked(void); +int putc_unlocked(int, FILE *); +int putchar_unlocked(int); +ssize_t getdelim(char **restrict, size_t *restrict, int, FILE *restrict); +ssize_t getline(char **restrict, size_t *restrict, FILE *restrict); +int renameat(int, const char *, int, const char *); +char *ctermid(char *); + + + + + + + +char *tempnam(const char *, const char *); +# 7 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\conio.h" 2 3 +# 54 "mcc_generated_files/mcc.h" 2 + +# 1 "mcc_generated_files/adc.h" 1 +# 72 "mcc_generated_files/adc.h" +typedef uint16_t adc_result_t; + + + + +typedef struct +{ + adc_result_t adcResult1; + adc_result_t adcResult2; +} adc_sync_double_result_t; +# 95 "mcc_generated_files/adc.h" +typedef enum +{ + channel_AN5 = 0x5, + channel_AN6 = 0x6 +} adc_channel_t; +# 134 "mcc_generated_files/adc.h" +void ADC_Initialize(void); +# 164 "mcc_generated_files/adc.h" +void ADC_SelectChannel(adc_channel_t channel); +# 191 "mcc_generated_files/adc.h" +void ADC_StartConversion(void); +# 223 "mcc_generated_files/adc.h" +_Bool ADC_IsConversionDone(void); +# 256 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversionResult(void); +# 286 "mcc_generated_files/adc.h" +adc_result_t ADC_GetConversion(adc_channel_t channel); +# 314 "mcc_generated_files/adc.h" +void ADC_TemperatureAcquisitionDelay(void); +# 55 "mcc_generated_files/mcc.h" 2 +# 70 "mcc_generated_files/mcc.h" +void SYSTEM_Initialize(void); +# 83 "mcc_generated_files/mcc.h" +void OSCILLATOR_Initialize(void); +# 47 "mcc_generated_files/mcc.c" 2 + + + +void SYSTEM_Initialize(void) +{ + + PIN_MANAGER_Initialize(); + OSCILLATOR_Initialize(); + ADC_Initialize(); +} + +void OSCILLATOR_Initialize(void) +{ + + OSCCON = 0x02; + + OSCTUNE = 0x00; +} diff --git a/solar_panel.X/build/default/production/mcc_generated_files/mcc.p1 b/solar_panel.X/build/default/production/mcc_generated_files/mcc.p1 new file mode 100644 index 0000000..391e7b8 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/mcc.p1 @@ -0,0 +1,925 @@ +Version 4.0 HI-TECH Software Intermediate Code +"109 mcc_generated_files/pin_manager.h +[; ;mcc_generated_files/pin_manager.h: 109: void PIN_MANAGER_Initialize (void); +[v _PIN_MANAGER_Initialize `(v ~T0 @X0 0 ef ] +"83 mcc_generated_files/mcc.h +[; ;mcc_generated_files/mcc.h: 83: void OSCILLATOR_Initialize(void); +[v _OSCILLATOR_Initialize `(v ~T0 @X0 0 ef ] +"134 mcc_generated_files/adc.h +[; ;mcc_generated_files/adc.h: 134: void ADC_Initialize(void); +[v _ADC_Initialize `(v ~T0 @X0 0 ef ] +"13762 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13762: extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); +[v _OSCCON `Vuc ~T0 @X0 0 e@4051 ] +"8941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8941: extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); +[v _OSCTUNE `Vuc ~T0 @X0 0 e@3995 ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"50 mcc_generated_files/mcc.c +[; ;mcc_generated_files/mcc.c: 50: void SYSTEM_Initialize(void) +[v _SYSTEM_Initialize `(v ~T0 @X0 1 ef ] +"51 +[; ;mcc_generated_files/mcc.c: 51: { +{ +[e :U _SYSTEM_Initialize ] +[f ] +"53 +[; ;mcc_generated_files/mcc.c: 53: PIN_MANAGER_Initialize(); +[e ( _PIN_MANAGER_Initialize .. ] +"54 +[; ;mcc_generated_files/mcc.c: 54: OSCILLATOR_Initialize(); +[e ( _OSCILLATOR_Initialize .. ] +"55 +[; ;mcc_generated_files/mcc.c: 55: ADC_Initialize(); +[e ( _ADC_Initialize .. ] +"56 +[; ;mcc_generated_files/mcc.c: 56: } +[e :UE 541 ] +} +"58 +[; ;mcc_generated_files/mcc.c: 58: void OSCILLATOR_Initialize(void) +[v _OSCILLATOR_Initialize `(v ~T0 @X0 1 ef ] +"59 +[; ;mcc_generated_files/mcc.c: 59: { +{ +[e :U _OSCILLATOR_Initialize ] +[f ] +"61 +[; ;mcc_generated_files/mcc.c: 61: OSCCON = 0x02; +[e = _OSCCON -> -> 2 `i `uc ] +"63 +[; ;mcc_generated_files/mcc.c: 63: OSCTUNE = 0x00; +[e = _OSCTUNE -> -> 0 `i `uc ] +"64 +[; ;mcc_generated_files/mcc.c: 64: } +[e :UE 542 ] +} diff --git a/solar_panel.X/build/default/production/mcc_generated_files/mcc.p1.d b/solar_panel.X/build/default/production/mcc_generated_files/mcc.p1.d new file mode 100644 index 0000000..dcec267 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/mcc.p1.d @@ -0,0 +1,6 @@ +build/default/production/mcc_generated_files/mcc.p1: \ +mcc_generated_files/mcc.c \ +mcc_generated_files/mcc.h \ +mcc_generated_files/device_config.h \ +mcc_generated_files/pin_manager.h \ +mcc_generated_files/adc.h diff --git a/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.i b/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.i new file mode 100644 index 0000000..3512034 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.i @@ -0,0 +1,8885 @@ +# 1 "mcc_generated_files/pin_manager.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "mcc_generated_files/pin_manager.c" 2 +# 47 "mcc_generated_files/pin_manager.c" +# 1 "mcc_generated_files/pin_manager.h" 1 +# 56 "mcc_generated_files/pin_manager.h" +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 18 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 168 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __int24 int24_t; +# 204 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef __uint24 uint24_t; +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\xc8debug.h" 2 3 + + + + + + + + +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 24 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; +# 173 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; +# 209 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\builtins.h" 2 3 + + +#pragma intrinsic(__nop) +extern void __nop(void); + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(uint32_t); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(uint32_t); + +#pragma intrinsic(_delay3) +extern __attribute__((nonreentrant)) void _delay3(uint8_t); +# 25 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 + + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 1 3 + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 1 3 +# 5 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\htc.h" 2 3 +# 6 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 1 3 +# 485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 1 3 +# 45 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\__at.h" 1 3 +# 46 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 2 3 + + + + + + + +extern volatile unsigned char MAADR5 __attribute__((address(0xE80))); + +__asm("MAADR5 equ 0E80h"); + + + + +extern volatile unsigned char MAADR6 __attribute__((address(0xE81))); + +__asm("MAADR6 equ 0E81h"); + + + + +extern volatile unsigned char MAADR3 __attribute__((address(0xE82))); + +__asm("MAADR3 equ 0E82h"); + + + + +extern volatile unsigned char MAADR4 __attribute__((address(0xE83))); + +__asm("MAADR4 equ 0E83h"); + + + + +extern volatile unsigned char MAADR1 __attribute__((address(0xE84))); + +__asm("MAADR1 equ 0E84h"); + + + + +extern volatile unsigned char MAADR2 __attribute__((address(0xE85))); + +__asm("MAADR2 equ 0E85h"); + + + + +extern volatile unsigned char MISTAT __attribute__((address(0xE8A))); + +__asm("MISTAT equ 0E8Ah"); + + +typedef union { + struct { + unsigned BUSY :1; + unsigned SCAN :1; + unsigned NVALID :1; + unsigned :1; + }; +} MISTATbits_t; +extern volatile MISTATbits_t MISTATbits __attribute__((address(0xE8A))); +# 128 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EFLOCON __attribute__((address(0xE97))); + +__asm("EFLOCON equ 0E97h"); + + +typedef union { + struct { + unsigned FCEN0 :1; + unsigned FCEN1 :1; + unsigned FULDPXS :1; + }; +} EFLOCONbits_t; +extern volatile EFLOCONbits_t EFLOCONbits __attribute__((address(0xE97))); +# 160 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short EPAUS __attribute__((address(0xE98))); + +__asm("EPAUS equ 0E98h"); + + + + +extern volatile unsigned char EPAUSL __attribute__((address(0xE98))); + +__asm("EPAUSL equ 0E98h"); + + + + +extern volatile unsigned char EPAUSH __attribute__((address(0xE99))); + +__asm("EPAUSH equ 0E99h"); + + + + +extern volatile unsigned char MACON1 __attribute__((address(0xEA0))); + +__asm("MACON1 equ 0EA0h"); + + +typedef union { + struct { + unsigned MARXEN :1; + unsigned PASSALL :1; + unsigned RXPAUS :1; + unsigned TXPAUS :1; + }; +} MACON1bits_t; +extern volatile MACON1bits_t MACON1bits __attribute__((address(0xEA0))); +# 219 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON3 __attribute__((address(0xEA2))); + +__asm("MACON3 equ 0EA2h"); + + +typedef union { + struct { + unsigned FULDPX :1; + unsigned FRMLNEN :1; + unsigned HFRMEN :1; + unsigned PHDREN :1; + unsigned TXCRCEN :1; + unsigned PADCFG0 :1; + unsigned PADCFG1 :1; + unsigned PADCFG2 :1; + }; + struct { + unsigned :5; + unsigned PADCFG :3; + }; +} MACON3bits_t; +extern volatile MACON3bits_t MACON3bits __attribute__((address(0xEA2))); +# 290 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MACON4 __attribute__((address(0xEA3))); + +__asm("MACON4 equ 0EA3h"); + + +typedef union { + struct { + unsigned :5; + unsigned :1; + unsigned DEFER :1; + }; +} MACON4bits_t; +extern volatile MACON4bits_t MACON4bits __attribute__((address(0xEA3))); +# 312 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MABBIPG __attribute__((address(0xEA4))); + +__asm("MABBIPG equ 0EA4h"); + + +typedef union { + struct { + unsigned BBIPG0 :1; + unsigned BBIPG1 :1; + unsigned BBIPG2 :1; + unsigned BBIPG3 :1; + unsigned BBIPG4 :1; + unsigned BBIPG5 :1; + unsigned BBIPG6 :1; + }; +} MABBIPGbits_t; +extern volatile MABBIPGbits_t MABBIPGbits __attribute__((address(0xEA4))); +# 368 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short MAIPG __attribute__((address(0xEA6))); + +__asm("MAIPG equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGL __attribute__((address(0xEA6))); + +__asm("MAIPGL equ 0EA6h"); + + + + +extern volatile unsigned char MAIPGH __attribute__((address(0xEA7))); + +__asm("MAIPGH equ 0EA7h"); + + + + +extern volatile unsigned short MAMXFL __attribute__((address(0xEAA))); + +__asm("MAMXFL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLL __attribute__((address(0xEAA))); + +__asm("MAMXFLL equ 0EAAh"); + + + + +extern volatile unsigned char MAMXFLH __attribute__((address(0xEAB))); + +__asm("MAMXFLH equ 0EABh"); + + + + +extern volatile unsigned char MICMD __attribute__((address(0xEB2))); + +__asm("MICMD equ 0EB2h"); + + +typedef union { + struct { + unsigned MIIRD :1; + unsigned MIISCAN :1; + }; +} MICMDbits_t; +extern volatile MICMDbits_t MICMDbits __attribute__((address(0xEB2))); +# 436 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MIREGADR __attribute__((address(0xEB4))); + +__asm("MIREGADR equ 0EB4h"); + + + + +extern volatile unsigned short MIWR __attribute__((address(0xEB6))); + +__asm("MIWR equ 0EB6h"); + + + + +extern volatile unsigned char MIWRL __attribute__((address(0xEB6))); + +__asm("MIWRL equ 0EB6h"); + + + + +extern volatile unsigned char MIWRH __attribute__((address(0xEB7))); + +__asm("MIWRH equ 0EB7h"); + + + + +extern volatile unsigned short MIRD __attribute__((address(0xEB8))); + +__asm("MIRD equ 0EB8h"); + + + + +extern volatile unsigned char MIRDL __attribute__((address(0xEB8))); + +__asm("MIRDL equ 0EB8h"); + + + + +extern volatile unsigned char MIRDH __attribute__((address(0xEB9))); + +__asm("MIRDH equ 0EB9h"); + + + + +extern volatile unsigned char EHT0 __attribute__((address(0xEC0))); + +__asm("EHT0 equ 0EC0h"); + + + + +extern volatile unsigned char EHT1 __attribute__((address(0xEC1))); + +__asm("EHT1 equ 0EC1h"); + + + + +extern volatile unsigned char EHT2 __attribute__((address(0xEC2))); + +__asm("EHT2 equ 0EC2h"); + + + + +extern volatile unsigned char EHT3 __attribute__((address(0xEC3))); + +__asm("EHT3 equ 0EC3h"); + + + + +extern volatile unsigned char EHT4 __attribute__((address(0xEC4))); + +__asm("EHT4 equ 0EC4h"); + + + + +extern volatile unsigned char EHT5 __attribute__((address(0xEC5))); + +__asm("EHT5 equ 0EC5h"); + + + + +extern volatile unsigned char EHT6 __attribute__((address(0xEC6))); + +__asm("EHT6 equ 0EC6h"); + + + + +extern volatile unsigned char EHT7 __attribute__((address(0xEC7))); + +__asm("EHT7 equ 0EC7h"); + + + + +extern volatile unsigned char EPMM0 __attribute__((address(0xEC8))); + +__asm("EPMM0 equ 0EC8h"); + + + + +extern volatile unsigned char EPMM1 __attribute__((address(0xEC9))); + +__asm("EPMM1 equ 0EC9h"); + + + + +extern volatile unsigned char EPMM2 __attribute__((address(0xECA))); + +__asm("EPMM2 equ 0ECAh"); + + + + +extern volatile unsigned char EPMM3 __attribute__((address(0xECB))); + +__asm("EPMM3 equ 0ECBh"); + + + + +extern volatile unsigned char EPMM4 __attribute__((address(0xECC))); + +__asm("EPMM4 equ 0ECCh"); + + + + +extern volatile unsigned char EPMM5 __attribute__((address(0xECD))); + +__asm("EPMM5 equ 0ECDh"); + + + + +extern volatile unsigned char EPMM6 __attribute__((address(0xECE))); + +__asm("EPMM6 equ 0ECEh"); + + + + +extern volatile unsigned char EPMM7 __attribute__((address(0xECF))); + +__asm("EPMM7 equ 0ECFh"); + + + + +extern volatile unsigned short EPMCS __attribute__((address(0xED0))); + +__asm("EPMCS equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSL __attribute__((address(0xED0))); + +__asm("EPMCSL equ 0ED0h"); + + + + +extern volatile unsigned char EPMCSH __attribute__((address(0xED1))); + +__asm("EPMCSH equ 0ED1h"); + + + + +extern volatile unsigned short EPMO __attribute__((address(0xED4))); + +__asm("EPMO equ 0ED4h"); + + + + +extern volatile unsigned char EPMOL __attribute__((address(0xED4))); + +__asm("EPMOL equ 0ED4h"); + + + + +extern volatile unsigned char EPMOH __attribute__((address(0xED5))); + +__asm("EPMOH equ 0ED5h"); + + + + +extern volatile unsigned char ERXFCON __attribute__((address(0xED8))); + +__asm("ERXFCON equ 0ED8h"); + + +typedef union { + struct { + unsigned BCEN :1; + unsigned MCEN :1; + unsigned HTEN :1; + unsigned MPEN :1; + unsigned PMEN :1; + unsigned CRCEN :1; + unsigned ANDOR :1; + unsigned UCEN :1; + }; +} ERXFCONbits_t; +extern volatile ERXFCONbits_t ERXFCONbits __attribute__((address(0xED8))); +# 701 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EPKTCNT __attribute__((address(0xED9))); + +__asm("EPKTCNT equ 0ED9h"); + + + + +extern volatile unsigned short EWRPT __attribute__((address(0xEE2))); + +__asm("EWRPT equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTL __attribute__((address(0xEE2))); + +__asm("EWRPTL equ 0EE2h"); + + + + +extern volatile unsigned char EWRPTH __attribute__((address(0xEE3))); + +__asm("EWRPTH equ 0EE3h"); + + + + +extern volatile unsigned short ETXST __attribute__((address(0xEE4))); + +__asm("ETXST equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTL __attribute__((address(0xEE4))); + +__asm("ETXSTL equ 0EE4h"); + + + + +extern volatile unsigned char ETXSTH __attribute__((address(0xEE5))); + +__asm("ETXSTH equ 0EE5h"); + + + + +extern volatile unsigned short ETXND __attribute__((address(0xEE6))); + +__asm("ETXND equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDL __attribute__((address(0xEE6))); + +__asm("ETXNDL equ 0EE6h"); + + + + +extern volatile unsigned char ETXNDH __attribute__((address(0xEE7))); + +__asm("ETXNDH equ 0EE7h"); + + + + +extern volatile unsigned short ERXST __attribute__((address(0xEE8))); + +__asm("ERXST equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTL __attribute__((address(0xEE8))); + +__asm("ERXSTL equ 0EE8h"); + + + + +extern volatile unsigned char ERXSTH __attribute__((address(0xEE9))); + +__asm("ERXSTH equ 0EE9h"); + + + + +extern volatile unsigned short ERXND __attribute__((address(0xEEA))); + +__asm("ERXND equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDL __attribute__((address(0xEEA))); + +__asm("ERXNDL equ 0EEAh"); + + + + +extern volatile unsigned char ERXNDH __attribute__((address(0xEEB))); + +__asm("ERXNDH equ 0EEBh"); + + + + +extern volatile unsigned short ERXRDPT __attribute__((address(0xEEC))); + +__asm("ERXRDPT equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTL __attribute__((address(0xEEC))); + +__asm("ERXRDPTL equ 0EECh"); + + + + +extern volatile unsigned char ERXRDPTH __attribute__((address(0xEED))); + +__asm("ERXRDPTH equ 0EEDh"); + + + + +extern volatile unsigned short ERXWRPT __attribute__((address(0xEEE))); + +__asm("ERXWRPT equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTL __attribute__((address(0xEEE))); + +__asm("ERXWRPTL equ 0EEEh"); + + + + +extern volatile unsigned char ERXWRPTH __attribute__((address(0xEEF))); + +__asm("ERXWRPTH equ 0EEFh"); + + + + +extern volatile unsigned short EDMAST __attribute__((address(0xEF0))); + +__asm("EDMAST equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTL __attribute__((address(0xEF0))); + +__asm("EDMASTL equ 0EF0h"); + + + + +extern volatile unsigned char EDMASTH __attribute__((address(0xEF1))); + +__asm("EDMASTH equ 0EF1h"); + + + + +extern volatile unsigned short EDMAND __attribute__((address(0xEF2))); + +__asm("EDMAND equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDL __attribute__((address(0xEF2))); + +__asm("EDMANDL equ 0EF2h"); + + + + +extern volatile unsigned char EDMANDH __attribute__((address(0xEF3))); + +__asm("EDMANDH equ 0EF3h"); + + + + +extern volatile unsigned short EDMADST __attribute__((address(0xEF4))); + +__asm("EDMADST equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTL __attribute__((address(0xEF4))); + +__asm("EDMADSTL equ 0EF4h"); + + + + +extern volatile unsigned char EDMADSTH __attribute__((address(0xEF5))); + +__asm("EDMADSTH equ 0EF5h"); + + + + +extern volatile unsigned short EDMACS __attribute__((address(0xEF6))); + +__asm("EDMACS equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSL __attribute__((address(0xEF6))); + +__asm("EDMACSL equ 0EF6h"); + + + + +extern volatile unsigned char EDMACSH __attribute__((address(0xEF7))); + +__asm("EDMACSH equ 0EF7h"); + + + + +extern volatile unsigned char EIE __attribute__((address(0xEFB))); + +__asm("EIE equ 0EFBh"); + + +typedef union { + struct { + unsigned RXERIE :1; + unsigned TXERIE :1; + unsigned :1; + unsigned TXIE :1; + unsigned LINKIE :1; + unsigned DMAIE :1; + unsigned PKTIE :1; + }; + struct { + unsigned :3; + unsigned ETXIE :1; + }; +} EIEbits_t; +extern volatile EIEbits_t EIEbits __attribute__((address(0xEFB))); +# 999 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ESTAT __attribute__((address(0xEFD))); + +__asm("ESTAT equ 0EFDh"); + + +typedef union { + struct { + unsigned PHYRDY :1; + unsigned TXABRT :1; + unsigned RXBUSY :1; + unsigned :2; + unsigned :1; + unsigned BUFER :1; + }; +} ESTATbits_t; +extern volatile ESTATbits_t ESTATbits __attribute__((address(0xEFD))); +# 1039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON2 __attribute__((address(0xEFE))); + +__asm("ECON2 equ 0EFEh"); + + +typedef union { + struct { + unsigned :5; + unsigned ETHEN :1; + unsigned PKTDEC :1; + unsigned AUTOINC :1; + }; +} ECON2bits_t; +extern volatile ECON2bits_t ECON2bits __attribute__((address(0xEFE))); +# 1072 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EIR __attribute__((address(0xF60))); + +__asm("EIR equ 0F60h"); + + +typedef union { + struct { + unsigned RXERIF :1; + unsigned TXERIF :1; + unsigned :1; + unsigned TXIF :1; + unsigned LINKIF :1; + unsigned DMAIF :1; + unsigned PKTIF :1; + }; + struct { + unsigned :3; + unsigned ETXIF :1; + }; +} EIRbits_t; +extern volatile EIRbits_t EIRbits __attribute__((address(0xF60))); +# 1132 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EDATA __attribute__((address(0xF61))); + +__asm("EDATA equ 0F61h"); + + +typedef union { + struct { + unsigned EDATA0 :1; + unsigned EDATA1 :1; + unsigned EDATA2 :1; + unsigned EDATA3 :1; + unsigned EDATA4 :1; + unsigned EDATA5 :1; + unsigned EDATA6 :1; + unsigned EDATA7 :1; + }; +} EDATAbits_t; +extern volatile EDATAbits_t EDATAbits __attribute__((address(0xF61))); +# 1194 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON2 __attribute__((address(0xF62))); + +__asm("SSP2CON2 equ 0F62h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN2 :1; + unsigned RSEN2 :1; + unsigned PEN2 :1; + unsigned RCEN2 :1; + unsigned ACKEN2 :1; + unsigned ACKDT2 :1; + unsigned ACKSTAT2 :1; + unsigned GCEN2 :1; + }; + struct { + unsigned :1; + unsigned ADMSK12 :1; + unsigned ADMSK22 :1; + unsigned ADMSK32 :1; + unsigned ADMSK42 :1; + unsigned ADMSK52 :1; + }; +} SSP2CON2bits_t; +extern volatile SSP2CON2bits_t SSP2CON2bits __attribute__((address(0xF62))); +# 1381 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2CON1 __attribute__((address(0xF63))); + +__asm("SSP2CON1 equ 0F63h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM02 :1; + unsigned SSPM12 :1; + unsigned SSPM22 :1; + unsigned SSPM32 :1; + unsigned CKP2 :1; + unsigned SSPEN2 :1; + unsigned SSPOV2 :1; + unsigned WCOL2 :1; + }; +} SSP2CON1bits_t; +extern volatile SSP2CON1bits_t SSP2CON1bits __attribute__((address(0xF63))); +# 1501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2STAT __attribute__((address(0xF64))); + +__asm("SSP2STAT equ 0F64h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF2 :1; + unsigned UA2 :1; + unsigned RW2 :1; + unsigned START2 :1; + unsigned STOP2 :1; + unsigned DA2 :1; + unsigned CKE2 :1; + unsigned SMP2 :1; + }; + struct { + unsigned :2; + unsigned I2C_READ2 :1; + unsigned I2C_START2 :1; + unsigned I2C_STOP2 :1; + unsigned DATA_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE2 :1; + unsigned S2 :1; + unsigned P2 :1; + unsigned D_A2 :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned R_W2 :1; + unsigned :2; + unsigned D_nA2 :1; + }; + struct { + unsigned :2; + unsigned R_NOT_W2 :1; + }; + struct { + unsigned :2; + unsigned R_nW2 :1; + unsigned :2; + unsigned I2C_DAT2 :1; + }; + struct { + unsigned :2; + unsigned NOT_W2 :1; + }; + struct { + unsigned :5; + unsigned NOT_A2 :1; + }; + struct { + unsigned :2; + unsigned nW2 :1; + unsigned :2; + unsigned nA2 :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE2 :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS2 :1; + }; + struct { + unsigned :2; + unsigned nWRITE2 :1; + unsigned :2; + unsigned nADDRESS2 :1; + }; +} SSP2STATbits_t; +extern volatile SSP2STATbits_t SSP2STATbits __attribute__((address(0xF64))); +# 1928 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2ADD __attribute__((address(0xF65))); + +__asm("SSP2ADD equ 0F65h"); + + +typedef union { + struct { + unsigned MSK02 :1; + unsigned MSK12 :1; + unsigned MSK22 :1; + unsigned MSK32 :1; + unsigned MSK42 :1; + unsigned MSK52 :1; + unsigned MSK62 :1; + unsigned MSK72 :1; + }; +} SSP2ADDbits_t; +extern volatile SSP2ADDbits_t SSP2ADDbits __attribute__((address(0xF65))); +# 1990 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP2BUF __attribute__((address(0xF66))); + +__asm("SSP2BUF equ 0F66h"); + + + + +extern volatile unsigned char ECCP2DEL __attribute__((address(0xF67))); + +__asm("ECCP2DEL equ 0F67h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P2DC0 :1; + unsigned P2DC1 :1; + unsigned P2DC2 :1; + unsigned P2DC3 :1; + unsigned P2DC4 :1; + unsigned P2DC5 :1; + unsigned P2DC6 :1; + unsigned P2RSEN :1; + }; +} ECCP2DELbits_t; +extern volatile ECCP2DELbits_t ECCP2DELbits __attribute__((address(0xF67))); +# 2117 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP2AS __attribute__((address(0xF68))); + +__asm("ECCP2AS equ 0F68h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS2BD0 :1; + unsigned PSS2BD1 :1; + unsigned PSS2AC0 :1; + unsigned PSS2AC1 :1; + unsigned ECCP2AS0 :1; + unsigned ECCP2AS1 :1; + unsigned ECCP2AS2 :1; + unsigned ECCP2ASE :1; + }; +} ECCP2ASbits_t; +extern volatile ECCP2ASbits_t ECCP2ASbits __attribute__((address(0xF68))); +# 2249 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3DEL __attribute__((address(0xF69))); + +__asm("ECCP3DEL equ 0F69h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P3DC0 :1; + unsigned P3DC1 :1; + unsigned P3DC2 :1; + unsigned P3DC3 :1; + unsigned P3DC4 :1; + unsigned P3DC5 :1; + unsigned P3DC6 :1; + unsigned P3RSEN :1; + }; +} ECCP3DELbits_t; +extern volatile ECCP3DELbits_t ECCP3DELbits __attribute__((address(0xF69))); +# 2369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP3AS __attribute__((address(0xF6A))); + +__asm("ECCP3AS equ 0F6Ah"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS3BD0 :1; + unsigned PSS3BD1 :1; + unsigned PSS3AC0 :1; + unsigned PSS3AC1 :1; + unsigned ECCP3AS0 :1; + unsigned ECCP3AS1 :1; + unsigned ECCP3AS2 :1; + unsigned ECCP3ASE :1; + }; +} ECCP3ASbits_t; +extern volatile ECCP3ASbits_t ECCP3ASbits __attribute__((address(0xF6A))); +# 2501 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char RCSTA2 __attribute__((address(0xF6B))); + +__asm("RCSTA2 equ 0F6Bh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D2 :1; + unsigned OERR2 :1; + unsigned FERR2 :1; + unsigned ADDEN2 :1; + unsigned CREN2 :1; + unsigned SREN2 :1; + unsigned RX92 :1; + unsigned SPEN2 :1; + }; + struct { + unsigned RCD82 :1; + unsigned :5; + unsigned RC8_92 :1; + }; + struct { + unsigned :6; + unsigned RC92 :1; + }; +} RCSTA2bits_t; +extern volatile RCSTA2bits_t RCSTA2bits __attribute__((address(0xF6B))); +# 2679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA2 __attribute__((address(0xF6C))); + +__asm("TXSTA2 equ 0F6Ch"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D2 :1; + unsigned TRMT2 :1; + unsigned BRGH2 :1; + unsigned SENDB2 :1; + unsigned SYNC2 :1; + unsigned TXEN2 :1; + unsigned TX92 :1; + unsigned CSRC2 :1; + }; + struct { + unsigned TXD82 :1; + unsigned :5; + unsigned TX8_92 :1; + }; +} TXSTA2bits_t; +extern volatile TXSTA2bits_t TXSTA2bits __attribute__((address(0xF6C))); +# 2839 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG2 __attribute__((address(0xF6D))); + +__asm("TXREG2 equ 0F6Dh"); + + + + +extern volatile unsigned char RCREG2 __attribute__((address(0xF6E))); + +__asm("RCREG2 equ 0F6Eh"); + + + + +extern volatile unsigned char SPBRG2 __attribute__((address(0xF6F))); + +__asm("SPBRG2 equ 0F6Fh"); + + + + +extern volatile unsigned char CCP5CON __attribute__((address(0xF70))); + +__asm("CCP5CON equ 0F70h"); + + +typedef union { + struct { + unsigned CCP5M :4; + unsigned DC5B :2; + }; + struct { + unsigned CCP5M0 :1; + unsigned CCP5M1 :1; + unsigned CCP5M2 :1; + unsigned CCP5M3 :1; + unsigned CCP5Y :1; + unsigned CCP5X :1; + }; + struct { + unsigned :4; + unsigned DC5B0 :1; + unsigned DC5B1 :1; + }; +} CCP5CONbits_t; +extern volatile CCP5CONbits_t CCP5CONbits __attribute__((address(0xF70))); +# 2939 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR5 __attribute__((address(0xF71))); + +__asm("CCPR5 equ 0F71h"); + + + + +extern volatile unsigned char CCPR5L __attribute__((address(0xF71))); + +__asm("CCPR5L equ 0F71h"); + + + + +extern volatile unsigned char CCPR5H __attribute__((address(0xF72))); + +__asm("CCPR5H equ 0F72h"); + + + + +extern volatile unsigned char CCP4CON __attribute__((address(0xF73))); + +__asm("CCP4CON equ 0F73h"); + + +typedef union { + struct { + unsigned CCP4M :4; + unsigned DC4B :2; + }; + struct { + unsigned CCP4M0 :1; + unsigned CCP4M1 :1; + unsigned CCP4M2 :1; + unsigned CCP4M3 :1; + unsigned DC4B0 :1; + unsigned DC4B1 :1; + }; + struct { + unsigned :4; + unsigned CCP4Y :1; + unsigned CCP4X :1; + }; +} CCP4CONbits_t; +extern volatile CCP4CONbits_t CCP4CONbits __attribute__((address(0xF73))); +# 3039 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR4 __attribute__((address(0xF74))); + +__asm("CCPR4 equ 0F74h"); + + + + +extern volatile unsigned char CCPR4L __attribute__((address(0xF74))); + +__asm("CCPR4L equ 0F74h"); + + + + +extern volatile unsigned char CCPR4H __attribute__((address(0xF75))); + +__asm("CCPR4H equ 0F75h"); + + + + +extern volatile unsigned char T4CON __attribute__((address(0xF76))); + +__asm("T4CON equ 0F76h"); + + +typedef union { + struct { + unsigned T4CKPS :2; + unsigned TMR4ON :1; + unsigned T4OUTPS :4; + }; + struct { + unsigned T4CKPS0 :1; + unsigned T4CKPS1 :1; + unsigned :1; + unsigned T4OUTPS0 :1; + unsigned T4OUTPS1 :1; + unsigned T4OUTPS2 :1; + unsigned T4OUTPS3 :1; + }; +} T4CONbits_t; +extern volatile T4CONbits_t T4CONbits __attribute__((address(0xF76))); +# 3131 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR4 __attribute__((address(0xF77))); + +__asm("PR4 equ 0F77h"); + + + + +extern volatile unsigned char TMR4 __attribute__((address(0xF78))); + +__asm("TMR4 equ 0F78h"); + + + + +extern volatile unsigned char ECCP1DEL __attribute__((address(0xF79))); + +__asm("ECCP1DEL equ 0F79h"); + + +typedef union { + struct { + unsigned PDC :7; + unsigned PRSEN :1; + }; + struct { + unsigned PDC0 :1; + unsigned PDC1 :1; + unsigned PDC2 :1; + unsigned PDC3 :1; + unsigned PDC4 :1; + unsigned PDC5 :1; + unsigned PDC6 :1; + }; + struct { + unsigned P1DC0 :1; + unsigned P1DC1 :1; + unsigned P1DC2 :1; + unsigned P1DC3 :1; + unsigned P1DC4 :1; + unsigned P1DC5 :1; + unsigned P1DC6 :1; + unsigned P1RSEN :1; + }; +} ECCP1DELbits_t; +extern volatile ECCP1DELbits_t ECCP1DELbits __attribute__((address(0xF79))); +# 3265 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ERDPT __attribute__((address(0xF7A))); + +__asm("ERDPT equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTL __attribute__((address(0xF7A))); + +__asm("ERDPTL equ 0F7Ah"); + + + + +extern volatile unsigned char ERDPTH __attribute__((address(0xF7B))); + +__asm("ERDPTH equ 0F7Bh"); + + + + +extern volatile unsigned char BAUDCON2 __attribute__((address(0xF7C))); + +__asm("BAUDCON2 equ 0F7Ch"); + + +extern volatile unsigned char BAUDCTL2 __attribute__((address(0xF7C))); + +__asm("BAUDCTL2 equ 0F7Ch"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCON2bits_t; +extern volatile BAUDCON2bits_t BAUDCON2bits __attribute__((address(0xF7C))); +# 3428 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN2 :1; + unsigned WUE2 :1; + unsigned :1; + unsigned BRG162 :1; + unsigned TXCKP2 :1; + unsigned RXDTP2 :1; + unsigned RCIDL2 :1; + unsigned ABDOVF2 :1; + }; + struct { + unsigned :4; + unsigned SCKP2 :1; + unsigned DTRXP2 :1; + unsigned RCMT2 :1; + }; +} BAUDCTL2bits_t; +extern volatile BAUDCTL2bits_t BAUDCTL2bits __attribute__((address(0xF7C))); +# 3562 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH2 __attribute__((address(0xF7D))); + +__asm("SPBRGH2 equ 0F7Dh"); + + + + +extern volatile unsigned char BAUDCON1 __attribute__((address(0xF7E))); + +__asm("BAUDCON1 equ 0F7Eh"); + + +extern volatile unsigned char BAUDCON __attribute__((address(0xF7E))); + +__asm("BAUDCON equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL __attribute__((address(0xF7E))); + +__asm("BAUDCTL equ 0F7Eh"); + +extern volatile unsigned char BAUDCTL1 __attribute__((address(0xF7E))); + +__asm("BAUDCTL1 equ 0F7Eh"); + + +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCON1bits_t; +extern volatile BAUDCON1bits_t BAUDCON1bits __attribute__((address(0xF7E))); +# 3752 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCONbits_t; +extern volatile BAUDCONbits_t BAUDCONbits __attribute__((address(0xF7E))); +# 3916 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTLbits_t; +extern volatile BAUDCTLbits_t BAUDCTLbits __attribute__((address(0xF7E))); +# 4080 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned ABDEN :1; + unsigned WUE :1; + unsigned :1; + unsigned BRG16 :1; + unsigned TXCKP :1; + unsigned RXDTP :1; + unsigned RCIDL :1; + unsigned ABDOVF :1; + }; + struct { + unsigned :4; + unsigned SCKP :1; + unsigned :1; + unsigned RCMT :1; + }; + struct { + unsigned ABDEN1 :1; + unsigned WUE1 :1; + unsigned :1; + unsigned BRG161 :1; + unsigned CKTXP :1; + unsigned DTRXP :1; + unsigned RCIDL1 :1; + unsigned ABDOVF1 :1; + }; + struct { + unsigned :4; + unsigned SCKP1 :1; + unsigned DTRXP1 :1; + unsigned RCMT1 :1; + }; + struct { + unsigned :4; + unsigned TXCKP1 :1; + unsigned RXDTP1 :1; + }; + struct { + unsigned :5; + unsigned RXCKP :1; + }; + struct { + unsigned :1; + unsigned W4E :1; + }; +} BAUDCTL1bits_t; +extern volatile BAUDCTL1bits_t BAUDCTL1bits __attribute__((address(0xF7E))); +# 4247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SPBRGH1 __attribute__((address(0xF7F))); + +__asm("SPBRGH1 equ 0F7Fh"); + + +extern volatile unsigned char SPBRGH __attribute__((address(0xF7F))); + +__asm("SPBRGH equ 0F7Fh"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0xF80))); + +__asm("PORTA equ 0F80h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + unsigned :1; + unsigned RJPU :1; + }; + struct { + unsigned AN0 :1; + unsigned AN1 :1; + unsigned AN2 :1; + unsigned AN3 :1; + unsigned T0CKI :1; + unsigned AN4 :1; + }; + struct { + unsigned LEDA :1; + unsigned LEDB :1; + unsigned VREFM :1; + unsigned VREFP :1; + }; + struct { + unsigned ULPWUIN :1; + unsigned :4; + unsigned LVDIN :1; + unsigned :1; + unsigned RA7 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0xF80))); +# 4402 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0xF81))); + +__asm("PORTB equ 0F81h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; + struct { + unsigned INT0 :1; + unsigned INT1 :1; + unsigned INT2 :1; + unsigned INT3 :1; + unsigned KBI0 :1; + unsigned KBI1 :1; + unsigned KBI2 :1; + unsigned KBI3 :1; + }; + struct { + unsigned FLT0 :1; + unsigned :2; + unsigned CCP2 :1; + unsigned :2; + unsigned PGC :1; + unsigned PGD :1; + }; + struct { + unsigned :3; + unsigned ECCP2 :1; + }; + struct { + unsigned :3; + unsigned CCP2_PA2 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0xF81))); +# 4560 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0xF82))); + +__asm("PORTC equ 0F82h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; + struct { + unsigned T1OSO :1; + unsigned T1OSI :1; + unsigned CCP1 :1; + unsigned SCK :1; + unsigned SDI :1; + unsigned SDO :1; + unsigned TX :1; + unsigned RX :1; + }; + struct { + unsigned T13CKI :1; + unsigned CCP2 :1; + unsigned :1; + unsigned SCL :1; + unsigned SDA :1; + unsigned :1; + unsigned CK :1; + unsigned DT :1; + }; + struct { + unsigned :1; + unsigned ECCP2 :1; + unsigned ECCP1 :1; + unsigned SCK1 :1; + unsigned SDI1 :1; + unsigned SDO1 :1; + unsigned TX1 :1; + unsigned RX1 :1; + }; + struct { + unsigned :3; + unsigned SCL1 :1; + unsigned SDA1 :1; + unsigned :1; + unsigned CK1 :1; + unsigned DT1 :1; + }; + struct { + unsigned :1; + unsigned PA2 :1; + unsigned PA1 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0xF82))); +# 4800 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0xF83))); + +__asm("PORTD equ 0F83h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; + struct { + unsigned PSP0 :1; + unsigned PSP1 :1; + unsigned PSP2 :1; + unsigned PSP3 :1; + unsigned PSP4 :1; + unsigned PSP5 :1; + unsigned PSP6 :1; + unsigned PSP7 :1; + }; + struct { + unsigned AD0 :1; + unsigned AD1 :1; + unsigned AD2 :1; + unsigned AD3 :1; + unsigned AD4 :1; + unsigned AD5 :1; + unsigned AD6 :1; + unsigned AD7 :1; + }; + struct { + unsigned :5; + unsigned SDA2 :1; + unsigned SCL2 :1; + unsigned SS2 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS2 :1; + }; + struct { + unsigned :4; + unsigned SDO2 :1; + unsigned SDI2 :1; + unsigned SCK2 :1; + unsigned nSS2 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0xF83))); +# 5019 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0xF84))); + +__asm("PORTE equ 0F84h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; + struct { + unsigned RD :1; + unsigned WR :1; + unsigned CS :1; + unsigned :4; + unsigned CCP2 :1; + }; + struct { + unsigned AD8 :1; + unsigned AD9 :1; + unsigned AD10 :1; + unsigned AD11 :1; + unsigned AD12 :1; + unsigned AD13 :1; + unsigned AD14 :1; + unsigned AD15 :1; + }; + struct { + unsigned NOT_RD :1; + }; + struct { + unsigned :1; + unsigned NOT_WR :1; + }; + struct { + unsigned :2; + unsigned NOT_CS :1; + }; + struct { + unsigned nRD :1; + unsigned nWR :1; + unsigned nCS :1; + unsigned :4; + unsigned ECCP2 :1; + }; + struct { + unsigned PD2 :1; + unsigned PC2 :1; + unsigned CCP10 :1; + unsigned CCP9E :1; + unsigned CCP8E :1; + unsigned CCP7E :1; + unsigned CCP6E :1; + unsigned CCP2E :1; + }; + struct { + unsigned RDE :1; + unsigned WRE :1; + unsigned PB2 :1; + unsigned PC3E :1; + unsigned PB3E :1; + unsigned PC1E :1; + unsigned PB1E :1; + unsigned PA2E :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0xF84))); +# 5311 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTF __attribute__((address(0xF85))); + +__asm("PORTF equ 0F85h"); + + +typedef union { + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; + struct { + unsigned AN5 :1; + unsigned AN6 :1; + unsigned AN7 :1; + unsigned AN8 :1; + unsigned AN9 :1; + unsigned AN10 :1; + unsigned AN11 :1; + unsigned SS :1; + }; + struct { + unsigned :7; + unsigned NOT_SS :1; + }; + struct { + unsigned :5; + unsigned CVREF :1; + unsigned :1; + unsigned nSS :1; + }; + struct { + unsigned :7; + unsigned SS1 :1; + }; + struct { + unsigned :7; + unsigned NOT_SS1 :1; + }; + struct { + unsigned :7; + unsigned nSS1 :1; + }; + struct { + unsigned :1; + unsigned C2OUTF :1; + unsigned C1OUTF :1; + }; +} PORTFbits_t; +extern volatile PORTFbits_t PORTFbits __attribute__((address(0xF85))); +# 5490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTG __attribute__((address(0xF86))); + +__asm("PORTG equ 0F86h"); + + +typedef union { + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; + struct { + unsigned CCP3 :1; + unsigned TX2 :1; + unsigned RX2 :1; + unsigned CCP4 :1; + unsigned CCP5 :1; + }; + struct { + unsigned ECCP3 :1; + unsigned CK2 :1; + unsigned DT2 :1; + }; + struct { + unsigned :1; + unsigned C3OUTG :1; + unsigned :3; + unsigned RJPU :1; + }; +} PORTGbits_t; +extern volatile PORTGbits_t PORTGbits __attribute__((address(0xF86))); +# 5620 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTH __attribute__((address(0xF87))); + +__asm("PORTH equ 0F87h"); + + +typedef union { + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; + struct { + unsigned AD16 :1; + unsigned AD17 :1; + unsigned AD18 :1; + unsigned AD19 :1; + unsigned AN12 :1; + unsigned AN13 :1; + unsigned AN14 :1; + unsigned AN15 :1; + }; + struct { + unsigned :4; + unsigned CCP9 :1; + unsigned CCP8 :1; + unsigned CCP7 :1; + unsigned CCP6 :1; + }; + struct { + unsigned :4; + unsigned PC3 :1; + unsigned PB3 :1; + unsigned PC1 :1; + unsigned PB1 :1; + }; +} PORTHbits_t; +extern volatile PORTHbits_t PORTHbits __attribute__((address(0xF87))); +# 5786 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PORTJ __attribute__((address(0xF88))); + +__asm("PORTJ equ 0F88h"); + + +typedef union { + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; + struct { + unsigned ALE :1; + unsigned OE :1; + unsigned WRL :1; + unsigned WRH :1; + unsigned BA0 :1; + unsigned CE :1; + unsigned LB :1; + unsigned UB :1; + }; + struct { + unsigned :1; + unsigned NOT_OE :1; + }; + struct { + unsigned :2; + unsigned NOT_WRL :1; + }; + struct { + unsigned :3; + unsigned NOT_WRH :1; + }; + struct { + unsigned :5; + unsigned NOT_CE :1; + }; + struct { + unsigned :6; + unsigned NOT_LB :1; + }; + struct { + unsigned :7; + unsigned NOT_UB :1; + }; + struct { + unsigned :1; + unsigned nOE :1; + unsigned nWRL :1; + unsigned nWRH :1; + unsigned :1; + unsigned nCE :1; + unsigned nLB :1; + unsigned nUB :1; + }; +} PORTJbits_t; +extern volatile PORTJbits_t PORTJbits __attribute__((address(0xF88))); +# 5992 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATA __attribute__((address(0xF89))); + +__asm("LATA equ 0F89h"); + + +typedef union { + struct { + unsigned LATA0 :1; + unsigned LATA1 :1; + unsigned LATA2 :1; + unsigned LATA3 :1; + unsigned LATA4 :1; + unsigned LATA5 :1; + unsigned REPU :1; + unsigned RDPU :1; + }; + struct { + unsigned LA0 :1; + unsigned LA1 :1; + unsigned LA2 :1; + unsigned LA3 :1; + unsigned LA4 :1; + unsigned LA5 :1; + unsigned LA6 :1; + unsigned LA7 :1; + }; + struct { + unsigned :7; + unsigned LATA7 :1; + }; +} LATAbits_t; +extern volatile LATAbits_t LATAbits __attribute__((address(0xF89))); +# 6113 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATB __attribute__((address(0xF8A))); + +__asm("LATB equ 0F8Ah"); + + +typedef union { + struct { + unsigned LATB0 :1; + unsigned LATB1 :1; + unsigned LATB2 :1; + unsigned LATB3 :1; + unsigned LATB4 :1; + unsigned LATB5 :1; + unsigned LATB6 :1; + unsigned LATB7 :1; + }; + struct { + unsigned LB0 :1; + unsigned LB1 :1; + unsigned LB2 :1; + unsigned LB3 :1; + unsigned LB4 :1; + unsigned LB5 :1; + unsigned LB6 :1; + unsigned LB7 :1; + }; +} LATBbits_t; +extern volatile LATBbits_t LATBbits __attribute__((address(0xF8A))); +# 6225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATC __attribute__((address(0xF8B))); + +__asm("LATC equ 0F8Bh"); + + +typedef union { + struct { + unsigned LATC0 :1; + unsigned LATC1 :1; + unsigned LATC2 :1; + unsigned LATC3 :1; + unsigned LATC4 :1; + unsigned LATC5 :1; + unsigned LATC6 :1; + unsigned LATC7 :1; + }; + struct { + unsigned LC0 :1; + unsigned LC1 :1; + unsigned LC2 :1; + unsigned LC3 :1; + unsigned LC4 :1; + unsigned LC5 :1; + unsigned LC6 :1; + unsigned LC7 :1; + }; +} LATCbits_t; +extern volatile LATCbits_t LATCbits __attribute__((address(0xF8B))); +# 6337 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATD __attribute__((address(0xF8C))); + +__asm("LATD equ 0F8Ch"); + + +typedef union { + struct { + unsigned LATD0 :1; + unsigned LATD1 :1; + unsigned LATD2 :1; + unsigned LATD3 :1; + unsigned LATD4 :1; + unsigned LATD5 :1; + unsigned LATD6 :1; + unsigned LATD7 :1; + }; + struct { + unsigned LD0 :1; + unsigned LD1 :1; + unsigned LD2 :1; + unsigned LD3 :1; + unsigned LD4 :1; + unsigned LD5 :1; + unsigned LD6 :1; + unsigned LD7 :1; + }; +} LATDbits_t; +extern volatile LATDbits_t LATDbits __attribute__((address(0xF8C))); +# 6449 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATE __attribute__((address(0xF8D))); + +__asm("LATE equ 0F8Dh"); + + +typedef union { + struct { + unsigned LATE0 :1; + unsigned LATE1 :1; + unsigned LATE2 :1; + unsigned LATE3 :1; + unsigned LATE4 :1; + unsigned LATE5 :1; + unsigned LATE6 :1; + unsigned LATE7 :1; + }; + struct { + unsigned LE0 :1; + unsigned LE1 :1; + unsigned LE2 :1; + unsigned LE3 :1; + unsigned LE4 :1; + unsigned LE5 :1; + unsigned LE6 :1; + unsigned LE7 :1; + }; +} LATEbits_t; +extern volatile LATEbits_t LATEbits __attribute__((address(0xF8D))); +# 6561 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATF __attribute__((address(0xF8E))); + +__asm("LATF equ 0F8Eh"); + + +typedef union { + struct { + unsigned LATF0 :1; + unsigned LATF1 :1; + unsigned LATF2 :1; + unsigned LATF3 :1; + unsigned LATF4 :1; + unsigned LATF5 :1; + unsigned LATF6 :1; + unsigned LATF7 :1; + }; + struct { + unsigned LF0 :1; + unsigned LF1 :1; + unsigned LF2 :1; + unsigned LF3 :1; + unsigned LF4 :1; + unsigned LF5 :1; + unsigned LF6 :1; + unsigned LF7 :1; + }; +} LATFbits_t; +extern volatile LATFbits_t LATFbits __attribute__((address(0xF8E))); +# 6673 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATG __attribute__((address(0xF8F))); + +__asm("LATG equ 0F8Fh"); + + +typedef union { + struct { + unsigned LATG0 :1; + unsigned LATG1 :1; + unsigned LATG2 :1; + unsigned LATG3 :1; + unsigned LATG4 :1; + unsigned LATG5 :1; + unsigned LATG6 :1; + unsigned LATG7 :1; + }; + struct { + unsigned LG0 :1; + unsigned LG1 :1; + unsigned LG2 :1; + unsigned LG3 :1; + unsigned LG4 :1; + }; +} LATGbits_t; +extern volatile LATGbits_t LATGbits __attribute__((address(0xF8F))); +# 6767 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATH __attribute__((address(0xF90))); + +__asm("LATH equ 0F90h"); + + +typedef union { + struct { + unsigned LATH0 :1; + unsigned LATH1 :1; + unsigned LATH2 :1; + unsigned LATH3 :1; + unsigned LATH4 :1; + unsigned LATH5 :1; + unsigned LATH6 :1; + unsigned LATH7 :1; + }; + struct { + unsigned LH0 :1; + unsigned LH1 :1; + unsigned LH2 :1; + unsigned LH3 :1; + unsigned LH4 :1; + unsigned LH5 :1; + unsigned LH6 :1; + unsigned LH7 :1; + }; +} LATHbits_t; +extern volatile LATHbits_t LATHbits __attribute__((address(0xF90))); +# 6879 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char LATJ __attribute__((address(0xF91))); + +__asm("LATJ equ 0F91h"); + + +typedef union { + struct { + unsigned LATJ0 :1; + unsigned LATJ1 :1; + unsigned LATJ2 :1; + unsigned LATJ3 :1; + unsigned LATJ4 :1; + unsigned LATJ5 :1; + unsigned LATJ6 :1; + unsigned LATJ7 :1; + }; + struct { + unsigned LJ0 :1; + unsigned LJ1 :1; + unsigned LJ2 :1; + unsigned LJ3 :1; + unsigned LJ4 :1; + unsigned LJ5 :1; + unsigned LJ6 :1; + unsigned LJ7 :1; + }; +} LATJbits_t; +extern volatile LATJbits_t LATJbits __attribute__((address(0xF91))); +# 6991 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0xF92))); + +__asm("TRISA equ 0F92h"); + + +extern volatile unsigned char DDRA __attribute__((address(0xF92))); + +__asm("DDRA equ 0F92h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0xF92))); +# 7082 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} DDRAbits_t; +extern volatile DDRAbits_t DDRAbits __attribute__((address(0xF92))); +# 7165 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0xF93))); + +__asm("TRISB equ 0F93h"); + + +extern volatile unsigned char DDRB __attribute__((address(0xF93))); + +__asm("DDRB equ 0F93h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0xF93))); +# 7280 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} DDRBbits_t; +extern volatile DDRBbits_t DDRBbits __attribute__((address(0xF93))); +# 7387 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0xF94))); + +__asm("TRISC equ 0F94h"); + + +extern volatile unsigned char DDRC __attribute__((address(0xF94))); + +__asm("DDRC equ 0F94h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0xF94))); +# 7502 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} DDRCbits_t; +extern volatile DDRCbits_t DDRCbits __attribute__((address(0xF94))); +# 7609 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0xF95))); + +__asm("TRISD equ 0F95h"); + + +extern volatile unsigned char DDRD __attribute__((address(0xF95))); + +__asm("DDRD equ 0F95h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0xF95))); +# 7724 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} DDRDbits_t; +extern volatile DDRDbits_t DDRDbits __attribute__((address(0xF95))); +# 7831 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0xF96))); + +__asm("TRISE equ 0F96h"); + + +extern volatile unsigned char DDRE __attribute__((address(0xF96))); + +__asm("DDRE equ 0F96h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0xF96))); +# 7946 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned TRISE3 :1; + unsigned TRISE4 :1; + unsigned TRISE5 :1; + unsigned TRISE6 :1; + unsigned TRISE7 :1; + }; + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + unsigned RE3 :1; + unsigned RE4 :1; + unsigned RE5 :1; + unsigned RE6 :1; + unsigned RE7 :1; + }; +} DDREbits_t; +extern volatile DDREbits_t DDREbits __attribute__((address(0xF96))); +# 8053 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISF __attribute__((address(0xF97))); + +__asm("TRISF equ 0F97h"); + + +extern volatile unsigned char DDRF __attribute__((address(0xF97))); + +__asm("DDRF equ 0F97h"); + + +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} TRISFbits_t; +extern volatile TRISFbits_t TRISFbits __attribute__((address(0xF97))); +# 8168 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISF0 :1; + unsigned TRISF1 :1; + unsigned TRISF2 :1; + unsigned TRISF3 :1; + unsigned TRISF4 :1; + unsigned TRISF5 :1; + unsigned TRISF6 :1; + unsigned TRISF7 :1; + }; + struct { + unsigned RF0 :1; + unsigned RF1 :1; + unsigned RF2 :1; + unsigned RF3 :1; + unsigned RF4 :1; + unsigned RF5 :1; + unsigned RF6 :1; + unsigned RF7 :1; + }; +} DDRFbits_t; +extern volatile DDRFbits_t DDRFbits __attribute__((address(0xF97))); +# 8275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISG __attribute__((address(0xF98))); + +__asm("TRISG equ 0F98h"); + + +extern volatile unsigned char DDRG __attribute__((address(0xF98))); + +__asm("DDRG equ 0F98h"); + + +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} TRISGbits_t; +extern volatile TRISGbits_t TRISGbits __attribute__((address(0xF98))); +# 8390 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISG0 :1; + unsigned TRISG1 :1; + unsigned TRISG2 :1; + unsigned TRISG3 :1; + unsigned TRISG4 :1; + unsigned TRISG5 :1; + unsigned TRISG6 :1; + unsigned TRISG7 :1; + }; + struct { + unsigned RG0 :1; + unsigned RG1 :1; + unsigned RG2 :1; + unsigned RG3 :1; + unsigned RG4 :1; + unsigned RG5 :1; + unsigned RG6 :1; + unsigned RG7 :1; + }; +} DDRGbits_t; +extern volatile DDRGbits_t DDRGbits __attribute__((address(0xF98))); +# 8497 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISH __attribute__((address(0xF99))); + +__asm("TRISH equ 0F99h"); + + +extern volatile unsigned char DDRH __attribute__((address(0xF99))); + +__asm("DDRH equ 0F99h"); + + +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} TRISHbits_t; +extern volatile TRISHbits_t TRISHbits __attribute__((address(0xF99))); +# 8612 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISH0 :1; + unsigned TRISH1 :1; + unsigned TRISH2 :1; + unsigned TRISH3 :1; + unsigned TRISH4 :1; + unsigned TRISH5 :1; + unsigned TRISH6 :1; + unsigned TRISH7 :1; + }; + struct { + unsigned RH0 :1; + unsigned RH1 :1; + unsigned RH2 :1; + unsigned RH3 :1; + unsigned RH4 :1; + unsigned RH5 :1; + unsigned RH6 :1; + unsigned RH7 :1; + }; +} DDRHbits_t; +extern volatile DDRHbits_t DDRHbits __attribute__((address(0xF99))); +# 8719 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); + +__asm("TRISJ equ 0F9Ah"); + + +extern volatile unsigned char DDRJ __attribute__((address(0xF9A))); + +__asm("DDRJ equ 0F9Ah"); + + +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} TRISJbits_t; +extern volatile TRISJbits_t TRISJbits __attribute__((address(0xF9A))); +# 8834 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TRISJ0 :1; + unsigned TRISJ1 :1; + unsigned TRISJ2 :1; + unsigned TRISJ3 :1; + unsigned TRISJ4 :1; + unsigned TRISJ5 :1; + unsigned TRISJ6 :1; + unsigned TRISJ7 :1; + }; + struct { + unsigned RJ0 :1; + unsigned RJ1 :1; + unsigned RJ2 :1; + unsigned RJ3 :1; + unsigned RJ4 :1; + unsigned RJ5 :1; + unsigned RJ6 :1; + unsigned RJ7 :1; + }; +} DDRJbits_t; +extern volatile DDRJbits_t DDRJbits __attribute__((address(0xF9A))); +# 8941 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCTUNE __attribute__((address(0xF9B))); + +__asm("OSCTUNE equ 0F9Bh"); + + +typedef union { + struct { + unsigned :4; + unsigned PPRE :1; + unsigned PPST0 :1; + unsigned PLLEN :1; + unsigned PPST1 :1; + }; + struct { + unsigned :4; + unsigned TUN4 :1; + unsigned TUN5 :1; + }; +} OSCTUNEbits_t; +extern volatile OSCTUNEbits_t OSCTUNEbits __attribute__((address(0xF9B))); +# 8995 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char MEMCON __attribute__((address(0xF9C))); + +__asm("MEMCON equ 0F9Ch"); + + +typedef union { + struct { + unsigned WM :2; + unsigned :2; + unsigned WAIT :2; + unsigned :1; + unsigned EBDIS :1; + }; + struct { + unsigned WM0 :1; + unsigned WM1 :1; + unsigned :2; + unsigned WAIT0 :1; + unsigned WAIT1 :1; + }; +} MEMCONbits_t; +extern volatile MEMCONbits_t MEMCONbits __attribute__((address(0xF9C))); +# 9056 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0xF9D))); + +__asm("PIE1 equ 0F9Dh"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSP1IE :1; + unsigned TX1IE :1; + unsigned RC1IE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; + struct { + unsigned :3; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0xF9D))); +# 9139 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0xF9E))); + +__asm("PIR1 equ 0F9Eh"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSP1IF :1; + unsigned TX1IF :1; + unsigned RC1IF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; + struct { + unsigned :4; + unsigned TXIF :1; + unsigned RCIF :1; + }; + struct { + unsigned :3; + unsigned SSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0xF9E))); +# 9225 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR1 __attribute__((address(0xF9F))); + +__asm("IPR1 equ 0F9Fh"); + + +typedef union { + struct { + unsigned TMR1IP :1; + unsigned TMR2IP :1; + unsigned CCP1IP :1; + unsigned SSP1IP :1; + unsigned TX1IP :1; + unsigned RC1IP :1; + unsigned ADIP :1; + unsigned PSPIP :1; + }; + struct { + unsigned :3; + unsigned SSPIP :1; + unsigned TXIP :1; + unsigned RCIP :1; + }; +} IPR1bits_t; +extern volatile IPR1bits_t IPR1bits __attribute__((address(0xF9F))); +# 9308 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0xFA0))); + +__asm("PIE2 equ 0FA0h"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned TMR3IE :1; + unsigned :1; + unsigned BCL1IE :1; + unsigned :1; + unsigned ETHIE :1; + unsigned CMIE :1; + unsigned OSCFIE :1; + }; + struct { + unsigned :3; + unsigned BCLIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0xFA0))); +# 9369 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0xFA1))); + +__asm("PIR2 equ 0FA1h"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned TMR3IF :1; + unsigned :1; + unsigned BCL1IF :1; + unsigned :1; + unsigned ETHIF :1; + unsigned CMIF :1; + unsigned OSCFIF :1; + }; + struct { + unsigned :3; + unsigned BCLIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0xFA1))); +# 9430 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR2 __attribute__((address(0xFA2))); + +__asm("IPR2 equ 0FA2h"); + + +typedef union { + struct { + unsigned CCP2IP :1; + unsigned TMR3IP :1; + unsigned :1; + unsigned BCL1IP :1; + unsigned :1; + unsigned ETHIP :1; + unsigned CMIP :1; + unsigned OSCFIP :1; + }; + struct { + unsigned :3; + unsigned BCLIP :1; + }; +} IPR2bits_t; +extern volatile IPR2bits_t IPR2bits __attribute__((address(0xFA2))); +# 9491 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIE3 __attribute__((address(0xFA3))); + +__asm("PIE3 equ 0FA3h"); + + +typedef union { + struct { + unsigned CCP3IE :1; + unsigned CCP4IE :1; + unsigned CCP5IE :1; + unsigned TMR4IE :1; + unsigned TX2IE :1; + unsigned RC2IE :1; + unsigned BCL2IE :1; + unsigned SSP2IE :1; + }; + struct { + unsigned RXB0IE :1; + unsigned RXB1IE :1; + unsigned TXB0IE :1; + unsigned TXB1IE :1; + unsigned TXB2IE :1; + }; + struct { + unsigned :1; + unsigned RXBNIE :1; + unsigned :2; + unsigned TXBNIE :1; + }; +} PIE3bits_t; +extern volatile PIE3bits_t PIE3bits __attribute__((address(0xFA3))); +# 9601 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PIR3 __attribute__((address(0xFA4))); + +__asm("PIR3 equ 0FA4h"); + + +typedef union { + struct { + unsigned CCP3IF :1; + unsigned CCP4IF :1; + unsigned CCP5IF :1; + unsigned TMR4IF :1; + unsigned TX2IF :1; + unsigned RC2IF :1; + unsigned BCL2IF :1; + unsigned SSP2IF :1; + }; + struct { + unsigned :1; + unsigned RXBNIF :1; + unsigned :2; + unsigned TXBNIF :1; + }; +} PIR3bits_t; +extern volatile PIR3bits_t PIR3bits __attribute__((address(0xFA4))); +# 9679 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char IPR3 __attribute__((address(0xFA5))); + +__asm("IPR3 equ 0FA5h"); + + +typedef union { + struct { + unsigned CCP3IP :1; + unsigned CCP4IP :1; + unsigned CCP5IP :1; + unsigned TMR4IP :1; + unsigned TX2IP :1; + unsigned RC2IP :1; + unsigned BCL2IP :1; + unsigned SSP2IP :1; + }; + struct { + unsigned :1; + unsigned RXBNIP :1; + unsigned :2; + unsigned TXBNIP :1; + }; +} IPR3bits_t; +extern volatile IPR3bits_t IPR3bits __attribute__((address(0xFA5))); +# 9757 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON1 __attribute__((address(0xFA6))); + +__asm("EECON1 equ 0FA6h"); + + +typedef union { + struct { + unsigned :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned FREE :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0xFA6))); +# 9796 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0xFA7))); + +__asm("EECON2 equ 0FA7h"); + + + + +extern volatile unsigned char RCSTA1 __attribute__((address(0xFAB))); + +__asm("RCSTA1 equ 0FABh"); + + +extern volatile unsigned char RCSTA __attribute__((address(0xFAB))); + +__asm("RCSTA equ 0FABh"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTA1bits_t; +extern volatile RCSTA1bits_t RCSTA1bits __attribute__((address(0xFAB))); +# 9969 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned NOT_RC8 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; + struct { + unsigned RX9D1 :1; + unsigned OERR1 :1; + unsigned FERR1 :1; + unsigned ADDEN1 :1; + unsigned CREN1 :1; + unsigned SREN1 :1; + unsigned RX91 :1; + unsigned SPEN1 :1; + }; + struct { + unsigned :5; + unsigned SRENA :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0xFAB))); +# 10127 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXSTA1 __attribute__((address(0xFAC))); + +__asm("TXSTA1 equ 0FACh"); + + +extern volatile unsigned char TXSTA __attribute__((address(0xFAC))); + +__asm("TXSTA equ 0FACh"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTA1bits_t; +extern volatile TXSTA1bits_t TXSTA1bits __attribute__((address(0xFAC))); +# 10275 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned SENDB :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned TX8_9 :1; + }; + struct { + unsigned :6; + unsigned NOT_TX8 :1; + }; + struct { + unsigned :6; + unsigned nTX8 :1; + }; + struct { + unsigned TX9D1 :1; + unsigned TRMT1 :1; + unsigned BRGH1 :1; + unsigned SENDB1 :1; + unsigned SYNC1 :1; + unsigned TXEN1 :1; + unsigned TX91 :1; + unsigned CSRC1 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0xFAC))); +# 10415 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char TXREG1 __attribute__((address(0xFAD))); + +__asm("TXREG1 equ 0FADh"); + + +extern volatile unsigned char TXREG __attribute__((address(0xFAD))); + +__asm("TXREG equ 0FADh"); + + + + +extern volatile unsigned char RCREG1 __attribute__((address(0xFAE))); + +__asm("RCREG1 equ 0FAEh"); + + +extern volatile unsigned char RCREG __attribute__((address(0xFAE))); + +__asm("RCREG equ 0FAEh"); + + + + +extern volatile unsigned char SPBRG1 __attribute__((address(0xFAF))); + +__asm("SPBRG1 equ 0FAFh"); + + +extern volatile unsigned char SPBRG __attribute__((address(0xFAF))); + +__asm("SPBRG equ 0FAFh"); + + + + +extern volatile unsigned char PSPCON __attribute__((address(0xFB0))); + +__asm("PSPCON equ 0FB0h"); + + +typedef union { + struct { + unsigned :4; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} PSPCONbits_t; +extern volatile PSPCONbits_t PSPCONbits __attribute__((address(0xFB0))); +# 10490 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T3CON __attribute__((address(0xFB1))); + +__asm("T3CON equ 0FB1h"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T3SYNC :1; + }; + struct { + unsigned TMR3ON :1; + unsigned TMR3CS :1; + unsigned nT3SYNC :1; + unsigned T3CCP1 :1; + unsigned T3CKPS :2; + unsigned T3CCP2 :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T3SYNC :1; + unsigned :1; + unsigned T3CKPS0 :1; + unsigned T3CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T3INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN3 :1; + unsigned :3; + unsigned RD163 :1; + }; + struct { + unsigned :7; + unsigned T3RD16 :1; + }; +} T3CONbits_t; +extern volatile T3CONbits_t T3CONbits __attribute__((address(0xFB1))); +# 10611 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR3 __attribute__((address(0xFB2))); + +__asm("TMR3 equ 0FB2h"); + + + + +extern volatile unsigned char TMR3L __attribute__((address(0xFB2))); + +__asm("TMR3L equ 0FB2h"); + + + + +extern volatile unsigned char TMR3H __attribute__((address(0xFB3))); + +__asm("TMR3H equ 0FB3h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0xFB4))); + +__asm("CMCON equ 0FB4h"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; + struct { + unsigned CMEN0 :1; + unsigned CMEN1 :1; + unsigned CMEN2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0xFB4))); +# 10722 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0xFB5))); + +__asm("CVRCON equ 0FB5h"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned CVRSS :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; + struct { + unsigned :6; + unsigned CVROEN :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0xFB5))); +# 10801 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECCP1AS __attribute__((address(0xFB6))); + +__asm("ECCP1AS equ 0FB6h"); + + +typedef union { + struct { + unsigned PSSBD :2; + unsigned PSSAC :2; + unsigned ECCPAS :3; + unsigned ECCPASE :1; + }; + struct { + unsigned PSSBD0 :1; + unsigned PSSBD1 :1; + unsigned PSSAC0 :1; + unsigned PSSAC1 :1; + unsigned ECCPAS0 :1; + unsigned ECCPAS1 :1; + unsigned ECCPAS2 :1; + }; + struct { + unsigned PSS1BD0 :1; + unsigned PSS1BD1 :1; + unsigned PSS1AC0 :1; + unsigned PSS1AC1 :1; + unsigned ECCP1AS0 :1; + unsigned ECCP1AS1 :1; + unsigned ECCP1AS2 :1; + unsigned ECCP1ASE :1; + }; +} ECCP1ASbits_t; +extern volatile ECCP1ASbits_t ECCP1ASbits __attribute__((address(0xFB6))); +# 10933 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char CCP3CON __attribute__((address(0xFB7))); + +__asm("CCP3CON equ 0FB7h"); + + +extern volatile unsigned char ECCP3CON __attribute__((address(0xFB7))); + +__asm("ECCP3CON equ 0FB7h"); + + +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} CCP3CONbits_t; +extern volatile CCP3CONbits_t CCP3CONbits __attribute__((address(0xFB7))); +# 11033 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP3M :4; + unsigned DC3B :2; + unsigned P3M :2; + }; + struct { + unsigned CCP3M0 :1; + unsigned CCP3M1 :1; + unsigned CCP3M2 :1; + unsigned CCP3M3 :1; + unsigned DC3B0 :1; + unsigned DC3B1 :1; + unsigned P3M0 :1; + unsigned P3M1 :1; + }; + struct { + unsigned :4; + unsigned CCP3Y :1; + unsigned CCP3X :1; + }; +} ECCP3CONbits_t; +extern volatile ECCP3CONbits_t ECCP3CONbits __attribute__((address(0xFB7))); +# 11125 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR3 __attribute__((address(0xFB8))); + +__asm("CCPR3 equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3L __attribute__((address(0xFB8))); + +__asm("CCPR3L equ 0FB8h"); + + + + +extern volatile unsigned char CCPR3H __attribute__((address(0xFB9))); + +__asm("CCPR3H equ 0FB9h"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0xFBA))); + +__asm("CCP2CON equ 0FBAh"); + + +extern volatile unsigned char ECCP2CON __attribute__((address(0xFBA))); + +__asm("ECCP2CON equ 0FBAh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0xFBA))); +# 11246 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP2M :4; + unsigned DC2B :2; + unsigned P2M :2; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + unsigned DC2B0 :1; + unsigned DC2B1 :1; + unsigned P2M0 :1; + unsigned P2M1 :1; + }; + struct { + unsigned :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; +} ECCP2CONbits_t; +extern volatile ECCP2CONbits_t ECCP2CONbits __attribute__((address(0xFBA))); +# 11338 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR2 __attribute__((address(0xFBB))); + +__asm("CCPR2 equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0xFBB))); + +__asm("CCPR2L equ 0FBBh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0xFBC))); + +__asm("CCPR2H equ 0FBCh"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0xFBD))); + +__asm("CCP1CON equ 0FBDh"); + + +extern volatile unsigned char ECCP1CON __attribute__((address(0xFBD))); + +__asm("ECCP1CON equ 0FBDh"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0xFBD))); +# 11459 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned CCP1M :4; + unsigned DC1B :2; + unsigned P1M :2; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + unsigned DC1B0 :1; + unsigned DC1B1 :1; + unsigned P1M0 :1; + unsigned P1M1 :1; + }; + struct { + unsigned :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; +} ECCP1CONbits_t; +extern volatile ECCP1CONbits_t ECCP1CONbits __attribute__((address(0xFBD))); +# 11551 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0xFBE))); + +__asm("CCPR1 equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0xFBE))); + +__asm("CCPR1L equ 0FBEh"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0xFBF))); + +__asm("CCPR1H equ 0FBFh"); + + + + +extern volatile unsigned char ADCON2 __attribute__((address(0xFC0))); + +__asm("ADCON2 equ 0FC0h"); + + +typedef union { + struct { + unsigned ADCS :3; + unsigned ACQT :3; + unsigned :1; + unsigned ADFM :1; + }; + struct { + unsigned ADCS0 :1; + unsigned ADCS1 :1; + unsigned ADCS2 :1; + unsigned ACQT0 :1; + unsigned ACQT1 :1; + unsigned ACQT2 :1; + }; +} ADCON2bits_t; +extern volatile ADCON2bits_t ADCON2bits __attribute__((address(0xFC0))); +# 11643 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON1 __attribute__((address(0xFC1))); + +__asm("ADCON1 equ 0FC1h"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned VCFG :2; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + unsigned VCFG0 :1; + unsigned VCFG1 :1; + }; + struct { + unsigned :3; + unsigned CHSN3 :1; + unsigned VCFG01 :1; + unsigned VCFG11 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +# 11728 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ADCON0 __attribute__((address(0xFC2))); + +__asm("ADCON0 equ 0FC2h"); + + +typedef union { + struct { + unsigned :1; + unsigned GO_NOT_DONE :1; + }; + struct { + unsigned ADON :1; + unsigned GO_nDONE :1; + unsigned CHS :4; + }; + struct { + unsigned :1; + unsigned DONE :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned CHS3 :1; + unsigned :1; + unsigned ADCAL :1; + }; + struct { + unsigned :1; + unsigned GO_DONE :1; + }; + struct { + unsigned :1; + unsigned GO :1; + }; + struct { + unsigned :1; + unsigned NOT_DONE :1; + }; + struct { + unsigned :1; + unsigned nDONE :1; + }; + struct { + unsigned :1; + unsigned GODONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0xFC2))); +# 11854 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short ADRES __attribute__((address(0xFC3))); + +__asm("ADRES equ 0FC3h"); + + + + +extern volatile unsigned char ADRESL __attribute__((address(0xFC3))); + +__asm("ADRESL equ 0FC3h"); + + + + +extern volatile unsigned char ADRESH __attribute__((address(0xFC4))); + +__asm("ADRESH equ 0FC4h"); + + + + +extern volatile unsigned char SSP1CON2 __attribute__((address(0xFC5))); + +__asm("SSP1CON2 equ 0FC5h"); + + +extern volatile unsigned char SSPCON2 __attribute__((address(0xFC5))); + +__asm("SSPCON2 equ 0FC5h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSP1CON2bits_t; +extern volatile SSP1CON2bits_t SSP1CON2bits __attribute__((address(0xFC5))); +# 12065 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; + struct { + unsigned :1; + unsigned ADMSK1 :1; + unsigned ADMSK2 :1; + unsigned ADMSK3 :1; + unsigned ADMSK4 :1; + unsigned ADMSK5 :1; + }; + struct { + unsigned :1; + unsigned ADMSK :5; + }; + struct { + unsigned SEN1 :1; + unsigned ADMSK11 :1; + unsigned ADMSK21 :1; + unsigned ADMSK31 :1; + unsigned ACKEN1 :1; + unsigned ACKDT1 :1; + unsigned ACKSTAT1 :1; + unsigned GCEN1 :1; + }; + struct { + unsigned :1; + unsigned RSEN1 :1; + unsigned PEN1 :1; + unsigned RCEN1 :1; + unsigned ADMSK41 :1; + unsigned ADMSK51 :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0xFC5))); +# 12247 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1CON1 __attribute__((address(0xFC6))); + +__asm("SSP1CON1 equ 0FC6h"); + + +extern volatile unsigned char SSPCON1 __attribute__((address(0xFC6))); + +__asm("SSPCON1 equ 0FC6h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSP1CON1bits_t; +extern volatile SSP1CON1bits_t SSP1CON1bits __attribute__((address(0xFC6))); +# 12370 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; + struct { + unsigned SSPM01 :1; + unsigned SSPM11 :1; + unsigned SSPM21 :1; + unsigned SSPM31 :1; + unsigned CKP1 :1; + unsigned SSPEN1 :1; + unsigned SSPOV1 :1; + unsigned WCOL1 :1; + }; +} SSPCON1bits_t; +extern volatile SSPCON1bits_t SSPCON1bits __attribute__((address(0xFC6))); +# 12485 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1STAT __attribute__((address(0xFC7))); + +__asm("SSP1STAT equ 0FC7h"); + + +extern volatile unsigned char SSPSTAT __attribute__((address(0xFC7))); + +__asm("SSPSTAT equ 0FC7h"); + + +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSP1STATbits_t; +extern volatile SSP1STATbits_t SSP1STATbits __attribute__((address(0xFC7))); +# 12788 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned :2; + unsigned R_NOT_W :1; + }; + struct { + unsigned :5; + unsigned D_NOT_A :1; + }; + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DAT :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned NOT_WRITE :1; + }; + struct { + unsigned :5; + unsigned NOT_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned BF1 :1; + unsigned UA1 :1; + unsigned RW :1; + unsigned START :1; + unsigned STOP :1; + unsigned DA :1; + unsigned CKE1 :1; + unsigned SMP1 :1; + }; + struct { + unsigned :2; + unsigned RW1 :1; + unsigned START1 :1; + unsigned STOP1 :1; + unsigned DA1 :1; + }; + struct { + unsigned :2; + unsigned NOT_W :1; + }; + struct { + unsigned :5; + unsigned NOT_A :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0xFC7))); +# 13083 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1ADD __attribute__((address(0xFC8))); + +__asm("SSP1ADD equ 0FC8h"); + + +extern volatile unsigned char SSPADD __attribute__((address(0xFC8))); + +__asm("SSPADD equ 0FC8h"); + + +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSP1ADDbits_t; +extern volatile SSP1ADDbits_t SSP1ADDbits __attribute__((address(0xFC8))); +# 13198 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +typedef union { + struct { + unsigned MSK0 :1; + unsigned MSK1 :1; + unsigned MSK2 :1; + unsigned MSK3 :1; + unsigned MSK4 :1; + unsigned MSK5 :1; + unsigned MSK6 :1; + unsigned MSK7 :1; + }; + struct { + unsigned MSK01 :1; + unsigned MSK11 :1; + unsigned MSK21 :1; + unsigned MSK31 :1; + unsigned MSK41 :1; + unsigned MSK51 :1; + unsigned MSK61 :1; + unsigned MSK71 :1; + }; +} SSPADDbits_t; +extern volatile SSPADDbits_t SSPADDbits __attribute__((address(0xFC8))); +# 13305 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char SSP1BUF __attribute__((address(0xFC9))); + +__asm("SSP1BUF equ 0FC9h"); + + +extern volatile unsigned char SSPBUF __attribute__((address(0xFC9))); + +__asm("SSPBUF equ 0FC9h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0xFCA))); + +__asm("T2CON equ 0FCAh"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned T2OUTPS0 :1; + unsigned T2OUTPS1 :1; + unsigned T2OUTPS2 :1; + unsigned T2OUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0xFCA))); +# 13388 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0xFCB))); + +__asm("PR2 equ 0FCBh"); + + + + +extern volatile unsigned char TMR2 __attribute__((address(0xFCC))); + +__asm("TMR2 equ 0FCCh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0xFCD))); + +__asm("T1CON equ 0FCDh"); + + +typedef union { + struct { + unsigned :2; + unsigned NOT_T1SYNC :1; + }; + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + unsigned T1RUN :1; + unsigned RD16 :1; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; + struct { + unsigned :3; + unsigned SOSCEN :1; + unsigned :3; + unsigned T1RD16 :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0xFCD))); +# 13514 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0xFCE))); + +__asm("TMR1 equ 0FCEh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0xFCE))); + +__asm("TMR1L equ 0FCEh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0xFCF))); + +__asm("TMR1H equ 0FCFh"); + + + + +extern volatile unsigned char RCON __attribute__((address(0xFD0))); + +__asm("RCON equ 0FD0h"); + + +typedef union { + struct { + unsigned NOT_BOR :1; + }; + struct { + unsigned :1; + unsigned NOT_POR :1; + }; + struct { + unsigned :2; + unsigned NOT_PD :1; + }; + struct { + unsigned :3; + unsigned NOT_TO :1; + }; + struct { + unsigned :4; + unsigned NOT_RI :1; + }; + struct { + unsigned :5; + unsigned NOT_CM :1; + }; + struct { + unsigned nBOR :1; + unsigned nPOR :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned nRI :1; + unsigned nCM :1; + unsigned :1; + unsigned IPEN :1; + }; + struct { + unsigned BOR :1; + unsigned POR :1; + unsigned PD :1; + unsigned TO :1; + unsigned RI :1; + unsigned CM :1; + }; +} RCONbits_t; +extern volatile RCONbits_t RCONbits __attribute__((address(0xFD0))); +# 13683 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char WDTCON __attribute__((address(0xFD1))); + +__asm("WDTCON equ 0FD1h"); + + +typedef union { + struct { + unsigned SWDTEN :1; + }; + struct { + unsigned SWDTE :1; + }; +} WDTCONbits_t; +extern volatile WDTCONbits_t WDTCONbits __attribute__((address(0xFD1))); +# 13711 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char ECON1 __attribute__((address(0xFD2))); + +__asm("ECON1 equ 0FD2h"); + + +typedef union { + struct { + unsigned :2; + unsigned RXEN :1; + unsigned TXRTS :1; + unsigned CSUMEN :1; + unsigned DMAST :1; + unsigned RXRST :1; + unsigned TXRST :1; + }; +} ECON1bits_t; +extern volatile ECON1bits_t ECON1bits __attribute__((address(0xFD2))); +# 13762 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char OSCCON __attribute__((address(0xFD3))); + +__asm("OSCCON equ 0FD3h"); + + +typedef union { + struct { + unsigned SCS :2; + unsigned :1; + unsigned OSTS :1; + unsigned :3; + unsigned IDLEN :1; + }; + struct { + unsigned SCS0 :1; + unsigned SCS1 :1; + }; +} OSCCONbits_t; +extern volatile OSCCONbits_t OSCCONbits __attribute__((address(0xFD3))); +# 13810 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char T0CON __attribute__((address(0xFD5))); + +__asm("T0CON equ 0FD5h"); + + +typedef union { + struct { + unsigned T0PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned T08BIT :1; + unsigned TMR0ON :1; + }; + struct { + unsigned T0PS0 :1; + unsigned T0PS1 :1; + unsigned T0PS2 :1; + }; +} T0CONbits_t; +extern volatile T0CONbits_t T0CONbits __attribute__((address(0xFD5))); +# 13880 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short TMR0 __attribute__((address(0xFD6))); + +__asm("TMR0 equ 0FD6h"); + + + + +extern volatile unsigned char TMR0L __attribute__((address(0xFD6))); + +__asm("TMR0L equ 0FD6h"); + + + + +extern volatile unsigned char TMR0H __attribute__((address(0xFD7))); + +__asm("TMR0H equ 0FD7h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0xFD8))); + +__asm("STATUS equ 0FD8h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned OV :1; + unsigned N :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + unsigned OVERFLOW :1; + unsigned NEGATIVE :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0xFD8))); +# 13972 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short FSR2 __attribute__((address(0xFD9))); + +__asm("FSR2 equ 0FD9h"); + + + + +extern volatile unsigned char FSR2L __attribute__((address(0xFD9))); + +__asm("FSR2L equ 0FD9h"); + + + + +extern volatile unsigned char FSR2H __attribute__((address(0xFDA))); + +__asm("FSR2H equ 0FDAh"); + + + + +extern volatile unsigned char PLUSW2 __attribute__((address(0xFDB))); + +__asm("PLUSW2 equ 0FDBh"); + + + + +extern volatile unsigned char PREINC2 __attribute__((address(0xFDC))); + +__asm("PREINC2 equ 0FDCh"); + + + + +extern volatile unsigned char POSTDEC2 __attribute__((address(0xFDD))); + +__asm("POSTDEC2 equ 0FDDh"); + + + + +extern volatile unsigned char POSTINC2 __attribute__((address(0xFDE))); + +__asm("POSTINC2 equ 0FDEh"); + + + + +extern volatile unsigned char INDF2 __attribute__((address(0xFDF))); + +__asm("INDF2 equ 0FDFh"); + + + + +extern volatile unsigned char BSR __attribute__((address(0xFE0))); + +__asm("BSR equ 0FE0h"); + + + + +extern volatile unsigned short FSR1 __attribute__((address(0xFE1))); + +__asm("FSR1 equ 0FE1h"); + + + + +extern volatile unsigned char FSR1L __attribute__((address(0xFE1))); + +__asm("FSR1L equ 0FE1h"); + + + + +extern volatile unsigned char FSR1H __attribute__((address(0xFE2))); + +__asm("FSR1H equ 0FE2h"); + + + + +extern volatile unsigned char PLUSW1 __attribute__((address(0xFE3))); + +__asm("PLUSW1 equ 0FE3h"); + + + + +extern volatile unsigned char PREINC1 __attribute__((address(0xFE4))); + +__asm("PREINC1 equ 0FE4h"); + + + + +extern volatile unsigned char POSTDEC1 __attribute__((address(0xFE5))); + +__asm("POSTDEC1 equ 0FE5h"); + + + + +extern volatile unsigned char POSTINC1 __attribute__((address(0xFE6))); + +__asm("POSTINC1 equ 0FE6h"); + + + + +extern volatile unsigned char INDF1 __attribute__((address(0xFE7))); + +__asm("INDF1 equ 0FE7h"); + + + + +extern volatile unsigned char WREG __attribute__((address(0xFE8))); + +__asm("WREG equ 0FE8h"); + + + + +extern volatile unsigned short FSR0 __attribute__((address(0xFE9))); + +__asm("FSR0 equ 0FE9h"); + + + + +extern volatile unsigned char FSR0L __attribute__((address(0xFE9))); + +__asm("FSR0L equ 0FE9h"); + + + + +extern volatile unsigned char FSR0H __attribute__((address(0xFEA))); + +__asm("FSR0H equ 0FEAh"); + + + + +extern volatile unsigned char PLUSW0 __attribute__((address(0xFEB))); + +__asm("PLUSW0 equ 0FEBh"); + + + + +extern volatile unsigned char PREINC0 __attribute__((address(0xFEC))); + +__asm("PREINC0 equ 0FECh"); + + + + +extern volatile unsigned char POSTDEC0 __attribute__((address(0xFED))); + +__asm("POSTDEC0 equ 0FEDh"); + + + + +extern volatile unsigned char POSTINC0 __attribute__((address(0xFEE))); + +__asm("POSTINC0 equ 0FEEh"); + + + + +extern volatile unsigned char INDF0 __attribute__((address(0xFEF))); + +__asm("INDF0 equ 0FEFh"); + + + + +extern volatile unsigned char INTCON3 __attribute__((address(0xFF0))); + +__asm("INTCON3 equ 0FF0h"); + + +typedef union { + struct { + unsigned INT1IF :1; + unsigned INT2IF :1; + unsigned INT3IF :1; + unsigned INT1IE :1; + unsigned INT2IE :1; + unsigned INT3IE :1; + unsigned INT1IP :1; + unsigned INT2IP :1; + }; + struct { + unsigned INT1F :1; + unsigned INT2F :1; + unsigned INT3F :1; + unsigned INT1E :1; + unsigned INT2E :1; + unsigned INT3E :1; + unsigned INT1P :1; + unsigned INT2P :1; + }; +} INTCON3bits_t; +extern volatile INTCON3bits_t INTCON3bits __attribute__((address(0xFF0))); +# 14266 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON2 __attribute__((address(0xFF1))); + +__asm("INTCON2 equ 0FF1h"); + + +typedef union { + struct { + unsigned :7; + unsigned NOT_RBPU :1; + }; + struct { + unsigned RBIP :1; + unsigned INT3IP :1; + unsigned TMR0IP :1; + unsigned INTEDG3 :1; + unsigned INTEDG2 :1; + unsigned INTEDG1 :1; + unsigned INTEDG0 :1; + unsigned nRBPU :1; + }; + struct { + unsigned :2; + unsigned T0IP :1; + unsigned :4; + unsigned RBPU :1; + }; +} INTCON2bits_t; +extern volatile INTCON2bits_t INTCON2bits __attribute__((address(0xFF1))); +# 14353 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0xFF2))); + +__asm("INTCON equ 0FF2h"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INT0IF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INT0IE :1; + unsigned TMR0IE :1; + unsigned PEIE_GIEL :1; + unsigned GIE_GIEH :1; + }; + struct { + unsigned :1; + unsigned INT0F :1; + unsigned T0IF :1; + unsigned :1; + unsigned INT0E :1; + unsigned T0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :6; + unsigned GIEL :1; + unsigned GIEH :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0xFF2))); +# 14470 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile unsigned short PROD __attribute__((address(0xFF3))); + +__asm("PROD equ 0FF3h"); + + + + +extern volatile unsigned char PRODL __attribute__((address(0xFF3))); + +__asm("PRODL equ 0FF3h"); + + + + +extern volatile unsigned char PRODH __attribute__((address(0xFF4))); + +__asm("PRODH equ 0FF4h"); + + + + +extern volatile unsigned char TABLAT __attribute__((address(0xFF5))); + +__asm("TABLAT equ 0FF5h"); + + + + + +extern volatile __uint24 TBLPTR __attribute__((address(0xFF6))); + + +__asm("TBLPTR equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRL __attribute__((address(0xFF6))); + +__asm("TBLPTRL equ 0FF6h"); + + + + +extern volatile unsigned char TBLPTRH __attribute__((address(0xFF7))); + +__asm("TBLPTRH equ 0FF7h"); + + + + +extern volatile unsigned char TBLPTRU __attribute__((address(0xFF8))); + +__asm("TBLPTRU equ 0FF8h"); + + + + + +extern volatile __uint24 PCLAT __attribute__((address(0xFF9))); + + +__asm("PCLAT equ 0FF9h"); + + + +extern volatile __uint24 PC __attribute__((address(0xFF9))); + + +__asm("PC equ 0FF9h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0xFF9))); + +__asm("PCL equ 0FF9h"); + + + + +extern volatile unsigned char PCLATH __attribute__((address(0xFFA))); + +__asm("PCLATH equ 0FFAh"); + + + + +extern volatile unsigned char PCLATU __attribute__((address(0xFFB))); + +__asm("PCLATU equ 0FFBh"); + + + + +extern volatile unsigned char STKPTR __attribute__((address(0xFFC))); + +__asm("STKPTR equ 0FFCh"); + + +typedef union { + struct { + unsigned STKPTR :5; + unsigned :1; + unsigned STKUNF :1; + unsigned STKFUL :1; + }; + struct { + unsigned STKPTR0 :1; + unsigned STKPTR1 :1; + unsigned STKPTR2 :1; + unsigned STKPTR3 :1; + unsigned STKPTR4 :1; + unsigned :2; + unsigned STKOVF :1; + }; + struct { + unsigned SP0 :1; + unsigned SP1 :1; + unsigned SP2 :1; + unsigned SP3 :1; + unsigned SP4 :1; + }; +} STKPTRbits_t; +extern volatile STKPTRbits_t STKPTRbits __attribute__((address(0xFFC))); +# 14670 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __uint24 TOS __attribute__((address(0xFFD))); + + +__asm("TOS equ 0FFDh"); + + + + +extern volatile unsigned char TOSL __attribute__((address(0xFFD))); + +__asm("TOSL equ 0FFDh"); + + + + +extern volatile unsigned char TOSH __attribute__((address(0xFFE))); + +__asm("TOSH equ 0FFEh"); + + + + +extern volatile unsigned char TOSU __attribute__((address(0xFFF))); + +__asm("TOSU equ 0FFFh"); +# 14709 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\proc\\pic18f97j60.h" 3 +extern volatile __bit ABDEN1 __attribute__((address(0x7BF0))); + + +extern volatile __bit ABDEN2 __attribute__((address(0x7BE0))); + + +extern volatile __bit __attribute__((__deprecated__)) ABDOVF __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF1 __attribute__((address(0x7BF7))); + + +extern volatile __bit ABDOVF2 __attribute__((address(0x7BE7))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKDT __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT1 __attribute__((address(0x7E2D))); + + +extern volatile __bit ACKDT2 __attribute__((address(0x7B15))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKEN __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN1 __attribute__((address(0x7E2C))); + + +extern volatile __bit ACKEN2 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ACKSTAT __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT1 __attribute__((address(0x7E2E))); + + +extern volatile __bit ACKSTAT2 __attribute__((address(0x7B16))); + + +extern volatile __bit ACQT0 __attribute__((address(0x7E03))); + + +extern volatile __bit ACQT1 __attribute__((address(0x7E04))); + + +extern volatile __bit ACQT2 __attribute__((address(0x7E05))); + + +extern volatile __bit AD0 __attribute__((address(0x7C18))); + + +extern volatile __bit AD1 __attribute__((address(0x7C19))); + + +extern volatile __bit AD10 __attribute__((address(0x7C22))); + + +extern volatile __bit AD11 __attribute__((address(0x7C23))); + + +extern volatile __bit AD12 __attribute__((address(0x7C24))); + + +extern volatile __bit AD13 __attribute__((address(0x7C25))); + + +extern volatile __bit AD14 __attribute__((address(0x7C26))); + + +extern volatile __bit AD15 __attribute__((address(0x7C27))); + + +extern volatile __bit AD16 __attribute__((address(0x7C38))); + + +extern volatile __bit AD17 __attribute__((address(0x7C39))); + + +extern volatile __bit AD18 __attribute__((address(0x7C3A))); + + +extern volatile __bit AD19 __attribute__((address(0x7C3B))); + + +extern volatile __bit AD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit AD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit AD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit AD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit AD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit AD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit AD8 __attribute__((address(0x7C20))); + + +extern volatile __bit AD9 __attribute__((address(0x7C21))); + + +extern volatile __bit ADCAL __attribute__((address(0x7E17))); + + +extern volatile __bit ADCS0 __attribute__((address(0x7E00))); + + +extern volatile __bit ADCS1 __attribute__((address(0x7E01))); + + +extern volatile __bit ADCS2 __attribute__((address(0x7E02))); + + +extern volatile __bit __attribute__((__deprecated__)) ADDEN __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN1 __attribute__((address(0x7D5B))); + + +extern volatile __bit ADDEN2 __attribute__((address(0x7B5B))); + + +extern volatile __bit ADFM __attribute__((address(0x7E07))); + + +extern volatile __bit ADIE __attribute__((address(0x7CEE))); + + +extern volatile __bit ADIF __attribute__((address(0x7CF6))); + + +extern volatile __bit ADIP __attribute__((address(0x7CFE))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK1 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK11 __attribute__((address(0x7E29))); + + +extern volatile __bit ADMSK12 __attribute__((address(0x7B11))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK2 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK21 __attribute__((address(0x7E2A))); + + +extern volatile __bit ADMSK22 __attribute__((address(0x7B12))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK3 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK31 __attribute__((address(0x7E2B))); + + +extern volatile __bit ADMSK32 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK4 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK41 __attribute__((address(0x7E2C))); + + +extern volatile __bit ADMSK42 __attribute__((address(0x7B14))); + + +extern volatile __bit __attribute__((__deprecated__)) ADMSK5 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK51 __attribute__((address(0x7E2D))); + + +extern volatile __bit ADMSK52 __attribute__((address(0x7B15))); + + +extern volatile __bit ADON __attribute__((address(0x7E10))); + + +extern volatile __bit ALE __attribute__((address(0x7C40))); + + +extern volatile __bit AN0 __attribute__((address(0x7C00))); + + +extern volatile __bit AN1 __attribute__((address(0x7C01))); + + +extern volatile __bit AN10 __attribute__((address(0x7C2D))); + + +extern volatile __bit AN11 __attribute__((address(0x7C2E))); + + +extern volatile __bit AN12 __attribute__((address(0x7C3C))); + + +extern volatile __bit AN13 __attribute__((address(0x7C3D))); + + +extern volatile __bit AN14 __attribute__((address(0x7C3E))); + + +extern volatile __bit AN15 __attribute__((address(0x7C3F))); + + +extern volatile __bit AN2 __attribute__((address(0x7C02))); + + +extern volatile __bit AN3 __attribute__((address(0x7C03))); + + +extern volatile __bit AN4 __attribute__((address(0x7C05))); + + +extern volatile __bit AN5 __attribute__((address(0x7C28))); + + +extern volatile __bit AN6 __attribute__((address(0x7C29))); + + +extern volatile __bit AN7 __attribute__((address(0x7C2A))); + + +extern volatile __bit AN8 __attribute__((address(0x7C2B))); + + +extern volatile __bit AN9 __attribute__((address(0x7C2C))); + + +extern volatile __bit ANDOR __attribute__((address(0x76C6))); + + +extern volatile __bit AUTOINC __attribute__((address(0x77F7))); + + +extern volatile __bit BA0 __attribute__((address(0x7C44))); + + +extern volatile __bit BBIPG0 __attribute__((address(0x7520))); + + +extern volatile __bit BBIPG1 __attribute__((address(0x7521))); + + +extern volatile __bit BBIPG2 __attribute__((address(0x7522))); + + +extern volatile __bit BBIPG3 __attribute__((address(0x7523))); + + +extern volatile __bit BBIPG4 __attribute__((address(0x7524))); + + +extern volatile __bit BBIPG5 __attribute__((address(0x7525))); + + +extern volatile __bit BBIPG6 __attribute__((address(0x7526))); + + +extern volatile __bit BCEN __attribute__((address(0x76C0))); + + +extern volatile __bit BCL1IE __attribute__((address(0x7D03))); + + +extern volatile __bit BCL1IF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCL1IP __attribute__((address(0x7D13))); + + +extern volatile __bit BCL2IE __attribute__((address(0x7D1E))); + + +extern volatile __bit BCL2IF __attribute__((address(0x7D26))); + + +extern volatile __bit BCL2IP __attribute__((address(0x7D2E))); + + +extern volatile __bit BCLIE __attribute__((address(0x7D03))); + + +extern volatile __bit BCLIF __attribute__((address(0x7D0B))); + + +extern volatile __bit BCLIP __attribute__((address(0x7D13))); + + +extern volatile __bit __attribute__((__deprecated__)) BF __attribute__((address(0x7E38))); + + +extern volatile __bit BF1 __attribute__((address(0x7E38))); + + +extern volatile __bit BF2 __attribute__((address(0x7B20))); + + +extern volatile __bit BOR __attribute__((address(0x7E80))); + + +extern volatile __bit __attribute__((__deprecated__)) BRG16 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG161 __attribute__((address(0x7BF3))); + + +extern volatile __bit BRG162 __attribute__((address(0x7BE3))); + + +extern volatile __bit __attribute__((__deprecated__)) BRGH __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH1 __attribute__((address(0x7D62))); + + +extern volatile __bit BRGH2 __attribute__((address(0x7B62))); + + +extern volatile __bit BUFER __attribute__((address(0x77EE))); + + +extern volatile __bit BUSY __attribute__((address(0x7450))); + + +extern volatile __bit C1INV __attribute__((address(0x7DA4))); + + +extern volatile __bit C1OUT __attribute__((address(0x7DA6))); + + +extern volatile __bit C1OUTF __attribute__((address(0x7C2A))); + + +extern volatile __bit C2INV __attribute__((address(0x7DA5))); + + +extern volatile __bit C2OUT __attribute__((address(0x7DA7))); + + +extern volatile __bit C2OUTF __attribute__((address(0x7C29))); + + +extern volatile __bit C3OUTG __attribute__((address(0x7C31))); + + +extern volatile __bit CARRY __attribute__((address(0x7EC0))); + + +extern volatile __bit CCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit CCP10 __attribute__((address(0x7C22))); + + +extern volatile __bit CCP1IE __attribute__((address(0x7CEA))); + + +extern volatile __bit CCP1IF __attribute__((address(0x7CF2))); + + +extern volatile __bit CCP1IP __attribute__((address(0x7CFA))); + + +extern volatile __bit CCP1M0 __attribute__((address(0x7DE8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0x7DE9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0x7DEA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0x7DEB))); + + +extern volatile __bit CCP1X __attribute__((address(0x7DED))); + + +extern volatile __bit CCP1Y __attribute__((address(0x7DEC))); + + +extern volatile __bit CCP2E __attribute__((address(0x7C27))); + + +extern volatile __bit CCP2IE __attribute__((address(0x7D00))); + + +extern volatile __bit CCP2IF __attribute__((address(0x7D08))); + + +extern volatile __bit CCP2IP __attribute__((address(0x7D10))); + + +extern volatile __bit CCP2M0 __attribute__((address(0x7DD0))); + + +extern volatile __bit CCP2M1 __attribute__((address(0x7DD1))); + + +extern volatile __bit CCP2M2 __attribute__((address(0x7DD2))); + + +extern volatile __bit CCP2M3 __attribute__((address(0x7DD3))); + + +extern volatile __bit CCP2X __attribute__((address(0x7DD5))); + + +extern volatile __bit CCP2Y __attribute__((address(0x7DD4))); + + +extern volatile __bit CCP2_PA2 __attribute__((address(0x7C0B))); + + +extern volatile __bit CCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit CCP3IE __attribute__((address(0x7D18))); + + +extern volatile __bit CCP3IF __attribute__((address(0x7D20))); + + +extern volatile __bit CCP3IP __attribute__((address(0x7D28))); + + +extern volatile __bit CCP3M0 __attribute__((address(0x7DB8))); + + +extern volatile __bit CCP3M1 __attribute__((address(0x7DB9))); + + +extern volatile __bit CCP3M2 __attribute__((address(0x7DBA))); + + +extern volatile __bit CCP3M3 __attribute__((address(0x7DBB))); + + +extern volatile __bit CCP3X __attribute__((address(0x7DBD))); + + +extern volatile __bit CCP3Y __attribute__((address(0x7DBC))); + + +extern volatile __bit CCP4 __attribute__((address(0x7C33))); + + +extern volatile __bit CCP4IE __attribute__((address(0x7D19))); + + +extern volatile __bit CCP4IF __attribute__((address(0x7D21))); + + +extern volatile __bit CCP4IP __attribute__((address(0x7D29))); + + +extern volatile __bit CCP4M0 __attribute__((address(0x7B98))); + + +extern volatile __bit CCP4M1 __attribute__((address(0x7B99))); + + +extern volatile __bit CCP4M2 __attribute__((address(0x7B9A))); + + +extern volatile __bit CCP4M3 __attribute__((address(0x7B9B))); + + +extern volatile __bit CCP4X __attribute__((address(0x7B9D))); + + +extern volatile __bit CCP4Y __attribute__((address(0x7B9C))); + + +extern volatile __bit CCP5 __attribute__((address(0x7C34))); + + +extern volatile __bit CCP5IE __attribute__((address(0x7D1A))); + + +extern volatile __bit CCP5IF __attribute__((address(0x7D22))); + + +extern volatile __bit CCP5IP __attribute__((address(0x7D2A))); + + +extern volatile __bit CCP5M0 __attribute__((address(0x7B80))); + + +extern volatile __bit CCP5M1 __attribute__((address(0x7B81))); + + +extern volatile __bit CCP5M2 __attribute__((address(0x7B82))); + + +extern volatile __bit CCP5M3 __attribute__((address(0x7B83))); + + +extern volatile __bit CCP5X __attribute__((address(0x7B85))); + + +extern volatile __bit CCP5Y __attribute__((address(0x7B84))); + + +extern volatile __bit CCP6 __attribute__((address(0x7C3F))); + + +extern volatile __bit CCP6E __attribute__((address(0x7C26))); + + +extern volatile __bit CCP7 __attribute__((address(0x7C3E))); + + +extern volatile __bit CCP7E __attribute__((address(0x7C25))); + + +extern volatile __bit CCP8 __attribute__((address(0x7C3D))); + + +extern volatile __bit CCP8E __attribute__((address(0x7C24))); + + +extern volatile __bit CCP9 __attribute__((address(0x7C3C))); + + +extern volatile __bit CCP9E __attribute__((address(0x7C23))); + + +extern volatile __bit CE __attribute__((address(0x7C45))); + + +extern volatile __bit CHS0 __attribute__((address(0x7E12))); + + +extern volatile __bit CHS1 __attribute__((address(0x7E13))); + + +extern volatile __bit CHS2 __attribute__((address(0x7E14))); + + +extern volatile __bit CHS3 __attribute__((address(0x7E15))); + + +extern volatile __bit CHSN3 __attribute__((address(0x7E0B))); + + +extern volatile __bit CIS __attribute__((address(0x7DA3))); + + +extern volatile __bit CK __attribute__((address(0x7C16))); + + +extern volatile __bit CK1 __attribute__((address(0x7C16))); + + +extern volatile __bit CK2 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) CKE __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE1 __attribute__((address(0x7E3E))); + + +extern volatile __bit CKE2 __attribute__((address(0x7B26))); + + +extern volatile __bit __attribute__((__deprecated__)) CKP __attribute__((address(0x7E34))); + + +extern volatile __bit CKP1 __attribute__((address(0x7E34))); + + +extern volatile __bit CKP2 __attribute__((address(0x7B1C))); + + +extern volatile __bit CKTXP __attribute__((address(0x7BF4))); + + +extern volatile __bit CM __attribute__((address(0x7E85))); + + +extern volatile __bit CM0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CM1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CM2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMEN0 __attribute__((address(0x7DA0))); + + +extern volatile __bit CMEN1 __attribute__((address(0x7DA1))); + + +extern volatile __bit CMEN2 __attribute__((address(0x7DA2))); + + +extern volatile __bit CMIE __attribute__((address(0x7D06))); + + +extern volatile __bit CMIF __attribute__((address(0x7D0E))); + + +extern volatile __bit CMIP __attribute__((address(0x7D16))); + + +extern volatile __bit CRCEN __attribute__((address(0x76C5))); + + +extern volatile __bit __attribute__((__deprecated__)) CREN __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN1 __attribute__((address(0x7D5C))); + + +extern volatile __bit CREN2 __attribute__((address(0x7B5C))); + + +extern volatile __bit CS __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) CSRC __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC1 __attribute__((address(0x7D67))); + + +extern volatile __bit CSRC2 __attribute__((address(0x7B67))); + + +extern volatile __bit CSUMEN __attribute__((address(0x7E94))); + + +extern volatile __bit CVR0 __attribute__((address(0x7DA8))); + + +extern volatile __bit CVR1 __attribute__((address(0x7DA9))); + + +extern volatile __bit CVR2 __attribute__((address(0x7DAA))); + + +extern volatile __bit CVR3 __attribute__((address(0x7DAB))); + + +extern volatile __bit CVREF __attribute__((address(0x7C2D))); + + +extern volatile __bit CVREN __attribute__((address(0x7DAF))); + + +extern volatile __bit CVROE __attribute__((address(0x7DAE))); + + +extern volatile __bit CVROEN __attribute__((address(0x7DAE))); + + +extern volatile __bit CVRR __attribute__((address(0x7DAD))); + + +extern volatile __bit CVRSS __attribute__((address(0x7DAC))); + + +extern volatile __bit DA __attribute__((address(0x7E3D))); + + +extern volatile __bit DA1 __attribute__((address(0x7E3D))); + + +extern volatile __bit DA2 __attribute__((address(0x7B25))); + + +extern volatile __bit DATA_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit DC __attribute__((address(0x7EC1))); + + +extern volatile __bit DC1B0 __attribute__((address(0x7DEC))); + + +extern volatile __bit DC1B1 __attribute__((address(0x7DED))); + + +extern volatile __bit DC2B0 __attribute__((address(0x7DD4))); + + +extern volatile __bit DC2B1 __attribute__((address(0x7DD5))); + + +extern volatile __bit DC3B0 __attribute__((address(0x7DBC))); + + +extern volatile __bit DC3B1 __attribute__((address(0x7DBD))); + + +extern volatile __bit DC4B0 __attribute__((address(0x7B9C))); + + +extern volatile __bit DC4B1 __attribute__((address(0x7B9D))); + + +extern volatile __bit DC5B0 __attribute__((address(0x7B84))); + + +extern volatile __bit DC5B1 __attribute__((address(0x7B85))); + + +extern volatile __bit DEFER __attribute__((address(0x751E))); + + +extern volatile __bit DMAIE __attribute__((address(0x77DD))); + + +extern volatile __bit DMAIF __attribute__((address(0x7B05))); + + +extern volatile __bit DMAST __attribute__((address(0x7E95))); + + +extern volatile __bit DONE __attribute__((address(0x7E11))); + + +extern volatile __bit DT __attribute__((address(0x7C17))); + + +extern volatile __bit DT1 __attribute__((address(0x7C17))); + + +extern volatile __bit DT2 __attribute__((address(0x7C32))); + + +extern volatile __bit DTRXP __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit DTRXP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit D_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit D_nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit EBDIS __attribute__((address(0x7CE7))); + + +extern volatile __bit ECCP1 __attribute__((address(0x7C12))); + + +extern volatile __bit ECCP1AS0 __attribute__((address(0x7DB4))); + + +extern volatile __bit ECCP1AS1 __attribute__((address(0x7DB5))); + + +extern volatile __bit ECCP1AS2 __attribute__((address(0x7DB6))); + + +extern volatile __bit ECCP1ASE __attribute__((address(0x7DB7))); + + +extern volatile __bit ECCP2AS0 __attribute__((address(0x7B44))); + + +extern volatile __bit ECCP2AS1 __attribute__((address(0x7B45))); + + +extern volatile __bit ECCP2AS2 __attribute__((address(0x7B46))); + + +extern volatile __bit ECCP2ASE __attribute__((address(0x7B47))); + + +extern volatile __bit ECCP3 __attribute__((address(0x7C30))); + + +extern volatile __bit ECCP3AS0 __attribute__((address(0x7B54))); + + +extern volatile __bit ECCP3AS1 __attribute__((address(0x7B55))); + + +extern volatile __bit ECCP3AS2 __attribute__((address(0x7B56))); + + +extern volatile __bit ECCP3ASE __attribute__((address(0x7B57))); + + +extern volatile __bit EDATA0 __attribute__((address(0x7B08))); + + +extern volatile __bit EDATA1 __attribute__((address(0x7B09))); + + +extern volatile __bit EDATA2 __attribute__((address(0x7B0A))); + + +extern volatile __bit EDATA3 __attribute__((address(0x7B0B))); + + +extern volatile __bit EDATA4 __attribute__((address(0x7B0C))); + + +extern volatile __bit EDATA5 __attribute__((address(0x7B0D))); + + +extern volatile __bit EDATA6 __attribute__((address(0x7B0E))); + + +extern volatile __bit EDATA7 __attribute__((address(0x7B0F))); + + +extern volatile __bit ETHEN __attribute__((address(0x77F5))); + + +extern volatile __bit ETHIE __attribute__((address(0x7D05))); + + +extern volatile __bit ETHIF __attribute__((address(0x7D0D))); + + +extern volatile __bit ETHIP __attribute__((address(0x7D15))); + + +extern volatile __bit ETXIE __attribute__((address(0x77DB))); + + +extern volatile __bit ETXIF __attribute__((address(0x7B03))); + + +extern volatile __bit FCEN0 __attribute__((address(0x74B8))); + + +extern volatile __bit FCEN1 __attribute__((address(0x74B9))); + + +extern volatile __bit __attribute__((__deprecated__)) FERR __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR1 __attribute__((address(0x7D5A))); + + +extern volatile __bit FERR2 __attribute__((address(0x7B5A))); + + +extern volatile __bit FLT0 __attribute__((address(0x7C08))); + + +extern volatile __bit FREE __attribute__((address(0x7D34))); + + +extern volatile __bit FRMLNEN __attribute__((address(0x7511))); + + +extern volatile __bit FULDPX __attribute__((address(0x7510))); + + +extern volatile __bit FULDPXS __attribute__((address(0x74BA))); + + +extern volatile __bit __attribute__((__deprecated__)) GCEN __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN1 __attribute__((address(0x7E2F))); + + +extern volatile __bit GCEN2 __attribute__((address(0x7B17))); + + +extern volatile __bit GIE __attribute__((address(0x7F97))); + + +extern volatile __bit GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit GIE_GIEH __attribute__((address(0x7F97))); + + +extern volatile __bit GO __attribute__((address(0x7E11))); + + +extern volatile __bit GODONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit GO_nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit HFRMEN __attribute__((address(0x7512))); + + +extern volatile __bit HTEN __attribute__((address(0x76C2))); + + +extern volatile __bit I2C_DAT2 __attribute__((address(0x7B25))); + + +extern volatile __bit I2C_READ2 __attribute__((address(0x7B22))); + + +extern volatile __bit I2C_START2 __attribute__((address(0x7B23))); + + +extern volatile __bit I2C_STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit IBF __attribute__((address(0x7D87))); + + +extern volatile __bit IBOV __attribute__((address(0x7D85))); + + +extern volatile __bit IDLEN __attribute__((address(0x7E9F))); + + +extern volatile __bit INT0 __attribute__((address(0x7C08))); + + +extern volatile __bit INT0E __attribute__((address(0x7F94))); + + +extern volatile __bit INT0F __attribute__((address(0x7F91))); + + +extern volatile __bit INT0IE __attribute__((address(0x7F94))); + + +extern volatile __bit INT0IF __attribute__((address(0x7F91))); + + +extern volatile __bit INT1 __attribute__((address(0x7C09))); + + +extern volatile __bit INT1E __attribute__((address(0x7F83))); + + +extern volatile __bit INT1F __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IE __attribute__((address(0x7F83))); + + +extern volatile __bit INT1IF __attribute__((address(0x7F80))); + + +extern volatile __bit INT1IP __attribute__((address(0x7F86))); + + +extern volatile __bit INT1P __attribute__((address(0x7F86))); + + +extern volatile __bit INT2 __attribute__((address(0x7C0A))); + + +extern volatile __bit INT2E __attribute__((address(0x7F84))); + + +extern volatile __bit INT2F __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IE __attribute__((address(0x7F84))); + + +extern volatile __bit INT2IF __attribute__((address(0x7F81))); + + +extern volatile __bit INT2IP __attribute__((address(0x7F87))); + + +extern volatile __bit INT2P __attribute__((address(0x7F87))); + + +extern volatile __bit INT3 __attribute__((address(0x7C0B))); + + +extern volatile __bit INT3E __attribute__((address(0x7F85))); + + +extern volatile __bit INT3F __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IE __attribute__((address(0x7F85))); + + +extern volatile __bit INT3IF __attribute__((address(0x7F82))); + + +extern volatile __bit INT3IP __attribute__((address(0x7F89))); + + +extern volatile __bit INTEDG0 __attribute__((address(0x7F8E))); + + +extern volatile __bit INTEDG1 __attribute__((address(0x7F8D))); + + +extern volatile __bit INTEDG2 __attribute__((address(0x7F8C))); + + +extern volatile __bit INTEDG3 __attribute__((address(0x7F8B))); + + +extern volatile __bit IPEN __attribute__((address(0x7E87))); + + +extern volatile __bit KBI0 __attribute__((address(0x7C0C))); + + +extern volatile __bit KBI1 __attribute__((address(0x7C0D))); + + +extern volatile __bit KBI2 __attribute__((address(0x7C0E))); + + +extern volatile __bit KBI3 __attribute__((address(0x7C0F))); + + +extern volatile __bit LA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LA6 __attribute__((address(0x7C4E))); + + +extern volatile __bit LA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATA0 __attribute__((address(0x7C48))); + + +extern volatile __bit LATA1 __attribute__((address(0x7C49))); + + +extern volatile __bit LATA2 __attribute__((address(0x7C4A))); + + +extern volatile __bit LATA3 __attribute__((address(0x7C4B))); + + +extern volatile __bit LATA4 __attribute__((address(0x7C4C))); + + +extern volatile __bit LATA5 __attribute__((address(0x7C4D))); + + +extern volatile __bit LATA7 __attribute__((address(0x7C4F))); + + +extern volatile __bit LATB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LATB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LATB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LATB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LATB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LATB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LATB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LATB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LATC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LATC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LATC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LATC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LATC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LATC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LATC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LATC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LATD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LATD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LATD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LATD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LATD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LATD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LATD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LATD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LATE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LATE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LATE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LATE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LATE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LATE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LATE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LATE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LATF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LATF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LATF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LATF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LATF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LATF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LATF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LATF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LATG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LATG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LATG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LATG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LATG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LATG5 __attribute__((address(0x7C7D))); + + +extern volatile __bit LATG6 __attribute__((address(0x7C7E))); + + +extern volatile __bit LATG7 __attribute__((address(0x7C7F))); + + +extern volatile __bit LATH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LATH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LATH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LATH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LATH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LATH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LATH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LATH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LATJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LATJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LATJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LATJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LATJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LATJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LATJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LATJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LB __attribute__((address(0x7C46))); + + +extern volatile __bit LB0 __attribute__((address(0x7C50))); + + +extern volatile __bit LB1 __attribute__((address(0x7C51))); + + +extern volatile __bit LB2 __attribute__((address(0x7C52))); + + +extern volatile __bit LB3 __attribute__((address(0x7C53))); + + +extern volatile __bit LB4 __attribute__((address(0x7C54))); + + +extern volatile __bit LB5 __attribute__((address(0x7C55))); + + +extern volatile __bit LB6 __attribute__((address(0x7C56))); + + +extern volatile __bit LB7 __attribute__((address(0x7C57))); + + +extern volatile __bit LC0 __attribute__((address(0x7C58))); + + +extern volatile __bit LC1 __attribute__((address(0x7C59))); + + +extern volatile __bit LC2 __attribute__((address(0x7C5A))); + + +extern volatile __bit LC3 __attribute__((address(0x7C5B))); + + +extern volatile __bit LC4 __attribute__((address(0x7C5C))); + + +extern volatile __bit LC5 __attribute__((address(0x7C5D))); + + +extern volatile __bit LC6 __attribute__((address(0x7C5E))); + + +extern volatile __bit LC7 __attribute__((address(0x7C5F))); + + +extern volatile __bit LD0 __attribute__((address(0x7C60))); + + +extern volatile __bit LD1 __attribute__((address(0x7C61))); + + +extern volatile __bit LD2 __attribute__((address(0x7C62))); + + +extern volatile __bit LD3 __attribute__((address(0x7C63))); + + +extern volatile __bit LD4 __attribute__((address(0x7C64))); + + +extern volatile __bit LD5 __attribute__((address(0x7C65))); + + +extern volatile __bit LD6 __attribute__((address(0x7C66))); + + +extern volatile __bit LD7 __attribute__((address(0x7C67))); + + +extern volatile __bit LE0 __attribute__((address(0x7C68))); + + +extern volatile __bit LE1 __attribute__((address(0x7C69))); + + +extern volatile __bit LE2 __attribute__((address(0x7C6A))); + + +extern volatile __bit LE3 __attribute__((address(0x7C6B))); + + +extern volatile __bit LE4 __attribute__((address(0x7C6C))); + + +extern volatile __bit LE5 __attribute__((address(0x7C6D))); + + +extern volatile __bit LE6 __attribute__((address(0x7C6E))); + + +extern volatile __bit LE7 __attribute__((address(0x7C6F))); + + +extern volatile __bit LEDA __attribute__((address(0x7C00))); + + +extern volatile __bit LEDB __attribute__((address(0x7C01))); + + +extern volatile __bit LF0 __attribute__((address(0x7C70))); + + +extern volatile __bit LF1 __attribute__((address(0x7C71))); + + +extern volatile __bit LF2 __attribute__((address(0x7C72))); + + +extern volatile __bit LF3 __attribute__((address(0x7C73))); + + +extern volatile __bit LF4 __attribute__((address(0x7C74))); + + +extern volatile __bit LF5 __attribute__((address(0x7C75))); + + +extern volatile __bit LF6 __attribute__((address(0x7C76))); + + +extern volatile __bit LF7 __attribute__((address(0x7C77))); + + +extern volatile __bit LG0 __attribute__((address(0x7C78))); + + +extern volatile __bit LG1 __attribute__((address(0x7C79))); + + +extern volatile __bit LG2 __attribute__((address(0x7C7A))); + + +extern volatile __bit LG3 __attribute__((address(0x7C7B))); + + +extern volatile __bit LG4 __attribute__((address(0x7C7C))); + + +extern volatile __bit LH0 __attribute__((address(0x7C80))); + + +extern volatile __bit LH1 __attribute__((address(0x7C81))); + + +extern volatile __bit LH2 __attribute__((address(0x7C82))); + + +extern volatile __bit LH3 __attribute__((address(0x7C83))); + + +extern volatile __bit LH4 __attribute__((address(0x7C84))); + + +extern volatile __bit LH5 __attribute__((address(0x7C85))); + + +extern volatile __bit LH6 __attribute__((address(0x7C86))); + + +extern volatile __bit LH7 __attribute__((address(0x7C87))); + + +extern volatile __bit LINKIE __attribute__((address(0x77DC))); + + +extern volatile __bit LINKIF __attribute__((address(0x7B04))); + + +extern volatile __bit LJ0 __attribute__((address(0x7C88))); + + +extern volatile __bit LJ1 __attribute__((address(0x7C89))); + + +extern volatile __bit LJ2 __attribute__((address(0x7C8A))); + + +extern volatile __bit LJ3 __attribute__((address(0x7C8B))); + + +extern volatile __bit LJ4 __attribute__((address(0x7C8C))); + + +extern volatile __bit LJ5 __attribute__((address(0x7C8D))); + + +extern volatile __bit LJ6 __attribute__((address(0x7C8E))); + + +extern volatile __bit LJ7 __attribute__((address(0x7C8F))); + + +extern volatile __bit LVDIN __attribute__((address(0x7C05))); + + +extern volatile __bit MARXEN __attribute__((address(0x7500))); + + +extern volatile __bit MCEN __attribute__((address(0x76C1))); + + +extern volatile __bit MIIRD __attribute__((address(0x7590))); + + +extern volatile __bit MIISCAN __attribute__((address(0x7591))); + + +extern volatile __bit MPEN __attribute__((address(0x76C3))); + + +extern volatile __bit MSK0 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK01 __attribute__((address(0x7E40))); + + +extern volatile __bit MSK02 __attribute__((address(0x7B28))); + + +extern volatile __bit MSK1 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK11 __attribute__((address(0x7E41))); + + +extern volatile __bit MSK12 __attribute__((address(0x7B29))); + + +extern volatile __bit MSK2 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK21 __attribute__((address(0x7E42))); + + +extern volatile __bit MSK22 __attribute__((address(0x7B2A))); + + +extern volatile __bit MSK3 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK31 __attribute__((address(0x7E43))); + + +extern volatile __bit MSK32 __attribute__((address(0x7B2B))); + + +extern volatile __bit MSK4 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK41 __attribute__((address(0x7E44))); + + +extern volatile __bit MSK42 __attribute__((address(0x7B2C))); + + +extern volatile __bit MSK5 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK51 __attribute__((address(0x7E45))); + + +extern volatile __bit MSK52 __attribute__((address(0x7B2D))); + + +extern volatile __bit MSK6 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK61 __attribute__((address(0x7E46))); + + +extern volatile __bit MSK62 __attribute__((address(0x7B2E))); + + +extern volatile __bit MSK7 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK71 __attribute__((address(0x7E47))); + + +extern volatile __bit MSK72 __attribute__((address(0x7B2F))); + + +extern volatile __bit NEGATIVE __attribute__((address(0x7EC4))); + + +extern volatile __bit NOT_A __attribute__((address(0x7E3D))); + + +extern volatile __bit NOT_A2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_ADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit NOT_BOR __attribute__((address(0x7E80))); + + +extern volatile __bit NOT_CE __attribute__((address(0x7C45))); + + +extern volatile __bit NOT_CM __attribute__((address(0x7E85))); + + +extern volatile __bit NOT_CS __attribute__((address(0x7C22))); + + +extern volatile __bit NOT_DONE __attribute__((address(0x7E11))); + + +extern volatile __bit NOT_LB __attribute__((address(0x7C46))); + + +extern volatile __bit NOT_OE __attribute__((address(0x7C41))); + + +extern volatile __bit NOT_PD __attribute__((address(0x7E82))); + + +extern volatile __bit NOT_POR __attribute__((address(0x7E81))); + + +extern volatile __bit NOT_RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit NOT_RD __attribute__((address(0x7C20))); + + +extern volatile __bit NOT_RI __attribute__((address(0x7E84))); + + +extern volatile __bit NOT_SS __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit NOT_SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit NOT_T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit NOT_T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit NOT_TO __attribute__((address(0x7E83))); + + +extern volatile __bit NOT_UB __attribute__((address(0x7C47))); + + +extern volatile __bit NOT_W __attribute__((address(0x7E3A))); + + +extern volatile __bit NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WR __attribute__((address(0x7C21))); + + +extern volatile __bit NOT_WRH __attribute__((address(0x7C43))); + + +extern volatile __bit NOT_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit NOT_WRL __attribute__((address(0x7C42))); + + +extern volatile __bit NVALID __attribute__((address(0x7452))); + + +extern volatile __bit OBF __attribute__((address(0x7D86))); + + +extern volatile __bit OE __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) OERR __attribute__((address(0x7D59))); + + +extern volatile __bit OERR1 __attribute__((address(0x7D59))); + + +extern volatile __bit OERR2 __attribute__((address(0x7B59))); + + +extern volatile __bit OSCFIE __attribute__((address(0x7D07))); + + +extern volatile __bit OSCFIF __attribute__((address(0x7D0F))); + + +extern volatile __bit OSCFIP __attribute__((address(0x7D17))); + + +extern volatile __bit OSTS __attribute__((address(0x7E9B))); + + +extern volatile __bit OV __attribute__((address(0x7EC3))); + + +extern volatile __bit OVERFLOW __attribute__((address(0x7EC3))); + + +extern volatile __bit P1DC0 __attribute__((address(0x7BC8))); + + +extern volatile __bit P1DC1 __attribute__((address(0x7BC9))); + + +extern volatile __bit P1DC2 __attribute__((address(0x7BCA))); + + +extern volatile __bit P1DC3 __attribute__((address(0x7BCB))); + + +extern volatile __bit P1DC4 __attribute__((address(0x7BCC))); + + +extern volatile __bit P1DC5 __attribute__((address(0x7BCD))); + + +extern volatile __bit P1DC6 __attribute__((address(0x7BCE))); + + +extern volatile __bit P1M0 __attribute__((address(0x7DEE))); + + +extern volatile __bit P1M1 __attribute__((address(0x7DEF))); + + +extern volatile __bit P1RSEN __attribute__((address(0x7BCF))); + + +extern volatile __bit P2 __attribute__((address(0x7B24))); + + +extern volatile __bit P2DC0 __attribute__((address(0x7B38))); + + +extern volatile __bit P2DC1 __attribute__((address(0x7B39))); + + +extern volatile __bit P2DC2 __attribute__((address(0x7B3A))); + + +extern volatile __bit P2DC3 __attribute__((address(0x7B3B))); + + +extern volatile __bit P2DC4 __attribute__((address(0x7B3C))); + + +extern volatile __bit P2DC5 __attribute__((address(0x7B3D))); + + +extern volatile __bit P2DC6 __attribute__((address(0x7B3E))); + + +extern volatile __bit P2M0 __attribute__((address(0x7DD6))); + + +extern volatile __bit P2M1 __attribute__((address(0x7DD7))); + + +extern volatile __bit P2RSEN __attribute__((address(0x7B3F))); + + +extern volatile __bit P3DC0 __attribute__((address(0x7B48))); + + +extern volatile __bit P3DC1 __attribute__((address(0x7B49))); + + +extern volatile __bit P3DC2 __attribute__((address(0x7B4A))); + + +extern volatile __bit P3DC3 __attribute__((address(0x7B4B))); + + +extern volatile __bit P3DC4 __attribute__((address(0x7B4C))); + + +extern volatile __bit P3DC5 __attribute__((address(0x7B4D))); + + +extern volatile __bit P3DC6 __attribute__((address(0x7B4E))); + + +extern volatile __bit P3M0 __attribute__((address(0x7DBE))); + + +extern volatile __bit P3M1 __attribute__((address(0x7DBF))); + + +extern volatile __bit P3RSEN __attribute__((address(0x7B4F))); + + +extern volatile __bit PA1 __attribute__((address(0x7C12))); + + +extern volatile __bit PA2 __attribute__((address(0x7C11))); + + +extern volatile __bit PA2E __attribute__((address(0x7C27))); + + +extern volatile __bit PADCFG0 __attribute__((address(0x7515))); + + +extern volatile __bit PADCFG1 __attribute__((address(0x7516))); + + +extern volatile __bit PADCFG2 __attribute__((address(0x7517))); + + +extern volatile __bit PASSALL __attribute__((address(0x7501))); + + +extern volatile __bit PB1 __attribute__((address(0x7C3F))); + + +extern volatile __bit PB1E __attribute__((address(0x7C26))); + + +extern volatile __bit PB2 __attribute__((address(0x7C22))); + + +extern volatile __bit PB3 __attribute__((address(0x7C3D))); + + +extern volatile __bit PB3E __attribute__((address(0x7C24))); + + +extern volatile __bit PC1 __attribute__((address(0x7C3E))); + + +extern volatile __bit PC1E __attribute__((address(0x7C25))); + + +extern volatile __bit PC2 __attribute__((address(0x7C21))); + + +extern volatile __bit PC3 __attribute__((address(0x7C3C))); + + +extern volatile __bit PC3E __attribute__((address(0x7C23))); + + +extern volatile __bit PCFG0 __attribute__((address(0x7E08))); + + +extern volatile __bit PCFG1 __attribute__((address(0x7E09))); + + +extern volatile __bit PCFG2 __attribute__((address(0x7E0A))); + + +extern volatile __bit PCFG3 __attribute__((address(0x7E0B))); + + +extern volatile __bit PD __attribute__((address(0x7E82))); + + +extern volatile __bit PD2 __attribute__((address(0x7C20))); + + +extern volatile __bit PEIE __attribute__((address(0x7F96))); + + +extern volatile __bit PEIE_GIEL __attribute__((address(0x7F96))); + + +extern volatile __bit __attribute__((__deprecated__)) PEN __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN1 __attribute__((address(0x7E2A))); + + +extern volatile __bit PEN2 __attribute__((address(0x7B12))); + + +extern volatile __bit PGC __attribute__((address(0x7C0E))); + + +extern volatile __bit PGD __attribute__((address(0x7C0F))); + + +extern volatile __bit PHDREN __attribute__((address(0x7513))); + + +extern volatile __bit PHYRDY __attribute__((address(0x77E8))); + + +extern volatile __bit PKTDEC __attribute__((address(0x77F6))); + + +extern volatile __bit PKTIE __attribute__((address(0x77DE))); + + +extern volatile __bit PKTIF __attribute__((address(0x7B06))); + + +extern volatile __bit PLLEN __attribute__((address(0x7CDE))); + + +extern volatile __bit PMEN __attribute__((address(0x76C4))); + + +extern volatile __bit POR __attribute__((address(0x7E81))); + + +extern volatile __bit PPRE __attribute__((address(0x7CDC))); + + +extern volatile __bit PPST0 __attribute__((address(0x7CDD))); + + +extern volatile __bit PPST1 __attribute__((address(0x7CDF))); + + +extern volatile __bit PSA __attribute__((address(0x7EAB))); + + +extern volatile __bit PSP0 __attribute__((address(0x7C18))); + + +extern volatile __bit PSP1 __attribute__((address(0x7C19))); + + +extern volatile __bit PSP2 __attribute__((address(0x7C1A))); + + +extern volatile __bit PSP3 __attribute__((address(0x7C1B))); + + +extern volatile __bit PSP4 __attribute__((address(0x7C1C))); + + +extern volatile __bit PSP5 __attribute__((address(0x7C1D))); + + +extern volatile __bit PSP6 __attribute__((address(0x7C1E))); + + +extern volatile __bit PSP7 __attribute__((address(0x7C1F))); + + +extern volatile __bit PSPIE __attribute__((address(0x7CEF))); + + +extern volatile __bit PSPIF __attribute__((address(0x7CF7))); + + +extern volatile __bit PSPIP __attribute__((address(0x7CFF))); + + +extern volatile __bit PSPMODE __attribute__((address(0x7D84))); + + +extern volatile __bit PSS1AC0 __attribute__((address(0x7DB2))); + + +extern volatile __bit PSS1AC1 __attribute__((address(0x7DB3))); + + +extern volatile __bit PSS1BD0 __attribute__((address(0x7DB0))); + + +extern volatile __bit PSS1BD1 __attribute__((address(0x7DB1))); + + +extern volatile __bit PSS2AC0 __attribute__((address(0x7B42))); + + +extern volatile __bit PSS2AC1 __attribute__((address(0x7B43))); + + +extern volatile __bit PSS2BD0 __attribute__((address(0x7B40))); + + +extern volatile __bit PSS2BD1 __attribute__((address(0x7B41))); + + +extern volatile __bit PSS3AC0 __attribute__((address(0x7B52))); + + +extern volatile __bit PSS3AC1 __attribute__((address(0x7B53))); + + +extern volatile __bit PSS3BD0 __attribute__((address(0x7B50))); + + +extern volatile __bit PSS3BD1 __attribute__((address(0x7B51))); + + +extern volatile __bit __attribute__((__deprecated__)) RA0 __attribute__((address(0x7C00))); + + +extern volatile __bit __attribute__((__deprecated__)) RA1 __attribute__((address(0x7C01))); + + +extern volatile __bit __attribute__((__deprecated__)) RA2 __attribute__((address(0x7C02))); + + +extern volatile __bit __attribute__((__deprecated__)) RA3 __attribute__((address(0x7C03))); + + +extern volatile __bit __attribute__((__deprecated__)) RA4 __attribute__((address(0x7C04))); + + +extern volatile __bit __attribute__((__deprecated__)) RA5 __attribute__((address(0x7C05))); + + +extern volatile __bit RA7 __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RB0 __attribute__((address(0x7C08))); + + +extern volatile __bit __attribute__((__deprecated__)) RB1 __attribute__((address(0x7C09))); + + +extern volatile __bit __attribute__((__deprecated__)) RB2 __attribute__((address(0x7C0A))); + + +extern volatile __bit __attribute__((__deprecated__)) RB3 __attribute__((address(0x7C0B))); + + +extern volatile __bit __attribute__((__deprecated__)) RB4 __attribute__((address(0x7C0C))); + + +extern volatile __bit __attribute__((__deprecated__)) RB5 __attribute__((address(0x7C0D))); + + +extern volatile __bit __attribute__((__deprecated__)) RB6 __attribute__((address(0x7C0E))); + + +extern volatile __bit __attribute__((__deprecated__)) RB7 __attribute__((address(0x7C0F))); + + +extern volatile __bit RBIE __attribute__((address(0x7F93))); + + +extern volatile __bit RBIF __attribute__((address(0x7F90))); + + +extern volatile __bit RBIP __attribute__((address(0x7F88))); + + +extern volatile __bit RBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RC0 __attribute__((address(0x7C10))); + + +extern volatile __bit __attribute__((__deprecated__)) RC1 __attribute__((address(0x7C11))); + + +extern volatile __bit RC1IE __attribute__((address(0x7CED))); + + +extern volatile __bit RC1IF __attribute__((address(0x7CF5))); + + +extern volatile __bit RC1IP __attribute__((address(0x7CFD))); + + +extern volatile __bit __attribute__((__deprecated__)) RC2 __attribute__((address(0x7C12))); + + +extern volatile __bit RC2IE __attribute__((address(0x7D1D))); + + +extern volatile __bit RC2IF __attribute__((address(0x7D25))); + + +extern volatile __bit RC2IP __attribute__((address(0x7D2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RC3 __attribute__((address(0x7C13))); + + +extern volatile __bit __attribute__((__deprecated__)) RC4 __attribute__((address(0x7C14))); + + +extern volatile __bit __attribute__((__deprecated__)) RC5 __attribute__((address(0x7C15))); + + +extern volatile __bit __attribute__((__deprecated__)) RC6 __attribute__((address(0x7C16))); + + +extern volatile __bit __attribute__((__deprecated__)) RC7 __attribute__((address(0x7C17))); + + +extern volatile __bit RC8_92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RC92 __attribute__((address(0x7B5E))); + + +extern volatile __bit RCD82 __attribute__((address(0x7B58))); + + +extern volatile __bit __attribute__((__deprecated__)) RCEN __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN1 __attribute__((address(0x7E2B))); + + +extern volatile __bit RCEN2 __attribute__((address(0x7B13))); + + +extern volatile __bit __attribute__((__deprecated__)) RCIDL __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCIDL2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RCIE __attribute__((address(0x7CED))); + + +extern volatile __bit RCIF __attribute__((address(0x7CF5))); + + +extern volatile __bit RCIP __attribute__((address(0x7CFD))); + + +extern volatile __bit RCMT1 __attribute__((address(0x7BF6))); + + +extern volatile __bit RCMT2 __attribute__((address(0x7BE6))); + + +extern volatile __bit RD __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RD0 __attribute__((address(0x7C18))); + + +extern volatile __bit __attribute__((__deprecated__)) RD1 __attribute__((address(0x7C19))); + + +extern volatile __bit RD163 __attribute__((address(0x7D8F))); + + +extern volatile __bit __attribute__((__deprecated__)) RD2 __attribute__((address(0x7C1A))); + + +extern volatile __bit __attribute__((__deprecated__)) RD3 __attribute__((address(0x7C1B))); + + +extern volatile __bit __attribute__((__deprecated__)) RD4 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) RD5 __attribute__((address(0x7C1D))); + + +extern volatile __bit __attribute__((__deprecated__)) RD6 __attribute__((address(0x7C1E))); + + +extern volatile __bit __attribute__((__deprecated__)) RD7 __attribute__((address(0x7C1F))); + + +extern volatile __bit RDE __attribute__((address(0x7C20))); + + +extern volatile __bit RDPU __attribute__((address(0x7C4F))); + + +extern volatile __bit __attribute__((__deprecated__)) RE0 __attribute__((address(0x7C20))); + + +extern volatile __bit __attribute__((__deprecated__)) RE1 __attribute__((address(0x7C21))); + + +extern volatile __bit __attribute__((__deprecated__)) RE2 __attribute__((address(0x7C22))); + + +extern volatile __bit __attribute__((__deprecated__)) RE3 __attribute__((address(0x7C23))); + + +extern volatile __bit __attribute__((__deprecated__)) RE4 __attribute__((address(0x7C24))); + + +extern volatile __bit __attribute__((__deprecated__)) RE5 __attribute__((address(0x7C25))); + + +extern volatile __bit __attribute__((__deprecated__)) RE6 __attribute__((address(0x7C26))); + + +extern volatile __bit __attribute__((__deprecated__)) RE7 __attribute__((address(0x7C27))); + + +extern volatile __bit READ_WRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit REPU __attribute__((address(0x7C4E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF0 __attribute__((address(0x7C28))); + + +extern volatile __bit __attribute__((__deprecated__)) RF1 __attribute__((address(0x7C29))); + + +extern volatile __bit __attribute__((__deprecated__)) RF2 __attribute__((address(0x7C2A))); + + +extern volatile __bit __attribute__((__deprecated__)) RF3 __attribute__((address(0x7C2B))); + + +extern volatile __bit __attribute__((__deprecated__)) RF4 __attribute__((address(0x7C2C))); + + +extern volatile __bit __attribute__((__deprecated__)) RF5 __attribute__((address(0x7C2D))); + + +extern volatile __bit __attribute__((__deprecated__)) RF6 __attribute__((address(0x7C2E))); + + +extern volatile __bit __attribute__((__deprecated__)) RF7 __attribute__((address(0x7C2F))); + + +extern volatile __bit __attribute__((__deprecated__)) RG0 __attribute__((address(0x7C30))); + + +extern volatile __bit __attribute__((__deprecated__)) RG1 __attribute__((address(0x7C31))); + + +extern volatile __bit __attribute__((__deprecated__)) RG2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RG3 __attribute__((address(0x7C33))); + + +extern volatile __bit __attribute__((__deprecated__)) RG4 __attribute__((address(0x7C34))); + + +extern volatile __bit __attribute__((__deprecated__)) RG5 __attribute__((address(0x7C35))); + + +extern volatile __bit __attribute__((__deprecated__)) RG6 __attribute__((address(0x7C36))); + + +extern volatile __bit __attribute__((__deprecated__)) RG7 __attribute__((address(0x7C37))); + + +extern volatile __bit __attribute__((__deprecated__)) RH0 __attribute__((address(0x7C38))); + + +extern volatile __bit __attribute__((__deprecated__)) RH1 __attribute__((address(0x7C39))); + + +extern volatile __bit __attribute__((__deprecated__)) RH2 __attribute__((address(0x7C3A))); + + +extern volatile __bit __attribute__((__deprecated__)) RH3 __attribute__((address(0x7C3B))); + + +extern volatile __bit __attribute__((__deprecated__)) RH4 __attribute__((address(0x7C3C))); + + +extern volatile __bit __attribute__((__deprecated__)) RH5 __attribute__((address(0x7C3D))); + + +extern volatile __bit __attribute__((__deprecated__)) RH6 __attribute__((address(0x7C3E))); + + +extern volatile __bit __attribute__((__deprecated__)) RH7 __attribute__((address(0x7C3F))); + + +extern volatile __bit RI __attribute__((address(0x7E84))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ0 __attribute__((address(0x7C40))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ1 __attribute__((address(0x7C41))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ2 __attribute__((address(0x7C42))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ3 __attribute__((address(0x7C43))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ4 __attribute__((address(0x7C44))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ5 __attribute__((address(0x7C45))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ6 __attribute__((address(0x7C46))); + + +extern volatile __bit __attribute__((__deprecated__)) RJ7 __attribute__((address(0x7C47))); + + +extern volatile __bit __attribute__((__deprecated__)) RJPU __attribute__((address(0x7C07))); + + +extern volatile __bit __attribute__((__deprecated__)) RSEN __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN1 __attribute__((address(0x7E29))); + + +extern volatile __bit RSEN2 __attribute__((address(0x7B11))); + + +extern volatile __bit RW __attribute__((address(0x7E3A))); + + +extern volatile __bit RW1 __attribute__((address(0x7E3A))); + + +extern volatile __bit RW2 __attribute__((address(0x7B22))); + + +extern volatile __bit RX __attribute__((address(0x7C17))); + + +extern volatile __bit RX1 __attribute__((address(0x7C17))); + + +extern volatile __bit RX2 __attribute__((address(0x7C32))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX91 __attribute__((address(0x7D5E))); + + +extern volatile __bit RX92 __attribute__((address(0x7B5E))); + + +extern volatile __bit __attribute__((__deprecated__)) RX9D __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D1 __attribute__((address(0x7D58))); + + +extern volatile __bit RX9D2 __attribute__((address(0x7B58))); + + +extern volatile __bit RXB0IE __attribute__((address(0x7D18))); + + +extern volatile __bit RXB1IE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIE __attribute__((address(0x7D19))); + + +extern volatile __bit RXBNIF __attribute__((address(0x7D21))); + + +extern volatile __bit RXBNIP __attribute__((address(0x7D29))); + + +extern volatile __bit RXBUSY __attribute__((address(0x77EA))); + + +extern volatile __bit RXCKP __attribute__((address(0x7BF5))); + + +extern volatile __bit __attribute__((__deprecated__)) RXDTP __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP1 __attribute__((address(0x7BF5))); + + +extern volatile __bit RXDTP2 __attribute__((address(0x7BE5))); + + +extern volatile __bit RXEN __attribute__((address(0x7E92))); + + +extern volatile __bit RXERIE __attribute__((address(0x77D8))); + + +extern volatile __bit RXERIF __attribute__((address(0x7B00))); + + +extern volatile __bit RXPAUS __attribute__((address(0x7502))); + + +extern volatile __bit RXRST __attribute__((address(0x7E96))); + + +extern volatile __bit R_NOT_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_W2 __attribute__((address(0x7B22))); + + +extern volatile __bit R_nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit S2 __attribute__((address(0x7B23))); + + +extern volatile __bit SCAN __attribute__((address(0x7451))); + + +extern volatile __bit SCK __attribute__((address(0x7C13))); + + +extern volatile __bit SCK1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCK2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit SCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit SCL __attribute__((address(0x7C13))); + + +extern volatile __bit SCL1 __attribute__((address(0x7C13))); + + +extern volatile __bit SCL2 __attribute__((address(0x7C1E))); + + +extern volatile __bit SCS0 __attribute__((address(0x7E98))); + + +extern volatile __bit SCS1 __attribute__((address(0x7E99))); + + +extern volatile __bit SDA __attribute__((address(0x7C14))); + + +extern volatile __bit SDA1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDA2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDI __attribute__((address(0x7C14))); + + +extern volatile __bit SDI1 __attribute__((address(0x7C14))); + + +extern volatile __bit SDI2 __attribute__((address(0x7C1D))); + + +extern volatile __bit SDO __attribute__((address(0x7C15))); + + +extern volatile __bit SDO1 __attribute__((address(0x7C15))); + + +extern volatile __bit SDO2 __attribute__((address(0x7C1C))); + + +extern volatile __bit __attribute__((__deprecated__)) SEN __attribute__((address(0x7E28))); + + +extern volatile __bit SEN1 __attribute__((address(0x7E28))); + + +extern volatile __bit SEN2 __attribute__((address(0x7B10))); + + +extern volatile __bit __attribute__((__deprecated__)) SENDB __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB1 __attribute__((address(0x7D63))); + + +extern volatile __bit SENDB2 __attribute__((address(0x7B63))); + + +extern volatile __bit __attribute__((__deprecated__)) SMP __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP1 __attribute__((address(0x7E3F))); + + +extern volatile __bit SMP2 __attribute__((address(0x7B27))); + + +extern volatile __bit SOSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit SOSCEN3 __attribute__((address(0x7D8B))); + + +extern volatile __bit SP0 __attribute__((address(0x7FE0))); + + +extern volatile __bit SP1 __attribute__((address(0x7FE1))); + + +extern volatile __bit SP2 __attribute__((address(0x7FE2))); + + +extern volatile __bit SP3 __attribute__((address(0x7FE3))); + + +extern volatile __bit SP4 __attribute__((address(0x7FE4))); + + +extern volatile __bit __attribute__((__deprecated__)) SPEN __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN1 __attribute__((address(0x7D5F))); + + +extern volatile __bit SPEN2 __attribute__((address(0x7B5F))); + + +extern volatile __bit __attribute__((__deprecated__)) SREN __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN1 __attribute__((address(0x7D5D))); + + +extern volatile __bit SREN2 __attribute__((address(0x7B5D))); + + +extern volatile __bit SRENA __attribute__((address(0x7D5D))); + + +extern volatile __bit SS __attribute__((address(0x7C2F))); + + +extern volatile __bit SS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit SS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit SSP1IE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSP1IF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSP1IP __attribute__((address(0x7CFB))); + + +extern volatile __bit SSP2IE __attribute__((address(0x7D1F))); + + +extern volatile __bit SSP2IF __attribute__((address(0x7D27))); + + +extern volatile __bit SSP2IP __attribute__((address(0x7D2F))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPEN __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN1 __attribute__((address(0x7E35))); + + +extern volatile __bit SSPEN2 __attribute__((address(0x7B1D))); + + +extern volatile __bit SSPIE __attribute__((address(0x7CEB))); + + +extern volatile __bit SSPIF __attribute__((address(0x7CF3))); + + +extern volatile __bit SSPIP __attribute__((address(0x7CFB))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM0 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM01 __attribute__((address(0x7E30))); + + +extern volatile __bit SSPM02 __attribute__((address(0x7B18))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM1 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM11 __attribute__((address(0x7E31))); + + +extern volatile __bit SSPM12 __attribute__((address(0x7B19))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM2 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM21 __attribute__((address(0x7E32))); + + +extern volatile __bit SSPM22 __attribute__((address(0x7B1A))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPM3 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM31 __attribute__((address(0x7E33))); + + +extern volatile __bit SSPM32 __attribute__((address(0x7B1B))); + + +extern volatile __bit __attribute__((__deprecated__)) SSPOV __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV1 __attribute__((address(0x7E36))); + + +extern volatile __bit SSPOV2 __attribute__((address(0x7B1E))); + + +extern volatile __bit START __attribute__((address(0x7E3B))); + + +extern volatile __bit START1 __attribute__((address(0x7E3B))); + + +extern volatile __bit START2 __attribute__((address(0x7B23))); + + +extern volatile __bit STKFUL __attribute__((address(0x7FE7))); + + +extern volatile __bit STKOVF __attribute__((address(0x7FE7))); + + +extern volatile __bit STKPTR0 __attribute__((address(0x7FE0))); + + +extern volatile __bit STKPTR1 __attribute__((address(0x7FE1))); + + +extern volatile __bit STKPTR2 __attribute__((address(0x7FE2))); + + +extern volatile __bit STKPTR3 __attribute__((address(0x7FE3))); + + +extern volatile __bit STKPTR4 __attribute__((address(0x7FE4))); + + +extern volatile __bit STKUNF __attribute__((address(0x7FE6))); + + +extern volatile __bit STOP __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP1 __attribute__((address(0x7E3C))); + + +extern volatile __bit STOP2 __attribute__((address(0x7B24))); + + +extern volatile __bit SWDTE __attribute__((address(0x7E88))); + + +extern volatile __bit SWDTEN __attribute__((address(0x7E88))); + + +extern volatile __bit __attribute__((__deprecated__)) SYNC __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC1 __attribute__((address(0x7D64))); + + +extern volatile __bit SYNC2 __attribute__((address(0x7B64))); + + +extern volatile __bit T08BIT __attribute__((address(0x7EAE))); + + +extern volatile __bit T0CKI __attribute__((address(0x7C04))); + + +extern volatile __bit T0CS __attribute__((address(0x7EAD))); + + +extern volatile __bit T0IE __attribute__((address(0x7F95))); + + +extern volatile __bit T0IF __attribute__((address(0x7F92))); + + +extern volatile __bit T0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit T0PS0 __attribute__((address(0x7EA8))); + + +extern volatile __bit T0PS1 __attribute__((address(0x7EA9))); + + +extern volatile __bit T0PS2 __attribute__((address(0x7EAA))); + + +extern volatile __bit T0SE __attribute__((address(0x7EAC))); + + +extern volatile __bit T13CKI __attribute__((address(0x7C10))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x7E6C))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x7E6D))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x7E6B))); + + +extern volatile __bit T1OSI __attribute__((address(0x7C11))); + + +extern volatile __bit T1OSO __attribute__((address(0x7C10))); + + +extern volatile __bit T1RD16 __attribute__((address(0x7E6F))); + + +extern volatile __bit T1RUN __attribute__((address(0x7E6E))); + + +extern volatile __bit T1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x7E50))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x7E51))); + + +extern volatile __bit T2OUTPS0 __attribute__((address(0x7E53))); + + +extern volatile __bit T2OUTPS1 __attribute__((address(0x7E54))); + + +extern volatile __bit T2OUTPS2 __attribute__((address(0x7E55))); + + +extern volatile __bit T2OUTPS3 __attribute__((address(0x7E56))); + + +extern volatile __bit T3CCP1 __attribute__((address(0x7D8B))); + + +extern volatile __bit T3CCP2 __attribute__((address(0x7D8E))); + + +extern volatile __bit T3CKPS0 __attribute__((address(0x7D8C))); + + +extern volatile __bit T3CKPS1 __attribute__((address(0x7D8D))); + + +extern volatile __bit T3INSYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T3RD16 __attribute__((address(0x7D8F))); + + +extern volatile __bit T3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit T4CKPS0 __attribute__((address(0x7BB0))); + + +extern volatile __bit T4CKPS1 __attribute__((address(0x7BB1))); + + +extern volatile __bit T4OUTPS0 __attribute__((address(0x7BB3))); + + +extern volatile __bit T4OUTPS1 __attribute__((address(0x7BB4))); + + +extern volatile __bit T4OUTPS2 __attribute__((address(0x7BB5))); + + +extern volatile __bit T4OUTPS3 __attribute__((address(0x7BB6))); + + +extern volatile __bit TMR0IE __attribute__((address(0x7F95))); + + +extern volatile __bit TMR0IF __attribute__((address(0x7F92))); + + +extern volatile __bit TMR0IP __attribute__((address(0x7F8A))); + + +extern volatile __bit TMR0ON __attribute__((address(0x7EAF))); + + +extern volatile __bit TMR1CS __attribute__((address(0x7E69))); + + +extern volatile __bit TMR1IE __attribute__((address(0x7CE8))); + + +extern volatile __bit TMR1IF __attribute__((address(0x7CF0))); + + +extern volatile __bit TMR1IP __attribute__((address(0x7CF8))); + + +extern volatile __bit TMR1ON __attribute__((address(0x7E68))); + + +extern volatile __bit TMR2IE __attribute__((address(0x7CE9))); + + +extern volatile __bit TMR2IF __attribute__((address(0x7CF1))); + + +extern volatile __bit TMR2IP __attribute__((address(0x7CF9))); + + +extern volatile __bit TMR2ON __attribute__((address(0x7E52))); + + +extern volatile __bit TMR3CS __attribute__((address(0x7D89))); + + +extern volatile __bit TMR3IE __attribute__((address(0x7D01))); + + +extern volatile __bit TMR3IF __attribute__((address(0x7D09))); + + +extern volatile __bit TMR3IP __attribute__((address(0x7D11))); + + +extern volatile __bit TMR3ON __attribute__((address(0x7D88))); + + +extern volatile __bit TMR4IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TMR4IF __attribute__((address(0x7D23))); + + +extern volatile __bit TMR4IP __attribute__((address(0x7D2B))); + + +extern volatile __bit TMR4ON __attribute__((address(0x7BB2))); + + +extern volatile __bit TO __attribute__((address(0x7E83))); + + +extern volatile __bit TRISA0 __attribute__((address(0x7C90))); + + +extern volatile __bit TRISA1 __attribute__((address(0x7C91))); + + +extern volatile __bit TRISA2 __attribute__((address(0x7C92))); + + +extern volatile __bit TRISA3 __attribute__((address(0x7C93))); + + +extern volatile __bit TRISA4 __attribute__((address(0x7C94))); + + +extern volatile __bit TRISA5 __attribute__((address(0x7C95))); + + +extern volatile __bit TRISB0 __attribute__((address(0x7C98))); + + +extern volatile __bit TRISB1 __attribute__((address(0x7C99))); + + +extern volatile __bit TRISB2 __attribute__((address(0x7C9A))); + + +extern volatile __bit TRISB3 __attribute__((address(0x7C9B))); + + +extern volatile __bit TRISB4 __attribute__((address(0x7C9C))); + + +extern volatile __bit TRISB5 __attribute__((address(0x7C9D))); + + +extern volatile __bit TRISB6 __attribute__((address(0x7C9E))); + + +extern volatile __bit TRISB7 __attribute__((address(0x7C9F))); + + +extern volatile __bit TRISC0 __attribute__((address(0x7CA0))); + + +extern volatile __bit TRISC1 __attribute__((address(0x7CA1))); + + +extern volatile __bit TRISC2 __attribute__((address(0x7CA2))); + + +extern volatile __bit TRISC3 __attribute__((address(0x7CA3))); + + +extern volatile __bit TRISC4 __attribute__((address(0x7CA4))); + + +extern volatile __bit TRISC5 __attribute__((address(0x7CA5))); + + +extern volatile __bit TRISC6 __attribute__((address(0x7CA6))); + + +extern volatile __bit TRISC7 __attribute__((address(0x7CA7))); + + +extern volatile __bit TRISD0 __attribute__((address(0x7CA8))); + + +extern volatile __bit TRISD1 __attribute__((address(0x7CA9))); + + +extern volatile __bit TRISD2 __attribute__((address(0x7CAA))); + + +extern volatile __bit TRISD3 __attribute__((address(0x7CAB))); + + +extern volatile __bit TRISD4 __attribute__((address(0x7CAC))); + + +extern volatile __bit TRISD5 __attribute__((address(0x7CAD))); + + +extern volatile __bit TRISD6 __attribute__((address(0x7CAE))); + + +extern volatile __bit TRISD7 __attribute__((address(0x7CAF))); + + +extern volatile __bit TRISE0 __attribute__((address(0x7CB0))); + + +extern volatile __bit TRISE1 __attribute__((address(0x7CB1))); + + +extern volatile __bit TRISE2 __attribute__((address(0x7CB2))); + + +extern volatile __bit TRISE3 __attribute__((address(0x7CB3))); + + +extern volatile __bit TRISE4 __attribute__((address(0x7CB4))); + + +extern volatile __bit TRISE5 __attribute__((address(0x7CB5))); + + +extern volatile __bit TRISE6 __attribute__((address(0x7CB6))); + + +extern volatile __bit TRISE7 __attribute__((address(0x7CB7))); + + +extern volatile __bit TRISF0 __attribute__((address(0x7CB8))); + + +extern volatile __bit TRISF1 __attribute__((address(0x7CB9))); + + +extern volatile __bit TRISF2 __attribute__((address(0x7CBA))); + + +extern volatile __bit TRISF3 __attribute__((address(0x7CBB))); + + +extern volatile __bit TRISF4 __attribute__((address(0x7CBC))); + + +extern volatile __bit TRISF5 __attribute__((address(0x7CBD))); + + +extern volatile __bit TRISF6 __attribute__((address(0x7CBE))); + + +extern volatile __bit TRISF7 __attribute__((address(0x7CBF))); + + +extern volatile __bit TRISG0 __attribute__((address(0x7CC0))); + + +extern volatile __bit TRISG1 __attribute__((address(0x7CC1))); + + +extern volatile __bit TRISG2 __attribute__((address(0x7CC2))); + + +extern volatile __bit TRISG3 __attribute__((address(0x7CC3))); + + +extern volatile __bit TRISG4 __attribute__((address(0x7CC4))); + + +extern volatile __bit TRISG5 __attribute__((address(0x7CC5))); + + +extern volatile __bit TRISG6 __attribute__((address(0x7CC6))); + + +extern volatile __bit TRISG7 __attribute__((address(0x7CC7))); + + +extern volatile __bit TRISH0 __attribute__((address(0x7CC8))); + + +extern volatile __bit TRISH1 __attribute__((address(0x7CC9))); + + +extern volatile __bit TRISH2 __attribute__((address(0x7CCA))); + + +extern volatile __bit TRISH3 __attribute__((address(0x7CCB))); + + +extern volatile __bit TRISH4 __attribute__((address(0x7CCC))); + + +extern volatile __bit TRISH5 __attribute__((address(0x7CCD))); + + +extern volatile __bit TRISH6 __attribute__((address(0x7CCE))); + + +extern volatile __bit TRISH7 __attribute__((address(0x7CCF))); + + +extern volatile __bit TRISJ0 __attribute__((address(0x7CD0))); + + +extern volatile __bit TRISJ1 __attribute__((address(0x7CD1))); + + +extern volatile __bit TRISJ2 __attribute__((address(0x7CD2))); + + +extern volatile __bit TRISJ3 __attribute__((address(0x7CD3))); + + +extern volatile __bit TRISJ4 __attribute__((address(0x7CD4))); + + +extern volatile __bit TRISJ5 __attribute__((address(0x7CD5))); + + +extern volatile __bit TRISJ6 __attribute__((address(0x7CD6))); + + +extern volatile __bit TRISJ7 __attribute__((address(0x7CD7))); + + +extern volatile __bit __attribute__((__deprecated__)) TRMT __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT1 __attribute__((address(0x7D61))); + + +extern volatile __bit TRMT2 __attribute__((address(0x7B61))); + + +extern volatile __bit TUN4 __attribute__((address(0x7CDC))); + + +extern volatile __bit TUN5 __attribute__((address(0x7CDD))); + + +extern volatile __bit TX __attribute__((address(0x7C16))); + + +extern volatile __bit TX1 __attribute__((address(0x7C16))); + + +extern volatile __bit TX1IE __attribute__((address(0x7CEC))); + + +extern volatile __bit TX1IF __attribute__((address(0x7CF4))); + + +extern volatile __bit TX1IP __attribute__((address(0x7CFC))); + + +extern volatile __bit TX2 __attribute__((address(0x7C31))); + + +extern volatile __bit TX2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TX2IF __attribute__((address(0x7D24))); + + +extern volatile __bit TX2IP __attribute__((address(0x7D2C))); + + +extern volatile __bit TX8_92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9 __attribute__((address(0x7D66))); + + +extern volatile __bit TX91 __attribute__((address(0x7D66))); + + +extern volatile __bit TX92 __attribute__((address(0x7B66))); + + +extern volatile __bit __attribute__((__deprecated__)) TX9D __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D1 __attribute__((address(0x7D60))); + + +extern volatile __bit TX9D2 __attribute__((address(0x7B60))); + + +extern volatile __bit TXABRT __attribute__((address(0x77E9))); + + +extern volatile __bit TXB0IE __attribute__((address(0x7D1A))); + + +extern volatile __bit TXB1IE __attribute__((address(0x7D1B))); + + +extern volatile __bit TXB2IE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIE __attribute__((address(0x7D1C))); + + +extern volatile __bit TXBNIF __attribute__((address(0x7D24))); + + +extern volatile __bit TXBNIP __attribute__((address(0x7D2C))); + + +extern volatile __bit __attribute__((__deprecated__)) TXCKP __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP1 __attribute__((address(0x7BF4))); + + +extern volatile __bit TXCKP2 __attribute__((address(0x7BE4))); + + +extern volatile __bit TXCRCEN __attribute__((address(0x7514))); + + +extern volatile __bit TXD82 __attribute__((address(0x7B60))); + + +extern volatile __bit __attribute__((__deprecated__)) TXEN __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN1 __attribute__((address(0x7D65))); + + +extern volatile __bit TXEN2 __attribute__((address(0x7B65))); + + +extern volatile __bit TXERIE __attribute__((address(0x77D9))); + + +extern volatile __bit TXERIF __attribute__((address(0x7B01))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIE __attribute__((address(0x7CEC))); + + +extern volatile __bit __attribute__((__deprecated__)) TXIF __attribute__((address(0x7CF4))); + + +extern volatile __bit TXIP __attribute__((address(0x7CFC))); + + +extern volatile __bit TXPAUS __attribute__((address(0x7503))); + + +extern volatile __bit TXRST __attribute__((address(0x7E97))); + + +extern volatile __bit TXRTS __attribute__((address(0x7E93))); + + +extern volatile __bit __attribute__((__deprecated__)) UA __attribute__((address(0x7E39))); + + +extern volatile __bit UA1 __attribute__((address(0x7E39))); + + +extern volatile __bit UA2 __attribute__((address(0x7B21))); + + +extern volatile __bit UB __attribute__((address(0x7C47))); + + +extern volatile __bit UCEN __attribute__((address(0x76C7))); + + +extern volatile __bit ULPWUIN __attribute__((address(0x7C00))); + + +extern volatile __bit VCFG0 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG01 __attribute__((address(0x7E0C))); + + +extern volatile __bit VCFG1 __attribute__((address(0x7E0D))); + + +extern volatile __bit VCFG11 __attribute__((address(0x7E0D))); + + +extern volatile __bit VREFM __attribute__((address(0x7C02))); + + +extern volatile __bit VREFP __attribute__((address(0x7C03))); + + +extern volatile __bit W4E __attribute__((address(0x7BF1))); + + +extern volatile __bit WAIT0 __attribute__((address(0x7CE4))); + + +extern volatile __bit WAIT1 __attribute__((address(0x7CE5))); + + +extern volatile __bit __attribute__((__deprecated__)) WCOL __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL1 __attribute__((address(0x7E37))); + + +extern volatile __bit WCOL2 __attribute__((address(0x7B1F))); + + +extern volatile __bit WM0 __attribute__((address(0x7CE0))); + + +extern volatile __bit WM1 __attribute__((address(0x7CE1))); + + +extern volatile __bit __attribute__((__deprecated__)) WR __attribute__((address(0x7D31))); + + +extern volatile __bit WRE __attribute__((address(0x7C21))); + + +extern volatile __bit WREN __attribute__((address(0x7D32))); + + +extern volatile __bit WRERR __attribute__((address(0x7D33))); + + +extern volatile __bit WRH __attribute__((address(0x7C43))); + + +extern volatile __bit WRL __attribute__((address(0x7C42))); + + +extern volatile __bit WUE1 __attribute__((address(0x7BF1))); + + +extern volatile __bit WUE2 __attribute__((address(0x7BE1))); + + +extern volatile __bit ZERO __attribute__((address(0x7EC2))); + + +extern volatile __bit nA2 __attribute__((address(0x7B25))); + + +extern volatile __bit nADDRESS2 __attribute__((address(0x7B25))); + + +extern volatile __bit nBOR __attribute__((address(0x7E80))); + + +extern volatile __bit nCE __attribute__((address(0x7C45))); + + +extern volatile __bit nCM __attribute__((address(0x7E85))); + + +extern volatile __bit nCS __attribute__((address(0x7C22))); + + +extern volatile __bit nDONE __attribute__((address(0x7E11))); + + +extern volatile __bit nLB __attribute__((address(0x7C46))); + + +extern volatile __bit nOE __attribute__((address(0x7C41))); + + +extern volatile __bit nPD __attribute__((address(0x7E82))); + + +extern volatile __bit nPOR __attribute__((address(0x7E81))); + + +extern volatile __bit nRBPU __attribute__((address(0x7F8F))); + + +extern volatile __bit nRD __attribute__((address(0x7C20))); + + +extern volatile __bit nRI __attribute__((address(0x7E84))); + + +extern volatile __bit nSS __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS1 __attribute__((address(0x7C2F))); + + +extern volatile __bit nSS2 __attribute__((address(0x7C1F))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x7E6A))); + + +extern volatile __bit nT3SYNC __attribute__((address(0x7D8A))); + + +extern volatile __bit nTO __attribute__((address(0x7E83))); + + +extern volatile __bit nUB __attribute__((address(0x7C47))); + + +extern volatile __bit nW2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWR __attribute__((address(0x7C21))); + + +extern volatile __bit nWRH __attribute__((address(0x7C43))); + + +extern volatile __bit nWRITE2 __attribute__((address(0x7B22))); + + +extern volatile __bit nWRL __attribute__((address(0x7C42))); +# 486 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18_chip_select.h" 2 3 +# 9 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 19 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "flash_write" " routine is no longer supported. Please use the MPLAB X MCC."))) void flash_write(const unsigned char *, unsigned int, __far unsigned char *); +__attribute__((__unsupported__("The " "EraseFlash" " routine is no longer supported. Please use the MPLAB X MCC."))) void EraseFlash(unsigned long startaddr, unsigned long endaddr); + + + + + + + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\errata.h" 1 3 +# 28 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 2 3 +# 156 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +__attribute__((__unsupported__("The " "Read_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) unsigned char Read_b_eep(unsigned int badd); +__attribute__((__unsupported__("The " "Busy_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Busy_eep(void); +__attribute__((__unsupported__("The " "Write_b_eep" " routine is no longer supported. Please use the MPLAB X MCC."))) void Write_b_eep(unsigned int badd, unsigned char bdat); +# 192 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\pic18.h" 3 +unsigned char __t1rd16on(void); +unsigned char __t3rd16on(void); +# 34 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\xc.h" 2 3 +# 56 "mcc_generated_files/pin_manager.h" 2 +# 109 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_Initialize (void); +# 121 "mcc_generated_files/pin_manager.h" +void PIN_MANAGER_IOC(void); +# 47 "mcc_generated_files/pin_manager.c" 2 + + + +void PIN_MANAGER_Initialize(void) +{ + + + + LATE = 0x00; + LATJ = 0x00; + LATD = 0x00; + LATA = 0x00; + LATF = 0x00; + LATB = 0x00; + LATG = 0x00; + LATC = 0x00; + LATH = 0x00; + + + + + TRISE = 0xFF; + TRISF = 0xFF; + TRISA = 0x3F; + TRISG = 0xFF; + TRISB = 0xFF; + TRISH = 0xFF; + TRISC = 0xFF; + TRISD = 0xFF; + TRISJ = 0xFF; + + + + + ADCON1bits.PCFG = 0x00; + + + + + + +} + +void PIN_MANAGER_IOC(void) +{ + +} diff --git a/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.p1 b/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.p1 new file mode 100644 index 0000000..347b820 --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.p1 @@ -0,0 +1,1025 @@ +Version 4.0 HI-TECH Software Intermediate Code +"6449 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6449: extern volatile unsigned char LATE __attribute__((address(0xF8D))); +[v _LATE `Vuc ~T0 @X0 0 e@3981 ] +"6879 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6879: extern volatile unsigned char LATJ __attribute__((address(0xF91))); +[v _LATJ `Vuc ~T0 @X0 0 e@3985 ] +"6337 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6337: extern volatile unsigned char LATD __attribute__((address(0xF8C))); +[v _LATD `Vuc ~T0 @X0 0 e@3980 ] +"5992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5992: extern volatile unsigned char LATA __attribute__((address(0xF89))); +[v _LATA `Vuc ~T0 @X0 0 e@3977 ] +"6561 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6561: extern volatile unsigned char LATF __attribute__((address(0xF8E))); +[v _LATF `Vuc ~T0 @X0 0 e@3982 ] +"6113 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6113: extern volatile unsigned char LATB __attribute__((address(0xF8A))); +[v _LATB `Vuc ~T0 @X0 0 e@3978 ] +"6673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6673: extern volatile unsigned char LATG __attribute__((address(0xF8F))); +[v _LATG `Vuc ~T0 @X0 0 e@3983 ] +"6225 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6225: extern volatile unsigned char LATC __attribute__((address(0xF8B))); +[v _LATC `Vuc ~T0 @X0 0 e@3979 ] +"6767 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6767: extern volatile unsigned char LATH __attribute__((address(0xF90))); +[v _LATH `Vuc ~T0 @X0 0 e@3984 ] +"7831 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7831: extern volatile unsigned char TRISE __attribute__((address(0xF96))); +[v _TRISE `Vuc ~T0 @X0 0 e@3990 ] +"8053 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8053: extern volatile unsigned char TRISF __attribute__((address(0xF97))); +[v _TRISF `Vuc ~T0 @X0 0 e@3991 ] +"6991 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6991: extern volatile unsigned char TRISA __attribute__((address(0xF92))); +[v _TRISA `Vuc ~T0 @X0 0 e@3986 ] +"8275 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8275: extern volatile unsigned char TRISG __attribute__((address(0xF98))); +[v _TRISG `Vuc ~T0 @X0 0 e@3992 ] +"7165 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7165: extern volatile unsigned char TRISB __attribute__((address(0xF93))); +[v _TRISB `Vuc ~T0 @X0 0 e@3987 ] +"8497 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8497: extern volatile unsigned char TRISH __attribute__((address(0xF99))); +[v _TRISH `Vuc ~T0 @X0 0 e@3993 ] +"7387 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7387: extern volatile unsigned char TRISC __attribute__((address(0xF94))); +[v _TRISC `Vuc ~T0 @X0 0 e@3988 ] +"7609 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7609: extern volatile unsigned char TRISD __attribute__((address(0xF95))); +[v _TRISD `Vuc ~T0 @X0 0 e@3989 ] +"8719 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8719: extern volatile unsigned char TRISJ __attribute__((address(0xF9A))); +[v _TRISJ `Vuc ~T0 @X0 0 e@3994 ] +"11649 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11649: struct { +[s S421 :4 `uc 1 :2 `uc 1 ] +[n S421 . PCFG VCFG ] +"11653 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11653: struct { +[s S422 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S422 . PCFG0 PCFG1 PCFG2 PCFG3 VCFG0 VCFG1 ] +"11661 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11661: struct { +[s S423 :3 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S423 . . CHSN3 VCFG01 VCFG11 ] +"11648 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11648: typedef union { +[u S420 `S421 1 `S422 1 `S423 1 ] +[n S420 . . . . ] +"11668 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11668: extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0xFC1))); +[v _ADCON1bits `VS420 ~T0 @X0 0 e@4033 ] +"55 C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 55: __asm("MAADR5 equ 0E80h"); +[; <" MAADR5 equ 0E80h ;# "> +"62 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 62: __asm("MAADR6 equ 0E81h"); +[; <" MAADR6 equ 0E81h ;# "> +"69 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 69: __asm("MAADR3 equ 0E82h"); +[; <" MAADR3 equ 0E82h ;# "> +"76 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 76: __asm("MAADR4 equ 0E83h"); +[; <" MAADR4 equ 0E83h ;# "> +"83 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 83: __asm("MAADR1 equ 0E84h"); +[; <" MAADR1 equ 0E84h ;# "> +"90 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 90: __asm("MAADR2 equ 0E85h"); +[; <" MAADR2 equ 0E85h ;# "> +"97 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 97: __asm("MISTAT equ 0E8Ah"); +[; <" MISTAT equ 0E8Ah ;# "> +"130 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 130: __asm("EFLOCON equ 0E97h"); +[; <" EFLOCON equ 0E97h ;# "> +"162 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 162: __asm("EPAUS equ 0E98h"); +[; <" EPAUS equ 0E98h ;# "> +"169 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 169: __asm("EPAUSL equ 0E98h"); +[; <" EPAUSL equ 0E98h ;# "> +"176 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 176: __asm("EPAUSH equ 0E99h"); +[; <" EPAUSH equ 0E99h ;# "> +"183 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 183: __asm("MACON1 equ 0EA0h"); +[; <" MACON1 equ 0EA0h ;# "> +"221 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 221: __asm("MACON3 equ 0EA2h"); +[; <" MACON3 equ 0EA2h ;# "> +"292 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 292: __asm("MACON4 equ 0EA3h"); +[; <" MACON4 equ 0EA3h ;# "> +"314 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 314: __asm("MABBIPG equ 0EA4h"); +[; <" MABBIPG equ 0EA4h ;# "> +"370 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 370: __asm("MAIPG equ 0EA6h"); +[; <" MAIPG equ 0EA6h ;# "> +"377 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 377: __asm("MAIPGL equ 0EA6h"); +[; <" MAIPGL equ 0EA6h ;# "> +"384 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 384: __asm("MAIPGH equ 0EA7h"); +[; <" MAIPGH equ 0EA7h ;# "> +"391 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 391: __asm("MAMXFL equ 0EAAh"); +[; <" MAMXFL equ 0EAAh ;# "> +"398 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 398: __asm("MAMXFLL equ 0EAAh"); +[; <" MAMXFLL equ 0EAAh ;# "> +"405 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 405: __asm("MAMXFLH equ 0EABh"); +[; <" MAMXFLH equ 0EABh ;# "> +"412 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 412: __asm("MICMD equ 0EB2h"); +[; <" MICMD equ 0EB2h ;# "> +"438 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 438: __asm("MIREGADR equ 0EB4h"); +[; <" MIREGADR equ 0EB4h ;# "> +"445 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 445: __asm("MIWR equ 0EB6h"); +[; <" MIWR equ 0EB6h ;# "> +"452 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 452: __asm("MIWRL equ 0EB6h"); +[; <" MIWRL equ 0EB6h ;# "> +"459 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 459: __asm("MIWRH equ 0EB7h"); +[; <" MIWRH equ 0EB7h ;# "> +"466 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 466: __asm("MIRD equ 0EB8h"); +[; <" MIRD equ 0EB8h ;# "> +"473 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 473: __asm("MIRDL equ 0EB8h"); +[; <" MIRDL equ 0EB8h ;# "> +"480 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 480: __asm("MIRDH equ 0EB9h"); +[; <" MIRDH equ 0EB9h ;# "> +"487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 487: __asm("EHT0 equ 0EC0h"); +[; <" EHT0 equ 0EC0h ;# "> +"494 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 494: __asm("EHT1 equ 0EC1h"); +[; <" EHT1 equ 0EC1h ;# "> +"501 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 501: __asm("EHT2 equ 0EC2h"); +[; <" EHT2 equ 0EC2h ;# "> +"508 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 508: __asm("EHT3 equ 0EC3h"); +[; <" EHT3 equ 0EC3h ;# "> +"515 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 515: __asm("EHT4 equ 0EC4h"); +[; <" EHT4 equ 0EC4h ;# "> +"522 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 522: __asm("EHT5 equ 0EC5h"); +[; <" EHT5 equ 0EC5h ;# "> +"529 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 529: __asm("EHT6 equ 0EC6h"); +[; <" EHT6 equ 0EC6h ;# "> +"536 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 536: __asm("EHT7 equ 0EC7h"); +[; <" EHT7 equ 0EC7h ;# "> +"543 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 543: __asm("EPMM0 equ 0EC8h"); +[; <" EPMM0 equ 0EC8h ;# "> +"550 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 550: __asm("EPMM1 equ 0EC9h"); +[; <" EPMM1 equ 0EC9h ;# "> +"557 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 557: __asm("EPMM2 equ 0ECAh"); +[; <" EPMM2 equ 0ECAh ;# "> +"564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 564: __asm("EPMM3 equ 0ECBh"); +[; <" EPMM3 equ 0ECBh ;# "> +"571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 571: __asm("EPMM4 equ 0ECCh"); +[; <" EPMM4 equ 0ECCh ;# "> +"578 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 578: __asm("EPMM5 equ 0ECDh"); +[; <" EPMM5 equ 0ECDh ;# "> +"585 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 585: __asm("EPMM6 equ 0ECEh"); +[; <" EPMM6 equ 0ECEh ;# "> +"592 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 592: __asm("EPMM7 equ 0ECFh"); +[; <" EPMM7 equ 0ECFh ;# "> +"599 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 599: __asm("EPMCS equ 0ED0h"); +[; <" EPMCS equ 0ED0h ;# "> +"606 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 606: __asm("EPMCSL equ 0ED0h"); +[; <" EPMCSL equ 0ED0h ;# "> +"613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 613: __asm("EPMCSH equ 0ED1h"); +[; <" EPMCSH equ 0ED1h ;# "> +"620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 620: __asm("EPMO equ 0ED4h"); +[; <" EPMO equ 0ED4h ;# "> +"627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 627: __asm("EPMOL equ 0ED4h"); +[; <" EPMOL equ 0ED4h ;# "> +"634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 634: __asm("EPMOH equ 0ED5h"); +[; <" EPMOH equ 0ED5h ;# "> +"641 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 641: __asm("ERXFCON equ 0ED8h"); +[; <" ERXFCON equ 0ED8h ;# "> +"703 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 703: __asm("EPKTCNT equ 0ED9h"); +[; <" EPKTCNT equ 0ED9h ;# "> +"710 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 710: __asm("EWRPT equ 0EE2h"); +[; <" EWRPT equ 0EE2h ;# "> +"717 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 717: __asm("EWRPTL equ 0EE2h"); +[; <" EWRPTL equ 0EE2h ;# "> +"724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 724: __asm("EWRPTH equ 0EE3h"); +[; <" EWRPTH equ 0EE3h ;# "> +"731 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 731: __asm("ETXST equ 0EE4h"); +[; <" ETXST equ 0EE4h ;# "> +"738 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 738: __asm("ETXSTL equ 0EE4h"); +[; <" ETXSTL equ 0EE4h ;# "> +"745 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 745: __asm("ETXSTH equ 0EE5h"); +[; <" ETXSTH equ 0EE5h ;# "> +"752 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 752: __asm("ETXND equ 0EE6h"); +[; <" ETXND equ 0EE6h ;# "> +"759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 759: __asm("ETXNDL equ 0EE6h"); +[; <" ETXNDL equ 0EE6h ;# "> +"766 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 766: __asm("ETXNDH equ 0EE7h"); +[; <" ETXNDH equ 0EE7h ;# "> +"773 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 773: __asm("ERXST equ 0EE8h"); +[; <" ERXST equ 0EE8h ;# "> +"780 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 780: __asm("ERXSTL equ 0EE8h"); +[; <" ERXSTL equ 0EE8h ;# "> +"787 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 787: __asm("ERXSTH equ 0EE9h"); +[; <" ERXSTH equ 0EE9h ;# "> +"794 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 794: __asm("ERXND equ 0EEAh"); +[; <" ERXND equ 0EEAh ;# "> +"801 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 801: __asm("ERXNDL equ 0EEAh"); +[; <" ERXNDL equ 0EEAh ;# "> +"808 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 808: __asm("ERXNDH equ 0EEBh"); +[; <" ERXNDH equ 0EEBh ;# "> +"815 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 815: __asm("ERXRDPT equ 0EECh"); +[; <" ERXRDPT equ 0EECh ;# "> +"822 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 822: __asm("ERXRDPTL equ 0EECh"); +[; <" ERXRDPTL equ 0EECh ;# "> +"829 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 829: __asm("ERXRDPTH equ 0EEDh"); +[; <" ERXRDPTH equ 0EEDh ;# "> +"836 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 836: __asm("ERXWRPT equ 0EEEh"); +[; <" ERXWRPT equ 0EEEh ;# "> +"843 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 843: __asm("ERXWRPTL equ 0EEEh"); +[; <" ERXWRPTL equ 0EEEh ;# "> +"850 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 850: __asm("ERXWRPTH equ 0EEFh"); +[; <" ERXWRPTH equ 0EEFh ;# "> +"857 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 857: __asm("EDMAST equ 0EF0h"); +[; <" EDMAST equ 0EF0h ;# "> +"864 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 864: __asm("EDMASTL equ 0EF0h"); +[; <" EDMASTL equ 0EF0h ;# "> +"871 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 871: __asm("EDMASTH equ 0EF1h"); +[; <" EDMASTH equ 0EF1h ;# "> +"878 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 878: __asm("EDMAND equ 0EF2h"); +[; <" EDMAND equ 0EF2h ;# "> +"885 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 885: __asm("EDMANDL equ 0EF2h"); +[; <" EDMANDL equ 0EF2h ;# "> +"892 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 892: __asm("EDMANDH equ 0EF3h"); +[; <" EDMANDH equ 0EF3h ;# "> +"899 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 899: __asm("EDMADST equ 0EF4h"); +[; <" EDMADST equ 0EF4h ;# "> +"906 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 906: __asm("EDMADSTL equ 0EF4h"); +[; <" EDMADSTL equ 0EF4h ;# "> +"913 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 913: __asm("EDMADSTH equ 0EF5h"); +[; <" EDMADSTH equ 0EF5h ;# "> +"920 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 920: __asm("EDMACS equ 0EF6h"); +[; <" EDMACS equ 0EF6h ;# "> +"927 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 927: __asm("EDMACSL equ 0EF6h"); +[; <" EDMACSL equ 0EF6h ;# "> +"934 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 934: __asm("EDMACSH equ 0EF7h"); +[; <" EDMACSH equ 0EF7h ;# "> +"941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 941: __asm("EIE equ 0EFBh"); +[; <" EIE equ 0EFBh ;# "> +"1001 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1001: __asm("ESTAT equ 0EFDh"); +[; <" ESTAT equ 0EFDh ;# "> +"1041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1041: __asm("ECON2 equ 0EFEh"); +[; <" ECON2 equ 0EFEh ;# "> +"1074 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1074: __asm("EIR equ 0F60h"); +[; <" EIR equ 0F60h ;# "> +"1134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1134: __asm("EDATA equ 0F61h"); +[; <" EDATA equ 0F61h ;# "> +"1196 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1196: __asm("SSP2CON2 equ 0F62h"); +[; <" SSP2CON2 equ 0F62h ;# "> +"1383 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1383: __asm("SSP2CON1 equ 0F63h"); +[; <" SSP2CON1 equ 0F63h ;# "> +"1503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1503: __asm("SSP2STAT equ 0F64h"); +[; <" SSP2STAT equ 0F64h ;# "> +"1930 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1930: __asm("SSP2ADD equ 0F65h"); +[; <" SSP2ADD equ 0F65h ;# "> +"1992 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1992: __asm("SSP2BUF equ 0F66h"); +[; <" SSP2BUF equ 0F66h ;# "> +"1999 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 1999: __asm("ECCP2DEL equ 0F67h"); +[; <" ECCP2DEL equ 0F67h ;# "> +"2119 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2119: __asm("ECCP2AS equ 0F68h"); +[; <" ECCP2AS equ 0F68h ;# "> +"2251 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2251: __asm("ECCP3DEL equ 0F69h"); +[; <" ECCP3DEL equ 0F69h ;# "> +"2371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2371: __asm("ECCP3AS equ 0F6Ah"); +[; <" ECCP3AS equ 0F6Ah ;# "> +"2503 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2503: __asm("RCSTA2 equ 0F6Bh"); +[; <" RCSTA2 equ 0F6Bh ;# "> +"2681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2681: __asm("TXSTA2 equ 0F6Ch"); +[; <" TXSTA2 equ 0F6Ch ;# "> +"2841 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2841: __asm("TXREG2 equ 0F6Dh"); +[; <" TXREG2 equ 0F6Dh ;# "> +"2848 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2848: __asm("RCREG2 equ 0F6Eh"); +[; <" RCREG2 equ 0F6Eh ;# "> +"2855 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2855: __asm("SPBRG2 equ 0F6Fh"); +[; <" SPBRG2 equ 0F6Fh ;# "> +"2862 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2862: __asm("CCP5CON equ 0F70h"); +[; <" CCP5CON equ 0F70h ;# "> +"2941 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2941: __asm("CCPR5 equ 0F71h"); +[; <" CCPR5 equ 0F71h ;# "> +"2948 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2948: __asm("CCPR5L equ 0F71h"); +[; <" CCPR5L equ 0F71h ;# "> +"2955 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2955: __asm("CCPR5H equ 0F72h"); +[; <" CCPR5H equ 0F72h ;# "> +"2962 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 2962: __asm("CCP4CON equ 0F73h"); +[; <" CCP4CON equ 0F73h ;# "> +"3041 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3041: __asm("CCPR4 equ 0F74h"); +[; <" CCPR4 equ 0F74h ;# "> +"3048 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3048: __asm("CCPR4L equ 0F74h"); +[; <" CCPR4L equ 0F74h ;# "> +"3055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3055: __asm("CCPR4H equ 0F75h"); +[; <" CCPR4H equ 0F75h ;# "> +"3062 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3062: __asm("T4CON equ 0F76h"); +[; <" T4CON equ 0F76h ;# "> +"3133 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3133: __asm("PR4 equ 0F77h"); +[; <" PR4 equ 0F77h ;# "> +"3140 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3140: __asm("TMR4 equ 0F78h"); +[; <" TMR4 equ 0F78h ;# "> +"3147 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3147: __asm("ECCP1DEL equ 0F79h"); +[; <" ECCP1DEL equ 0F79h ;# "> +"3267 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3267: __asm("ERDPT equ 0F7Ah"); +[; <" ERDPT equ 0F7Ah ;# "> +"3274 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3274: __asm("ERDPTL equ 0F7Ah"); +[; <" ERDPTL equ 0F7Ah ;# "> +"3281 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3281: __asm("ERDPTH equ 0F7Bh"); +[; <" ERDPTH equ 0F7Bh ;# "> +"3288 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3288: __asm("BAUDCON2 equ 0F7Ch"); +[; <" BAUDCON2 equ 0F7Ch ;# "> +"3293 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3293: __asm("BAUDCTL2 equ 0F7Ch"); +[; <" BAUDCTL2 equ 0F7Ch ;# "> +"3564 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3564: __asm("SPBRGH2 equ 0F7Dh"); +[; <" SPBRGH2 equ 0F7Dh ;# "> +"3571 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3571: __asm("BAUDCON1 equ 0F7Eh"); +[; <" BAUDCON1 equ 0F7Eh ;# "> +"3576 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3576: __asm("BAUDCON equ 0F7Eh"); +[; <" BAUDCON equ 0F7Eh ;# "> +"3580 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3580: __asm("BAUDCTL equ 0F7Eh"); +[; <" BAUDCTL equ 0F7Eh ;# "> +"3584 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 3584: __asm("BAUDCTL1 equ 0F7Eh"); +[; <" BAUDCTL1 equ 0F7Eh ;# "> +"4249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4249: __asm("SPBRGH1 equ 0F7Fh"); +[; <" SPBRGH1 equ 0F7Fh ;# "> +"4254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4254: __asm("SPBRGH equ 0F7Fh"); +[; <" SPBRGH equ 0F7Fh ;# "> +"4261 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4261: __asm("PORTA equ 0F80h"); +[; <" PORTA equ 0F80h ;# "> +"4404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4404: __asm("PORTB equ 0F81h"); +[; <" PORTB equ 0F81h ;# "> +"4562 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4562: __asm("PORTC equ 0F82h"); +[; <" PORTC equ 0F82h ;# "> +"4802 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 4802: __asm("PORTD equ 0F83h"); +[; <" PORTD equ 0F83h ;# "> +"5021 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5021: __asm("PORTE equ 0F84h"); +[; <" PORTE equ 0F84h ;# "> +"5313 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5313: __asm("PORTF equ 0F85h"); +[; <" PORTF equ 0F85h ;# "> +"5492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5492: __asm("PORTG equ 0F86h"); +[; <" PORTG equ 0F86h ;# "> +"5622 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5622: __asm("PORTH equ 0F87h"); +[; <" PORTH equ 0F87h ;# "> +"5788 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5788: __asm("PORTJ equ 0F88h"); +[; <" PORTJ equ 0F88h ;# "> +"5994 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 5994: __asm("LATA equ 0F89h"); +[; <" LATA equ 0F89h ;# "> +"6115 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6115: __asm("LATB equ 0F8Ah"); +[; <" LATB equ 0F8Ah ;# "> +"6227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6227: __asm("LATC equ 0F8Bh"); +[; <" LATC equ 0F8Bh ;# "> +"6339 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6339: __asm("LATD equ 0F8Ch"); +[; <" LATD equ 0F8Ch ;# "> +"6451 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6451: __asm("LATE equ 0F8Dh"); +[; <" LATE equ 0F8Dh ;# "> +"6563 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6563: __asm("LATF equ 0F8Eh"); +[; <" LATF equ 0F8Eh ;# "> +"6675 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6675: __asm("LATG equ 0F8Fh"); +[; <" LATG equ 0F8Fh ;# "> +"6769 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6769: __asm("LATH equ 0F90h"); +[; <" LATH equ 0F90h ;# "> +"6881 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6881: __asm("LATJ equ 0F91h"); +[; <" LATJ equ 0F91h ;# "> +"6993 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6993: __asm("TRISA equ 0F92h"); +[; <" TRISA equ 0F92h ;# "> +"6998 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 6998: __asm("DDRA equ 0F92h"); +[; <" DDRA equ 0F92h ;# "> +"7167 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7167: __asm("TRISB equ 0F93h"); +[; <" TRISB equ 0F93h ;# "> +"7172 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7172: __asm("DDRB equ 0F93h"); +[; <" DDRB equ 0F93h ;# "> +"7389 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7389: __asm("TRISC equ 0F94h"); +[; <" TRISC equ 0F94h ;# "> +"7394 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7394: __asm("DDRC equ 0F94h"); +[; <" DDRC equ 0F94h ;# "> +"7611 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7611: __asm("TRISD equ 0F95h"); +[; <" TRISD equ 0F95h ;# "> +"7616 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7616: __asm("DDRD equ 0F95h"); +[; <" DDRD equ 0F95h ;# "> +"7833 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7833: __asm("TRISE equ 0F96h"); +[; <" TRISE equ 0F96h ;# "> +"7838 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 7838: __asm("DDRE equ 0F96h"); +[; <" DDRE equ 0F96h ;# "> +"8055 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8055: __asm("TRISF equ 0F97h"); +[; <" TRISF equ 0F97h ;# "> +"8060 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8060: __asm("DDRF equ 0F97h"); +[; <" DDRF equ 0F97h ;# "> +"8277 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8277: __asm("TRISG equ 0F98h"); +[; <" TRISG equ 0F98h ;# "> +"8282 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8282: __asm("DDRG equ 0F98h"); +[; <" DDRG equ 0F98h ;# "> +"8499 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8499: __asm("TRISH equ 0F99h"); +[; <" TRISH equ 0F99h ;# "> +"8504 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8504: __asm("DDRH equ 0F99h"); +[; <" DDRH equ 0F99h ;# "> +"8721 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8721: __asm("TRISJ equ 0F9Ah"); +[; <" TRISJ equ 0F9Ah ;# "> +"8726 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8726: __asm("DDRJ equ 0F9Ah"); +[; <" DDRJ equ 0F9Ah ;# "> +"8943 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8943: __asm("OSCTUNE equ 0F9Bh"); +[; <" OSCTUNE equ 0F9Bh ;# "> +"8997 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 8997: __asm("MEMCON equ 0F9Ch"); +[; <" MEMCON equ 0F9Ch ;# "> +"9058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9058: __asm("PIE1 equ 0F9Dh"); +[; <" PIE1 equ 0F9Dh ;# "> +"9141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9141: __asm("PIR1 equ 0F9Eh"); +[; <" PIR1 equ 0F9Eh ;# "> +"9227 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9227: __asm("IPR1 equ 0F9Fh"); +[; <" IPR1 equ 0F9Fh ;# "> +"9310 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9310: __asm("PIE2 equ 0FA0h"); +[; <" PIE2 equ 0FA0h ;# "> +"9371 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9371: __asm("PIR2 equ 0FA1h"); +[; <" PIR2 equ 0FA1h ;# "> +"9432 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9432: __asm("IPR2 equ 0FA2h"); +[; <" IPR2 equ 0FA2h ;# "> +"9493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9493: __asm("PIE3 equ 0FA3h"); +[; <" PIE3 equ 0FA3h ;# "> +"9603 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9603: __asm("PIR3 equ 0FA4h"); +[; <" PIR3 equ 0FA4h ;# "> +"9681 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9681: __asm("IPR3 equ 0FA5h"); +[; <" IPR3 equ 0FA5h ;# "> +"9759 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9759: __asm("EECON1 equ 0FA6h"); +[; <" EECON1 equ 0FA6h ;# "> +"9798 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9798: __asm("EECON2 equ 0FA7h"); +[; <" EECON2 equ 0FA7h ;# "> +"9805 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9805: __asm("RCSTA1 equ 0FABh"); +[; <" RCSTA1 equ 0FABh ;# "> +"9810 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 9810: __asm("RCSTA equ 0FABh"); +[; <" RCSTA equ 0FABh ;# "> +"10129 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10129: __asm("TXSTA1 equ 0FACh"); +[; <" TXSTA1 equ 0FACh ;# "> +"10134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10134: __asm("TXSTA equ 0FACh"); +[; <" TXSTA equ 0FACh ;# "> +"10417 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10417: __asm("TXREG1 equ 0FADh"); +[; <" TXREG1 equ 0FADh ;# "> +"10422 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10422: __asm("TXREG equ 0FADh"); +[; <" TXREG equ 0FADh ;# "> +"10429 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10429: __asm("RCREG1 equ 0FAEh"); +[; <" RCREG1 equ 0FAEh ;# "> +"10434 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10434: __asm("RCREG equ 0FAEh"); +[; <" RCREG equ 0FAEh ;# "> +"10441 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10441: __asm("SPBRG1 equ 0FAFh"); +[; <" SPBRG1 equ 0FAFh ;# "> +"10446 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10446: __asm("SPBRG equ 0FAFh"); +[; <" SPBRG equ 0FAFh ;# "> +"10453 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10453: __asm("PSPCON equ 0FB0h"); +[; <" PSPCON equ 0FB0h ;# "> +"10492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10492: __asm("T3CON equ 0FB1h"); +[; <" T3CON equ 0FB1h ;# "> +"10613 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10613: __asm("TMR3 equ 0FB2h"); +[; <" TMR3 equ 0FB2h ;# "> +"10620 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10620: __asm("TMR3L equ 0FB2h"); +[; <" TMR3L equ 0FB2h ;# "> +"10627 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10627: __asm("TMR3H equ 0FB3h"); +[; <" TMR3H equ 0FB3h ;# "> +"10634 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10634: __asm("CMCON equ 0FB4h"); +[; <" CMCON equ 0FB4h ;# "> +"10724 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10724: __asm("CVRCON equ 0FB5h"); +[; <" CVRCON equ 0FB5h ;# "> +"10803 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10803: __asm("ECCP1AS equ 0FB6h"); +[; <" ECCP1AS equ 0FB6h ;# "> +"10935 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10935: __asm("CCP3CON equ 0FB7h"); +[; <" CCP3CON equ 0FB7h ;# "> +"10940 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 10940: __asm("ECCP3CON equ 0FB7h"); +[; <" ECCP3CON equ 0FB7h ;# "> +"11127 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11127: __asm("CCPR3 equ 0FB8h"); +[; <" CCPR3 equ 0FB8h ;# "> +"11134 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11134: __asm("CCPR3L equ 0FB8h"); +[; <" CCPR3L equ 0FB8h ;# "> +"11141 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11141: __asm("CCPR3H equ 0FB9h"); +[; <" CCPR3H equ 0FB9h ;# "> +"11148 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11148: __asm("CCP2CON equ 0FBAh"); +[; <" CCP2CON equ 0FBAh ;# "> +"11153 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11153: __asm("ECCP2CON equ 0FBAh"); +[; <" ECCP2CON equ 0FBAh ;# "> +"11340 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11340: __asm("CCPR2 equ 0FBBh"); +[; <" CCPR2 equ 0FBBh ;# "> +"11347 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11347: __asm("CCPR2L equ 0FBBh"); +[; <" CCPR2L equ 0FBBh ;# "> +"11354 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11354: __asm("CCPR2H equ 0FBCh"); +[; <" CCPR2H equ 0FBCh ;# "> +"11361 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11361: __asm("CCP1CON equ 0FBDh"); +[; <" CCP1CON equ 0FBDh ;# "> +"11366 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11366: __asm("ECCP1CON equ 0FBDh"); +[; <" ECCP1CON equ 0FBDh ;# "> +"11553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11553: __asm("CCPR1 equ 0FBEh"); +[; <" CCPR1 equ 0FBEh ;# "> +"11560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11560: __asm("CCPR1L equ 0FBEh"); +[; <" CCPR1L equ 0FBEh ;# "> +"11567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11567: __asm("CCPR1H equ 0FBFh"); +[; <" CCPR1H equ 0FBFh ;# "> +"11574 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11574: __asm("ADCON2 equ 0FC0h"); +[; <" ADCON2 equ 0FC0h ;# "> +"11645 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11645: __asm("ADCON1 equ 0FC1h"); +[; <" ADCON1 equ 0FC1h ;# "> +"11730 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11730: __asm("ADCON0 equ 0FC2h"); +[; <" ADCON0 equ 0FC2h ;# "> +"11856 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11856: __asm("ADRES equ 0FC3h"); +[; <" ADRES equ 0FC3h ;# "> +"11863 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11863: __asm("ADRESL equ 0FC3h"); +[; <" ADRESL equ 0FC3h ;# "> +"11870 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11870: __asm("ADRESH equ 0FC4h"); +[; <" ADRESH equ 0FC4h ;# "> +"11877 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11877: __asm("SSP1CON2 equ 0FC5h"); +[; <" SSP1CON2 equ 0FC5h ;# "> +"11882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 11882: __asm("SSPCON2 equ 0FC5h"); +[; <" SSPCON2 equ 0FC5h ;# "> +"12249 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12249: __asm("SSP1CON1 equ 0FC6h"); +[; <" SSP1CON1 equ 0FC6h ;# "> +"12254 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12254: __asm("SSPCON1 equ 0FC6h"); +[; <" SSPCON1 equ 0FC6h ;# "> +"12487 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12487: __asm("SSP1STAT equ 0FC7h"); +[; <" SSP1STAT equ 0FC7h ;# "> +"12492 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 12492: __asm("SSPSTAT equ 0FC7h"); +[; <" SSPSTAT equ 0FC7h ;# "> +"13085 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13085: __asm("SSP1ADD equ 0FC8h"); +[; <" SSP1ADD equ 0FC8h ;# "> +"13090 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13090: __asm("SSPADD equ 0FC8h"); +[; <" SSPADD equ 0FC8h ;# "> +"13307 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13307: __asm("SSP1BUF equ 0FC9h"); +[; <" SSP1BUF equ 0FC9h ;# "> +"13312 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13312: __asm("SSPBUF equ 0FC9h"); +[; <" SSPBUF equ 0FC9h ;# "> +"13319 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13319: __asm("T2CON equ 0FCAh"); +[; <" T2CON equ 0FCAh ;# "> +"13390 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13390: __asm("PR2 equ 0FCBh"); +[; <" PR2 equ 0FCBh ;# "> +"13397 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13397: __asm("TMR2 equ 0FCCh"); +[; <" TMR2 equ 0FCCh ;# "> +"13404 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13404: __asm("T1CON equ 0FCDh"); +[; <" T1CON equ 0FCDh ;# "> +"13516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13516: __asm("TMR1 equ 0FCEh"); +[; <" TMR1 equ 0FCEh ;# "> +"13523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13523: __asm("TMR1L equ 0FCEh"); +[; <" TMR1L equ 0FCEh ;# "> +"13530 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13530: __asm("TMR1H equ 0FCFh"); +[; <" TMR1H equ 0FCFh ;# "> +"13537 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13537: __asm("RCON equ 0FD0h"); +[; <" RCON equ 0FD0h ;# "> +"13685 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13685: __asm("WDTCON equ 0FD1h"); +[; <" WDTCON equ 0FD1h ;# "> +"13713 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13713: __asm("ECON1 equ 0FD2h"); +[; <" ECON1 equ 0FD2h ;# "> +"13764 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13764: __asm("OSCCON equ 0FD3h"); +[; <" OSCCON equ 0FD3h ;# "> +"13812 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13812: __asm("T0CON equ 0FD5h"); +[; <" T0CON equ 0FD5h ;# "> +"13882 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13882: __asm("TMR0 equ 0FD6h"); +[; <" TMR0 equ 0FD6h ;# "> +"13889 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13889: __asm("TMR0L equ 0FD6h"); +[; <" TMR0L equ 0FD6h ;# "> +"13896 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13896: __asm("TMR0H equ 0FD7h"); +[; <" TMR0H equ 0FD7h ;# "> +"13903 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13903: __asm("STATUS equ 0FD8h"); +[; <" STATUS equ 0FD8h ;# "> +"13974 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13974: __asm("FSR2 equ 0FD9h"); +[; <" FSR2 equ 0FD9h ;# "> +"13981 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13981: __asm("FSR2L equ 0FD9h"); +[; <" FSR2L equ 0FD9h ;# "> +"13988 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13988: __asm("FSR2H equ 0FDAh"); +[; <" FSR2H equ 0FDAh ;# "> +"13995 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 13995: __asm("PLUSW2 equ 0FDBh"); +[; <" PLUSW2 equ 0FDBh ;# "> +"14002 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14002: __asm("PREINC2 equ 0FDCh"); +[; <" PREINC2 equ 0FDCh ;# "> +"14009 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14009: __asm("POSTDEC2 equ 0FDDh"); +[; <" POSTDEC2 equ 0FDDh ;# "> +"14016 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14016: __asm("POSTINC2 equ 0FDEh"); +[; <" POSTINC2 equ 0FDEh ;# "> +"14023 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14023: __asm("INDF2 equ 0FDFh"); +[; <" INDF2 equ 0FDFh ;# "> +"14030 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14030: __asm("BSR equ 0FE0h"); +[; <" BSR equ 0FE0h ;# "> +"14037 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14037: __asm("FSR1 equ 0FE1h"); +[; <" FSR1 equ 0FE1h ;# "> +"14044 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14044: __asm("FSR1L equ 0FE1h"); +[; <" FSR1L equ 0FE1h ;# "> +"14051 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14051: __asm("FSR1H equ 0FE2h"); +[; <" FSR1H equ 0FE2h ;# "> +"14058 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14058: __asm("PLUSW1 equ 0FE3h"); +[; <" PLUSW1 equ 0FE3h ;# "> +"14065 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14065: __asm("PREINC1 equ 0FE4h"); +[; <" PREINC1 equ 0FE4h ;# "> +"14072 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14072: __asm("POSTDEC1 equ 0FE5h"); +[; <" POSTDEC1 equ 0FE5h ;# "> +"14079 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14079: __asm("POSTINC1 equ 0FE6h"); +[; <" POSTINC1 equ 0FE6h ;# "> +"14086 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14086: __asm("INDF1 equ 0FE7h"); +[; <" INDF1 equ 0FE7h ;# "> +"14093 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14093: __asm("WREG equ 0FE8h"); +[; <" WREG equ 0FE8h ;# "> +"14100 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14100: __asm("FSR0 equ 0FE9h"); +[; <" FSR0 equ 0FE9h ;# "> +"14107 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14107: __asm("FSR0L equ 0FE9h"); +[; <" FSR0L equ 0FE9h ;# "> +"14114 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14114: __asm("FSR0H equ 0FEAh"); +[; <" FSR0H equ 0FEAh ;# "> +"14121 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14121: __asm("PLUSW0 equ 0FEBh"); +[; <" PLUSW0 equ 0FEBh ;# "> +"14128 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14128: __asm("PREINC0 equ 0FECh"); +[; <" PREINC0 equ 0FECh ;# "> +"14135 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14135: __asm("POSTDEC0 equ 0FEDh"); +[; <" POSTDEC0 equ 0FEDh ;# "> +"14142 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14142: __asm("POSTINC0 equ 0FEEh"); +[; <" POSTINC0 equ 0FEEh ;# "> +"14149 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14149: __asm("INDF0 equ 0FEFh"); +[; <" INDF0 equ 0FEFh ;# "> +"14156 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14156: __asm("INTCON3 equ 0FF0h"); +[; <" INTCON3 equ 0FF0h ;# "> +"14268 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14268: __asm("INTCON2 equ 0FF1h"); +[; <" INTCON2 equ 0FF1h ;# "> +"14355 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14355: __asm("INTCON equ 0FF2h"); +[; <" INTCON equ 0FF2h ;# "> +"14472 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14472: __asm("PROD equ 0FF3h"); +[; <" PROD equ 0FF3h ;# "> +"14479 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14479: __asm("PRODL equ 0FF3h"); +[; <" PRODL equ 0FF3h ;# "> +"14486 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14486: __asm("PRODH equ 0FF4h"); +[; <" PRODH equ 0FF4h ;# "> +"14493 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14493: __asm("TABLAT equ 0FF5h"); +[; <" TABLAT equ 0FF5h ;# "> +"14502 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14502: __asm("TBLPTR equ 0FF6h"); +[; <" TBLPTR equ 0FF6h ;# "> +"14509 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14509: __asm("TBLPTRL equ 0FF6h"); +[; <" TBLPTRL equ 0FF6h ;# "> +"14516 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14516: __asm("TBLPTRH equ 0FF7h"); +[; <" TBLPTRH equ 0FF7h ;# "> +"14523 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14523: __asm("TBLPTRU equ 0FF8h"); +[; <" TBLPTRU equ 0FF8h ;# "> +"14532 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14532: __asm("PCLAT equ 0FF9h"); +[; <" PCLAT equ 0FF9h ;# "> +"14539 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14539: __asm("PC equ 0FF9h"); +[; <" PC equ 0FF9h ;# "> +"14546 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14546: __asm("PCL equ 0FF9h"); +[; <" PCL equ 0FF9h ;# "> +"14553 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14553: __asm("PCLATH equ 0FFAh"); +[; <" PCLATH equ 0FFAh ;# "> +"14560 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14560: __asm("PCLATU equ 0FFBh"); +[; <" PCLATU equ 0FFBh ;# "> +"14567 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14567: __asm("STKPTR equ 0FFCh"); +[; <" STKPTR equ 0FFCh ;# "> +"14673 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14673: __asm("TOS equ 0FFDh"); +[; <" TOS equ 0FFDh ;# "> +"14680 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14680: __asm("TOSL equ 0FFDh"); +[; <" TOSL equ 0FFDh ;# "> +"14687 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14687: __asm("TOSH equ 0FFEh"); +[; <" TOSH equ 0FFEh ;# "> +"14694 +[; ;C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\pic\include\proc\pic18f97j60.h: 14694: __asm("TOSU equ 0FFFh"); +[; <" TOSU equ 0FFFh ;# "> +"50 mcc_generated_files/pin_manager.c +[; ;mcc_generated_files/pin_manager.c: 50: void PIN_MANAGER_Initialize(void) +[v _PIN_MANAGER_Initialize `(v ~T0 @X0 1 ef ] +"51 +[; ;mcc_generated_files/pin_manager.c: 51: { +{ +[e :U _PIN_MANAGER_Initialize ] +[f ] +"55 +[; ;mcc_generated_files/pin_manager.c: 55: LATE = 0x00; +[e = _LATE -> -> 0 `i `uc ] +"56 +[; ;mcc_generated_files/pin_manager.c: 56: LATJ = 0x00; +[e = _LATJ -> -> 0 `i `uc ] +"57 +[; ;mcc_generated_files/pin_manager.c: 57: LATD = 0x00; +[e = _LATD -> -> 0 `i `uc ] +"58 +[; ;mcc_generated_files/pin_manager.c: 58: LATA = 0x00; +[e = _LATA -> -> 0 `i `uc ] +"59 +[; ;mcc_generated_files/pin_manager.c: 59: LATF = 0x00; +[e = _LATF -> -> 0 `i `uc ] +"60 +[; ;mcc_generated_files/pin_manager.c: 60: LATB = 0x00; +[e = _LATB -> -> 0 `i `uc ] +"61 +[; ;mcc_generated_files/pin_manager.c: 61: LATG = 0x00; +[e = _LATG -> -> 0 `i `uc ] +"62 +[; ;mcc_generated_files/pin_manager.c: 62: LATC = 0x00; +[e = _LATC -> -> 0 `i `uc ] +"63 +[; ;mcc_generated_files/pin_manager.c: 63: LATH = 0x00; +[e = _LATH -> -> 0 `i `uc ] +"68 +[; ;mcc_generated_files/pin_manager.c: 68: TRISE = 0xFF; +[e = _TRISE -> -> 255 `i `uc ] +"69 +[; ;mcc_generated_files/pin_manager.c: 69: TRISF = 0xFF; +[e = _TRISF -> -> 255 `i `uc ] +"70 +[; ;mcc_generated_files/pin_manager.c: 70: TRISA = 0x3F; +[e = _TRISA -> -> 63 `i `uc ] +"71 +[; ;mcc_generated_files/pin_manager.c: 71: TRISG = 0xFF; +[e = _TRISG -> -> 255 `i `uc ] +"72 +[; ;mcc_generated_files/pin_manager.c: 72: TRISB = 0xFF; +[e = _TRISB -> -> 255 `i `uc ] +"73 +[; ;mcc_generated_files/pin_manager.c: 73: TRISH = 0xFF; +[e = _TRISH -> -> 255 `i `uc ] +"74 +[; ;mcc_generated_files/pin_manager.c: 74: TRISC = 0xFF; +[e = _TRISC -> -> 255 `i `uc ] +"75 +[; ;mcc_generated_files/pin_manager.c: 75: TRISD = 0xFF; +[e = _TRISD -> -> 255 `i `uc ] +"76 +[; ;mcc_generated_files/pin_manager.c: 76: TRISJ = 0xFF; +[e = _TRISJ -> -> 255 `i `uc ] +"81 +[; ;mcc_generated_files/pin_manager.c: 81: ADCON1bits.PCFG = 0x00; +[e = . . _ADCON1bits 0 0 -> -> 0 `i `uc ] +"88 +[; ;mcc_generated_files/pin_manager.c: 88: } +[e :UE 538 ] +} +"90 +[; ;mcc_generated_files/pin_manager.c: 90: void PIN_MANAGER_IOC(void) +[v _PIN_MANAGER_IOC `(v ~T0 @X0 1 ef ] +"91 +[; ;mcc_generated_files/pin_manager.c: 91: { +{ +[e :U _PIN_MANAGER_IOC ] +[f ] +"93 +[; ;mcc_generated_files/pin_manager.c: 93: } +[e :UE 539 ] +} diff --git a/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.p1.d b/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.p1.d new file mode 100644 index 0000000..ef03b2b --- /dev/null +++ b/solar_panel.X/build/default/production/mcc_generated_files/pin_manager.p1.d @@ -0,0 +1,3 @@ +build/default/production/mcc_generated_files/pin_manager.p1: \ +mcc_generated_files/pin_manager.c \ +mcc_generated_files/pin_manager.h diff --git a/solar_panel.X/dist/default/debug/doprnt.d b/solar_panel.X/dist/default/debug/doprnt.d new file mode 100644 index 0000000..52844d4 --- /dev/null +++ b/solar_panel.X/dist/default/debug/doprnt.d @@ -0,0 +1,2 @@ +dist/default/debug\doprnt.p1: \ + C:\Program\ Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c diff --git a/solar_panel.X/dist/default/debug/doprnt.i b/solar_panel.X/dist/default/debug/doprnt.i new file mode 100644 index 0000000..ddfe93d --- /dev/null +++ b/solar_panel.X/dist/default/debug/doprnt.i @@ -0,0 +1,988 @@ +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\ctype.h" 1 3 + + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\features.h" 1 3 +# 8 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\ctype.h" 2 3 + + +int isalnum(int); +int isalpha(int); +int isblank(int); +int iscntrl(int); +int isdigit(int); +int isgraph(int); +int islower(int); +int isprint(int); +int ispunct(int); +int isspace(int); +int isupper(int); +int isxdigit(int); +int tolower(int); +int toupper(int); +# 3 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 1 3 + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\musl_xc8.h" 1 3 +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 2 3 + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 1 3 +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 127 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long uintptr_t; +# 142 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long intptr_t; +# 158 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef signed char int8_t; + + + + +typedef short int16_t; + + + + +typedef __int24 int24_t; + + + + +typedef long int32_t; + + + + + +typedef long long int64_t; +# 188 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long intmax_t; + + + + + +typedef unsigned char uint8_t; + + + + +typedef unsigned short uint16_t; + + + + +typedef __uint24 uint24_t; + + + + +typedef unsigned long uint32_t; + + + + + +typedef unsigned long long uint64_t; +# 229 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned long long uintmax_t; +# 22 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 + + +typedef int8_t int_fast8_t; + +typedef int64_t int_fast64_t; + + +typedef int8_t int_least8_t; +typedef int16_t int_least16_t; + +typedef int24_t int_least24_t; +typedef int24_t int_fast24_t; + +typedef int32_t int_least32_t; + +typedef int64_t int_least64_t; + + +typedef uint8_t uint_fast8_t; + +typedef uint64_t uint_fast64_t; + + +typedef uint8_t uint_least8_t; +typedef uint16_t uint_least16_t; + +typedef uint24_t uint_least24_t; +typedef uint24_t uint_fast24_t; + +typedef uint32_t uint_least32_t; + +typedef uint64_t uint_least64_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/stdint.h" 1 3 +typedef int16_t int_fast16_t; +typedef int32_t int_fast32_t; +typedef uint16_t uint_fast16_t; +typedef uint32_t uint_fast32_t; +# 144 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdint.h" 2 3 +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 2 3 + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 33 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef float float_t; + + + + +typedef double double_t; +# 15 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 2 3 +# 42 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 3 +int __fpclassifyf(float); + + + + + + + +int __signbitf(float); +# 59 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 3 +double acos(double); +float acosf(float); +long double acosl(long double); + + + +double acosh(double); +float acoshf(float); +long double acoshl(long double); + + + +double asin(double); +float asinf(float); +long double asinl(long double); + + + +double asinh(double); +float asinhf(float); +long double asinhl(long double); + + + +double atan(double); +float atanf(float); +long double atanl(long double); + + + +double atan2(double, double); +float atan2f(float, float); +long double atan2l(long double, long double); + + + +double atanh(double); +float atanhf(float); +long double atanhl(long double); + + + +double cbrt(double); +float cbrtf(float); +long double cbrtl(long double); + + + +double ceil(double); +float ceilf(float); +long double ceill(long double); + + + +double copysign(double, double); +float copysignf(float, float); +long double copysignl(long double, long double); + + + +double cos(double); +float cosf(float); +long double cosl(long double); + + + +double cosh(double); +float coshf(float); +long double coshl(long double); + + + +double erf(double); +float erff(float); +long double erfl(long double); + + + +double erfc(double); +float erfcf(float); +long double erfcl(long double); + + + +double exp(double); +float expf(float); +long double expl(long double); + + + +double exp2(double); +float exp2f(float); +long double exp2l(long double); + + + +double expm1(double); +float expm1f(float); +long double expm1l(long double); + + + +double fabs(double); +float fabsf(float); +long double fabsl(long double); + + + +double fdim(double, double); +float fdimf(float, float); +long double fdiml(long double, long double); + + + +double floor(double); +float floorf(float); +long double floorl(long double); + + + +double fma(double, double, double); +float fmaf(float, float, float); +long double fmal(long double, long double, long double); + + + +double fmax(double, double); +float fmaxf(float, float); +long double fmaxl(long double, long double); + + + +double fmin(double, double); +float fminf(float, float); +long double fminl(long double, long double); + + + +double fmod(double, double); +float fmodf(float, float); +long double fmodl(long double, long double); + + + +double frexp(double, int *); +float frexpf(float, int *); +long double frexpl(long double, int *); + + + +double hypot(double, double); +float hypotf(float, float); +long double hypotl(long double, long double); + + + +int ilogb(double); +int ilogbf(float); +int ilogbl(long double); + + + +double ldexp(double, int); +float ldexpf(float, int); +long double ldexpl(long double, int); + + + +double lgamma(double); +float lgammaf(float); +long double lgammal(long double); + + + +long long llrint(double); +long long llrintf(float); +long long llrintl(long double); + + + +long long llround(double); +long long llroundf(float); +long long llroundl(long double); + + + +double log(double); +float logf(float); +long double logl(long double); + + + +double log10(double); +float log10f(float); +long double log10l(long double); + + + +double log1p(double); +float log1pf(float); +long double log1pl(long double); + + + +double log2(double); +float log2f(float); +long double log2l(long double); + + + +double logb(double); +float logbf(float); +long double logbl(long double); + + + +long lrint(double); +long lrintf(float); +long lrintl(long double); + + + +long lround(double); +long lroundf(float); +long lroundl(long double); + + + +double modf(double, double *); +float modff(float, float *); +long double modfl(long double, long double *); + + + +double nan(const char *); +float nanf(const char *); +long double nanl(const char *); + + + +double nearbyint(double); +float nearbyintf(float); +long double nearbyintl(long double); + + + +double nextafter(double, double); +float nextafterf(float, float); +long double nextafterl(long double, long double); + + + +double nexttoward(double, long double); +float nexttowardf(float, long double); +long double nexttowardl(long double, long double); +# 323 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 3 +double pow(double, double); +__attribute__((nonreentrant)) float powf(float, float); +long double powl(long double, long double); + + + +double remainder(double, double); +float remainderf(float, float); +long double remainderl(long double, long double); + + + +double remquo(double, double, int *); +float remquof(float, float, int *); +long double remquol(long double, long double, int *); + + + +double rint(double); +float rintf(float); +long double rintl(long double); + + + +double round(double); +float roundf(float); +long double roundl(long double); + + + +double scalbln(double, long); +float scalblnf(float, long); +long double scalblnl(long double, long); + + + +double scalbn(double, int); +float scalbnf(float, int); +long double scalbnl(long double, int); + + + +double sin(double); +float sinf(float); +long double sinl(long double); + + + +double sinh(double); +float sinhf(float); +long double sinhl(long double); + + + +double sqrt(double); +float sqrtf(float); +long double sqrtl(long double); + + + +double tan(double); +float tanf(float); +long double tanl(long double); + + + +double tanh(double); +float tanhf(float); +long double tanhl(long double); + + + +double tgamma(double); +float tgammaf(float); +long double tgammal(long double); + + + +double trunc(double); +float truncf(float); +long double truncl(long double); +# 428 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\math.h" 3 +extern int signgam; + +double j0(double); +double j1(double); +double jn(int, double); + +double y0(double); +double y1(double); +double yn(int, double); +# 4 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdarg.h" 1 3 + + + + + + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 + + + + + +typedef void * va_list[1]; +# 8 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdarg.h" 2 3 + + +#pragma intrinsic(__va_start) +#pragma intrinsic(__va_arg) + +extern void * __va_start(void); +extern void * __va_arg(void *, ...); +# 5 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stddef.h" 1 3 +# 19 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stddef.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 18 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long int wchar_t; +# 122 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef unsigned size_t; +# 132 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef int ptrdiff_t; +# 19 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stddef.h" 2 3 +# 6 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 1 3 +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 11 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef void * __isoc_va_list[1]; +# 137 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long ssize_t; +# 246 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef long long off_t; +# 399 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct _IO_FILE FILE; +# 24 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 2 3 +# 52 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdio.h" 3 +typedef union _G_fpos64_t { + char __opaque[16]; + double __align; +} fpos_t; + +extern FILE *const stdin; +extern FILE *const stdout; +extern FILE *const stderr; + + + + + +FILE *fopen(const char *restrict, const char *restrict); +FILE *freopen(const char *restrict, const char *restrict, FILE *restrict); +int fclose(FILE *); + +int remove(const char *); +int rename(const char *, const char *); + +int feof(FILE *); +int ferror(FILE *); +int fflush(FILE *); +void clearerr(FILE *); + +int fseek(FILE *, long, int); +long ftell(FILE *); +void rewind(FILE *); + +int fgetpos(FILE *restrict, fpos_t *restrict); +int fsetpos(FILE *, const fpos_t *); + +size_t fread(void *restrict, size_t, size_t, FILE *restrict); +size_t fwrite(const void *restrict, size_t, size_t, FILE *restrict); + +int fgetc(FILE *); +int getc(FILE *); +int getchar(void); +int ungetc(int, FILE *); + +int fputc(int, FILE *); +int putc(int, FILE *); +int putchar(int); + +char *fgets(char *restrict, int, FILE *restrict); + +char *gets(char *); + + +int fputs(const char *restrict, FILE *restrict); +int puts(const char *); + +__attribute__((__format__(__printf__, 1, 2))) +int printf(const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int fprintf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 2, 3))) +int sprintf(char *restrict, const char *restrict, ...); +__attribute__((__format__(__printf__, 3, 4))) +int snprintf(char *restrict, size_t, const char *restrict, ...); + +__attribute__((__format__(__printf__, 1, 0))) +int vprintf(const char *restrict, __isoc_va_list); +int vfprintf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 2, 0))) +int vsprintf(char *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__printf__, 3, 0))) +int vsnprintf(char *restrict, size_t, const char *restrict, __isoc_va_list); + +__attribute__((__format__(__scanf__, 1, 2))) +int scanf(const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int fscanf(FILE *restrict, const char *restrict, ...); +__attribute__((__format__(__scanf__, 2, 3))) +int sscanf(const char *restrict, const char *restrict, ...); + +__attribute__((__format__(__scanf__, 1, 0))) +int vscanf(const char *restrict, __isoc_va_list); +int vfscanf(FILE *restrict, const char *restrict, __isoc_va_list); +__attribute__((__format__(__scanf__, 2, 0))) +int vsscanf(const char *restrict, const char *restrict, __isoc_va_list); + +void perror(const char *); + +int setvbuf(FILE *restrict, char *restrict, int, size_t); +void setbuf(FILE *restrict, char *restrict); + +char *tmpnam(char *); +FILE *tmpfile(void); + + + + +FILE *fmemopen(void *restrict, size_t, const char *restrict); +FILE *open_memstream(char **, size_t *); +FILE *fdopen(int, const char *); +FILE *popen(const char *, const char *); +int pclose(FILE *); +int fileno(FILE *); +int fseeko(FILE *, off_t, int); +off_t ftello(FILE *); +int dprintf(int, const char *restrict, ...); +int vdprintf(int, const char *restrict, __isoc_va_list); +void flockfile(FILE *); +int ftrylockfile(FILE *); +void funlockfile(FILE *); +int getc_unlocked(FILE *); +int getchar_unlocked(void); +int putc_unlocked(int, FILE *); +int putchar_unlocked(int); +ssize_t getdelim(char **restrict, size_t *restrict, int, FILE *restrict); +ssize_t getline(char **restrict, size_t *restrict, FILE *restrict); +int renameat(int, const char *, int, const char *); +char *ctermid(char *); + + + + + + + +char *tempnam(const char *, const char *); +# 8 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 1 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 21 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\stdlib.h" 2 3 + + +int atoi (const char *); +long atol (const char *); +long long atoll (const char *); +double atof (const char *); + +float strtof (const char *restrict, char **restrict); +double strtod (const char *restrict, char **restrict); +long double strtold (const char *restrict, char **restrict); + + + +long strtol (const char *restrict, char **restrict, int); +unsigned long strtoul (const char *restrict, char **restrict, int); +long long strtoll (const char *restrict, char **restrict, int); +unsigned long long strtoull (const char *restrict, char **restrict, int); + +int rand (void); +void srand (unsigned); + +void *malloc (size_t); +void *calloc (size_t, size_t); +void *realloc (void *, size_t); +void free (void *); + + void abort (void); +int atexit (void (*) (void)); + void exit (int); + void _Exit (int); + +void *bsearch (const void *, const void *, size_t, size_t, int (*)(const void *, const void *)); + + + + + + + +__attribute__((nonreentrant)) void qsort (void *, size_t, size_t, int (*)(const void *, const void *)); + +int abs (int); +long labs (long); +long long llabs (long long); + +typedef struct { int quot, rem; } div_t; +typedef struct { long quot, rem; } ldiv_t; +typedef struct { long long quot, rem; } lldiv_t; + +div_t div (int, int); +ldiv_t ldiv (long, long); +lldiv_t lldiv (long long, long long); + +typedef struct { unsigned int quot, rem; } udiv_t; +typedef struct { unsigned long quot, rem; } uldiv_t; +udiv_t udiv (unsigned int, unsigned int); +uldiv_t uldiv (unsigned long, unsigned long); +# 9 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 1 3 +# 25 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 3 +# 1 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 1 3 +# 411 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\bits/alltypes.h" 3 +typedef struct __locale_struct * locale_t; +# 25 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 2 3 + + +void *memcpy (void *restrict, const void *restrict, size_t); +void *memmove (void *, const void *, size_t); +void *memset (void *, int, size_t); +int memcmp (const void *, const void *, size_t); +void *memchr (const void *, int, size_t); + +char *strcpy (char *restrict, const char *restrict); +char *strncpy (char *restrict, const char *restrict, size_t); + +char *strcat (char *restrict, const char *restrict); +char *strncat (char *restrict, const char *restrict, size_t); + +int strcmp (const char *, const char *); +int strncmp (const char *, const char *, size_t); + +int strcoll (const char *, const char *); +size_t strxfrm (char *restrict, const char *restrict, size_t); + +char *strchr (const char *, int); +char *strrchr (const char *, int); + +size_t strcspn (const char *, const char *); +size_t strspn (const char *, const char *); +char *strpbrk (const char *, const char *); +char *strstr (const char *, const char *); +char *strtok (char *restrict, const char *restrict); + +size_t strlen (const char *); + +char *strerror (int); +# 65 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\include\\c99\\string.h" 3 +char *strtok_r (char *restrict, const char *restrict, char **restrict); +int strerror_r (int, char *, size_t); +char *stpcpy(char *restrict, const char *restrict); +char *stpncpy(char *restrict, const char *restrict, size_t); +size_t strnlen (const char *, size_t); +char *strdup (const char *); +char *strndup (const char *, size_t); +char *strsignal(int); +char *strerror_l (int, locale_t); +int strcoll_l (const char *, const char *, locale_t); +size_t strxfrm_l (char *restrict, const char *restrict, size_t, locale_t); + + + + +void *memccpy (void *restrict, const void *restrict, int, size_t); +# 10 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 + +# 1 "C:/Program Files/Microchip/MPLABX/v6.00/packs/Microchip/PIC18F-J_DFP/1.5.44/xc8\\pic\\include\\inline.h" 1 3 +# 11 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" 2 +# 99 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" +static int prec, width; +static char flags; + +union flui { + long double f; + + + + int32_t u; + +}; +# 125 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" +static char dbuf[32]; + + + + + + + +static void pad(FILE *fp, char *buf, int p) +{ + int i, w; +# 145 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" + w = (p < 0) ? 0 : p; + i = 0; + while (i < w) { + fputc(' ', fp); + ++i; + } + + + + + + fputs((const char *)buf, fp); + + + + + + + +} +# 443 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" +static void dtoa(FILE *fp, long long d) +{ + char s; + int i, p, w; + long long n; + + + n = d; + s = n < 0 ? 1 : 0; + if (s) { + n = -n; + } + + + + + + + + p = (0 < prec) ? prec : 1; + w = width; + if (s + + + + ) { + --w; + s = s ? '-' : '+'; + } +# 480 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" + i = sizeof(dbuf) - 1; + dbuf[i] = '\0'; + while (!(i < 1) && (n || (0 < p) + + + + )) { + --i; + dbuf[i] = (char)((int)'0' + abs(n % 10)); + --p; + --w; + n = n / 10; + } + + + if (s != 0) { + --i; + dbuf[i] = s; + } + + + return (void) pad(fp, &dbuf[i], w); +} +# 1006 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" +static void +vfpfcnvrt(FILE *fp, char *fmt[], va_list ap) +{ + char c, *cp; + int done, i; + union { + long long ll; + unsigned long long llu; + void *vp; + long double f; + } convarg; + + + if ((*fmt)[0] == '%') { + ++*fmt; + + flags = width = 0; + prec = -1; +# 1117 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" + cp = *fmt; +# 1187 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" + if (*cp == 'd' || *cp == 'i') { +# 1230 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" + convarg.ll = (long long)(int)(*(int *)__va_arg(*(int **)ap, (int)0)); + + *fmt = cp+1; + return (void) dtoa(fp, convarg.ll); + } +# 1509 "C:\\Program Files\\Microchip\\xc8\\v2.40\\pic\\sources\\c99\\common\\doprnt.c" + ++*fmt; + return (void) 0; + } + + + fputc((int)(*fmt)[0], fp); + ++*fmt; + return (void) 1; +} + + +int vfprintf(FILE *fp, const char *fmt, va_list ap) +{ + + char *cfmt; + + cfmt = (char *)fmt; + + + + while (*cfmt) { + + + + vfpfcnvrt(fp, &cfmt, ap); + } + + + + return 0; + + + + +} diff --git a/solar_panel.X/dist/default/debug/doprnt.p1 b/solar_panel.X/dist/default/debug/doprnt.p1 new file mode 100644 index 0000000..c7d5188 --- /dev/null +++ b/solar_panel.X/dist/default/debug/doprnt.p1 @@ -0,0 +1,334 @@ +Version 4.0 HI-TECH Software Intermediate Code +"399 C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\bits/alltypes.h +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\bits/alltypes.h: 399: typedef struct _IO_FILE FILE; +[s S1 ] +[n S1 _IO_FILE ] +"92 C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdio.h +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdio.h: 92: int fputc(int, FILE *); +[v _fputc `(i ~T0 @X0 0 ef2`i`*S1 ] +"101 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdio.h: 101: int fputs(const char *restrict, FILE *restrict); +[v _fputs `(i ~T0 @X0 0 ef2`*Cuc`*S1 ] +"62 C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdlib.h +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdlib.h: 62: int abs (int); +[v _abs `(i ~T0 @X0 0 ef1`i ] +"1011 C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1011: union { +[u S22 `o 1 `uo 1 `*v 1 `d 1 ] +[n S22 . ll llu vp f ] +"14 C:\Program Files\Microchip\xc8\v2.40\pic\include\c99\stdarg.h +[v ___va_arg `(*v ~T0 @X0 0 ev`*v ] +[p i ___va_arg ] +"99 C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 99: static int prec, width; +[v _prec `i ~T0 @X0 1 s ] +[v _width `i ~T0 @X0 1 s ] +"100 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 100: static char flags; +[v _flags `uc ~T0 @X0 1 s ] +"125 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 125: static char dbuf[32]; +[v _dbuf `uc ~T0 @X0 -> 32 `i s ] +"133 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 133: static void pad(FILE *fp, char *buf, int p) +[v _pad `(v ~T0 @X0 1 sf3`*S1`*uc`i ] +"134 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 134: { +{ +[e :U _pad ] +"133 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 133: static void pad(FILE *fp, char *buf, int p) +[v _fp `*S1 ~T0 @X0 1 r1 ] +[v _buf `*uc ~T0 @X0 1 r2 ] +[v _p `i ~T0 @X0 1 r3 ] +"134 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 134: { +[f ] +"135 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 135: int i, w; +[v _i `i ~T0 @X0 1 a ] +[v _w `i ~T0 @X0 1 a ] +"145 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 145: w = (p < 0) ? 0 : p; +[e = _w ? < _p -> 0 `i : -> 0 `i _p ] +"146 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 146: i = 0; +[e = _i -> 0 `i ] +"147 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 147: while (i < w) { +[e $U 11 ] +[e :U 12 ] +{ +"148 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 148: fputc(' ', fp); +[e ( _fputc (2 , -> -> 32 `ui `i _fp ] +"149 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 149: ++i; +[e =+ _i -> 1 `i ] +"150 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 150: } +} +[e :U 11 ] +"147 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 147: while (i < w) { +[e $ < _i _w 12 ] +[e :U 13 ] +"156 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 156: fputs((const char *)buf, fp); +[e ( _fputs (2 , -> _buf `*Cuc _fp ] +"164 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 164: } +[e :UE 10 ] +} +"443 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 443: static void dtoa(FILE *fp, long long d) +[v _dtoa `(v ~T0 @X0 1 sf2`*S1`o ] +"444 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 444: { +{ +[e :U _dtoa ] +"443 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 443: static void dtoa(FILE *fp, long long d) +[v _fp `*S1 ~T0 @X0 1 r1 ] +[v _d `o ~T0 @X0 1 r2 ] +"444 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 444: { +[f ] +"445 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 445: char s; +[v _s `uc ~T0 @X0 1 a ] +"446 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 446: int i, p, w; +[v _i `i ~T0 @X0 1 a ] +[v _p `i ~T0 @X0 1 a ] +[v _w `i ~T0 @X0 1 a ] +"447 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 447: long long n; +[v _n `o ~T0 @X0 1 a ] +"450 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 450: n = d; +[e = _n _d ] +"451 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 451: s = n < 0 ? 1 : 0; +[e = _s -> ? < _n -> -> 0 `i `o : -> 1 `i -> 0 `i `uc ] +"452 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 452: if (s) { +[e $ ! != -> _s `i -> 0 `i 15 ] +{ +"453 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 453: n = -n; +[e = _n -U _n ] +"454 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 454: } +} +[e :U 15 ] +"462 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 462: p = (0 < prec) ? prec : 1; +[e = _p ? < -> 0 `i _prec : _prec -> 1 `i ] +"463 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 463: w = width; +[e = _w _width ] +"464 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 464: if (s +[e $ ! != -> _s `i -> 0 `i 16 ] +"468 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 468: ) { +{ +"469 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 469: --w; +[e =- _w -> 1 `i ] +"470 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 470: s = s ? '-' : '+'; +[e = _s -> ? != -> _s `i -> 0 `i : -> 45 `ui -> 43 `ui `uc ] +"471 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 471: } +} +[e :U 16 ] +"480 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 480: i = sizeof(dbuf) - 1; +[e = _i -> - -> # _dbuf `ui -> -> 1 `i `ui `i ] +"481 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 481: dbuf[i] = '\0'; +[e = *U + &U _dbuf * -> -> _i `ui `ux -> -> # *U &U _dbuf `ui `ux -> -> 0 `ui `uc ] +"482 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 482: while (!(i < 1) && (n || (0 < p) +[e $U 17 ] +[e :U 18 ] +"486 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 486: )) { +{ +"487 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 487: --i; +[e =- _i -> 1 `i ] +"488 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 488: dbuf[i] = (char)((int)'0' + abs(n % 10)); +[e = *U + &U _dbuf * -> -> _i `ui `ux -> -> # *U &U _dbuf `ui `ux -> + -> -> 48 `ui `i ( _abs (1 -> % _n -> -> 10 `i `o `i `uc ] +"489 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 489: --p; +[e =- _p -> 1 `i ] +"490 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 490: --w; +[e =- _w -> 1 `i ] +"491 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 491: n = n / 10; +[e = _n / _n -> -> 10 `i `o ] +"492 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 492: } +} +[e :U 17 ] +"482 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 482: while (!(i < 1) && (n || (0 < p) +[e $ && ! < _i -> 1 `i || != _n -> -> 0 `i `o < -> 0 `i _p 18 ] +[e :U 19 ] +"495 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 495: if (s != 0) { +[e $ ! != -> _s `i -> 0 `i 20 ] +{ +"496 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 496: --i; +[e =- _i -> 1 `i ] +"497 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 497: dbuf[i] = s; +[e = *U + &U _dbuf * -> -> _i `ui `ux -> -> # *U &U _dbuf `ui `ux _s ] +"498 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 498: } +} +[e :U 20 ] +"501 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 501: return (void) pad(fp, &dbuf[i], w); +[e ) -> ( _pad (3 , , _fp &U *U + &U _dbuf * -> -> _i `ui `ux -> -> # *U &U _dbuf `ui `ux _w `v ] +[e $UE 14 ] +"502 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 502: } +[e :UE 14 ] +} +"1007 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1007: vfpfcnvrt(FILE *fp, char *fmt[], va_list ap) +[v _vfpfcnvrt `(v ~T0 @X0 1 sf3`*S1`**uc`**v ] +"1008 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1008: { +{ +[e :U _vfpfcnvrt ] +"1007 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1007: vfpfcnvrt(FILE *fp, char *fmt[], va_list ap) +[v _fp `*S1 ~T0 @X0 1 r1 ] +[v _fmt `**uc ~T0 @X0 1 r2 ] +[v _ap `**v ~T0 @X0 1 r3 ] +"1008 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1008: { +[f ] +"1009 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1009: char c, *cp; +[v _c `uc ~T0 @X0 1 a ] +[v _cp `*uc ~T0 @X0 1 a ] +"1010 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1010: int done, i; +[v _done `i ~T0 @X0 1 a ] +[v _i `i ~T0 @X0 1 a ] +"1016 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1016: } convarg; +[v _convarg `S22 ~T0 @X0 1 a ] +"1019 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1019: if ((*fmt)[0] == '%') { +[e $ ! == -> *U + *U _fmt * -> -> 0 `i `x -> -> # *U *U _fmt `i `x `ui -> 37 `ui 23 ] +{ +"1020 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1020: ++*fmt; +[e =+ *U _fmt * -> -> 1 `i `x -> -> # *U *U _fmt `i `x ] +"1022 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1022: flags = width = 0; +[e = _flags -> = _width -> 0 `i `uc ] +"1023 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1023: prec = -1; +[e = _prec -U -> 1 `i ] +"1117 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1117: cp = *fmt; +[e = _cp *U _fmt ] +"1187 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1187: if (*cp == 'd' || *cp == 'i') { +[e $ ! || == -> *U _cp `ui -> 100 `ui == -> *U _cp `ui -> 105 `ui 24 ] +{ +"1230 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1230: convarg.ll = (long long)(int)(*(int *)__va_arg(*(int **)ap, (int)0)); +[e = . _convarg 0 -> *U -> ( ___va_arg , (. -> *U -> _ap `**i `*v -> 0 `i `*i `o ] +"1232 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1232: *fmt = cp+1; +[e = *U _fmt + _cp * -> -> 1 `i `x -> -> # *U _cp `i `x ] +"1233 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1233: return (void) dtoa(fp, convarg.ll); +[e ) -> ( _dtoa (2 , _fp . _convarg 0 `v ] +[e $UE 21 ] +"1234 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1234: } +} +[e :U 24 ] +"1509 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1509: ++*fmt; +[e =+ *U _fmt * -> -> 1 `i `x -> -> # *U *U _fmt `i `x ] +"1510 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1510: return (void) 0; +[e ) -> -> 0 `i `v ] +[e $UE 21 ] +"1511 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1511: } +} +[e :U 23 ] +"1514 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1514: fputc((int)(*fmt)[0], fp); +[e ( _fputc (2 , -> *U + *U _fmt * -> -> 0 `i `x -> -> # *U *U _fmt `i `x `i _fp ] +"1515 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1515: ++*fmt; +[e =+ *U _fmt * -> -> 1 `i `x -> -> # *U *U _fmt `i `x ] +"1516 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1516: return (void) 1; +[e ) -> -> 1 `i `v ] +[e $UE 21 ] +"1517 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1517: } +[e :UE 21 ] +} +"1520 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1520: int vfprintf(FILE *fp, const char *fmt, va_list ap) +[v _vfprintf `(i ~T0 @X0 1 ef3`*S1`*Cuc`**v ] +"1521 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1521: { +{ +[e :U _vfprintf ] +"1520 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1520: int vfprintf(FILE *fp, const char *fmt, va_list ap) +[v _fp `*S1 ~T0 @X0 1 r1 ] +[v _fmt `*Cuc ~T0 @X0 1 r2 ] +[v _ap `**v ~T0 @X0 1 r3 ] +"1521 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1521: { +[f ] +"1523 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1523: char *cfmt; +[v _cfmt `*uc ~T0 @X0 1 a ] +"1525 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1525: cfmt = (char *)fmt; +[e = _cfmt -> _fmt `*uc ] +"1529 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1529: while (*cfmt) { +[e $U 26 ] +[e :U 27 ] +{ +"1533 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1533: vfpfcnvrt(fp, &cfmt, ap); +[e ( _vfpfcnvrt (3 , , _fp &U _cfmt _ap ] +"1534 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1534: } +} +[e :U 26 ] +"1529 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1529: while (*cfmt) { +[e $ != -> *U _cfmt `i -> 0 `i 27 ] +[e :U 28 ] +"1538 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1538: return 0; +[e ) -> 0 `i ] +[e $UE 25 ] +"1543 +[; ;C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\doprnt.c: 1543: } +[e :UE 25 ] +} diff --git a/solar_panel.X/dist/default/debug/memoryfile.xml b/solar_panel.X/dist/default/debug/memoryfile.xml new file mode 100644 index 0000000..9fd66bb --- /dev/null +++ b/solar_panel.X/dist/default/debug/memoryfile.xml @@ -0,0 +1,17 @@ + + + + + bytes + 131064 + 2902 + 128162 + + + bytes + 3808 + 151 + 3657 + + + diff --git a/solar_panel.X/dist/default/debug/solar_panel.X.debug.cmf b/solar_panel.X/dist/default/debug/solar_panel.X.debug.cmf new file mode 100644 index 0000000..45a2ff4 --- /dev/null +++ b/solar_panel.X/dist/default/debug/solar_panel.X.debug.cmf @@ -0,0 +1,773 @@ +%CMF +# %PSECTS Section +# For each object file, details of its psects are enumerated here. +# The begining of the section is indicated by %PSECTS. The first +# line indicates the name of the first object file, e.g. +# $foo.obj +# Each line that follows describes a psect in that object file, until +# the next object file. The lines that describe a psect have the +# format: +# +# All addresses and the length are given in unqualified hexadecimal +# in delta units. Any other numeric values are decimal. +%PSECTS +$C:\Users\remi\AppData\Local\Temp\xcAsjns.o +init CODE 0 2 2 4 1 2 +reset_vec CODE 0 0 0 2 1 2 +config CONFIG 4 1FFF8 1FFF8 6 1 1 +$dist/default/debug\solar_panel.X.debug.o +cinit CODE 0 1B22 1B22 14 1 2 +text0 CODE 0 190A 190A 4A 1 2 +text1 CODE 0 19DC 19DC 40 1 2 +text2 CODE 0 186A 186A 52 1 2 +text3 CODE 0 156E 156E 15E 1 2 +text4 CODE 0 1006 1006 27C 1 2 +text5 CODE 0 1796 1796 7A 1 2 +text6 CODE 0 1954 1954 44 1 2 +text7 CODE 0 16CC 16CC CA 1 2 +text8 CODE 0 1B4E 1B4E 2 1 2 +text9 CODE 0 1A1C 1A1C 40 1 2 +text10 CODE 0 140A 140A 164 1 2 +text11 CODE 0 1282 1282 188 1 2 +text12 CODE 0 1B36 1B36 E 1 2 +text13 CODE 0 1A5C 1A5C 3E 1 2 +text14 CODE 0 1B44 1B44 A 1 2 +text15 CODE 0 1B0C 1B0C 16 1 2 +text16 CODE 0 1998 1998 44 1 2 +text17 CODE 0 1AD4 1AD4 38 1 2 +text18 CODE 0 18BC 18BC 4E 1 2 +text19 CODE 0 1810 1810 5A 1 2 +text20 CODE 0 1A9A 1A9A 3A 1 2 +cstackCOMRAM COMRAM 1 1 1 5E 1 1 +cstackBANK0 BANK0 1 87 87 11 1 1 +bssBANK0 BANK0 1 60 60 27 1 1 +smallconst SMALLCONST 0 1000 1000 6 1 2 +bssCOMRAM COMRAM 1 5F 5F 1 1 1 +config CONFIG 4 1FFF8 1FFF8 6 1 1 +# %UNUSED Section +# This section enumerates the unused ranges of each CLASS. Each entry +# is described on a single line as follows: +# +# Addresses given in the range are in hexadecimal and units of delta. +%UNUSED +RAM 98-E7F 1 +RAM F00-F5F 1 +SFR E80-EFF 1 +SFR F60-FFC 1 +BANK0 98-FF 1 +BANK1 100-1FF 1 +BANK2 200-2FF 1 +BANK3 300-3FF 1 +BANK4 400-4FF 1 +BANK5 500-5FF 1 +BANK6 600-6FF 1 +BANK7 700-7FF 1 +BANK8 800-8FF 1 +BANK9 900-9FF 1 +CONST 6-FFF 1 +CONST 1B50-1FFF7 1 +SMALLCONST 1B50-1FFF7 1 +CODE 6-FFF 1 +CODE 1B50-1FFF7 1 +BANK10 A00-AFF 1 +BANK11 B00-BFF 1 +BANK12 C00-CFF 1 +BANK13 D00-DFF 1 +BANK14 E00-E7F 1 +BANK15 F00-F5F 1 +BIGRAM 98-E7F 1 +BIGRAM F00-F5F 1 +BIGSFR E80-EFF 1 +BIGSFR F60-FFC 1 +MEDIUMCONST 1B50-FFFF 1 +MEDIUMCONST 11000-1FFF7 1 +# %LINETAB Section +# This section enumerates the file/line to address mappings. +# The beginning of the section is indicated by %LINETAB. +# The first line indicates the name of the first object file, e.g. +# $foo.obj +# Each line that follows describes a single mapping until the next +# object file. Mappings have the following format: +#
>: +# The address is absolute and given given in unqualified hex +# in delta units of the psect. All mappings within an object file +# are in ascending order of addresses. +# All other numeric values are in decimal. +%LINETAB +$dist/default/debug\solar_panel.X.debug.o +1A9A text20 CODE >109:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1A9C text20 CODE >112:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1AAE text20 CODE >115:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1AB0 text20 CODE >118:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1AB2 text20 CODE >121:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1AB2 text20 CODE >123:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1AC0 text20 CODE >126:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1AD2 text20 CODE >127:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\mcc_generated_files/adc.c +1810 text19 CODE >43:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1812 text19 CODE >45:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1814 text19 CODE >46:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1824 text19 CODE >47:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1826 text19 CODE >48:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +182E text19 CODE >49:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1830 text19 CODE >50:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1836 text19 CODE >51:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +183C text19 CODE >52:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +184C text19 CODE >53:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +184E text19 CODE >54:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1856 text19 CODE >55:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1858 text19 CODE >56:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1868 text19 CODE >57:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18BC text18 CODE >58:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18BE text18 CODE >60:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18C0 text18 CODE >61:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18D0 text18 CODE >62:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18D2 text18 CODE >63:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18D8 text18 CODE >64:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18DA text18 CODE >65:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18E0 text18 CODE >66:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18E6 text18 CODE >67:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18F6 text18 CODE >68:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18F8 text18 CODE >69:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +18FE text18 CODE >70:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1900 text18 CODE >71:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1908 text18 CODE >72:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1AD4 text17 CODE >74:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1AD4 text17 CODE >76:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1AE0 text17 CODE >79:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1AEE text17 CODE >80:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1AF2 text17 CODE >81:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\lcd/lcd.c +1B0A text17 CODE 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>16:C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\nf_sprintf.c +19EE text1 CODE >17:C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\nf_sprintf.c +19F6 text1 CODE >18:C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\nf_sprintf.c +19FE text1 CODE >19:C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\nf_sprintf.c +1A1A text1 CODE >23:C:\Program Files\Microchip\xc8\v2.40\pic\sources\c99\common\nf_sprintf.c +190A text0 CODE >50:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\main.c +190A text0 CODE >53:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\main.c +190E text0 CODE >55:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\main.c +1912 text0 CODE >77:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\main.c +1920 text0 CODE >79:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\main.c +193C text0 CODE >81:C:\Users\remi\Downloads\MCU\solar_panel\solar_panel.X\main.c +1B22 cinit CODE >3131:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B22 cinit CODE >3133:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B22 cinit CODE >3136:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B22 cinit CODE >3159:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B26 cinit CODE >3160:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B28 cinit CODE >3161:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B28 cinit CODE >3162:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B2A cinit CODE >3163:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B2C cinit CODE >3164:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B2E cinit CODE >3167:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B30 cinit CODE >3173:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B30 cinit CODE >3175:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +1B32 cinit CODE >3176:C:\Users\remi\AppData\Local\Temp\xcAsjns.s +# %SYMTAB Section +# An enumeration of all symbols in the program. +# The beginning of the section is indicated by %SYMTAB. +# Each line describes a single symbol as follows: +#