// Demonstrates the wire.breakout element used to split off slices of a // bus that connects blocks. The main bus wires are always laid out // orthogonally; breakouts diagonally tap intermediate points on those // wires and route the sub-bus to another block via an L-shaped zigzag. #import "/src/lib.typ": circuit, element, util, wire #set page(width: auto, height: auto, margin: .5cm) #circuit({ // ---- Source block on the left, main sink on the right ---- element.block(x: 0, y: 0, w: 2, h: 2, id: "src", fill: util.colors.blue, ports: ( east: ((id: "out"),), )) element.block(x: 15, y: 0, w: 2, h: 2, id: "dstMain", fill: util.colors.green, ports: ( west: ((id: "in"),), )) // Full bus from src to dstMain, labelled [15:0] at the start. wire.wire("wbus", ("src-port-out", "dstMain-port-in"), name: "[15:0]", name-pos: "start") // ---- Upper-left sink: taps bits [11:8] via NW breakout ---- element.block(x: 0, y: 4, w: 2, h: 2, id: "dstNW", fill: util.colors.yellow, ports: ( east: ((id: "in"),), )) wire.breakout( "tapNE", x: (rel: 3, to: "src-port-out"), y: (from: "src-port-out"), direction: "north-east", port-side: "west", name: "[15:12]", name-pos: "north-east", ) // L-shape: up first, then left into dstNW. wire.wire( "wNW", ("tapNE-port-tapNE", "dstNW-port-in"), style: "zigzag", zigzag-dir: "horizontal", zigzag-ratio: 100%, ) // ---- Upper-right sink: taps bits [15:12] via NE breakout ---- element.block(x: 15, y: 4, w: 2, h: 2, id: "dstNE", fill: util.colors.orange, ports: ( west: ((id: "in"),), )) wire.breakout( "tapNW", x: (rel: 7, to: "src-port-out"), y: (from: "src-port-out"), direction: "north-west", port-side: "east", name: "[11:8]", name-pos: "north-east", ) // L-shape: up first, then right into dstNE. wire.wire( "wNE", ("tapNW-port-tapNW", "dstNE-port-in"), style: "zigzag", zigzag-dir: "horizontal", zigzag-ratio: 100%, ) // ---- Lower-left sink: taps bits [3:0] via SW breakout ---- element.block(x: 0, y: -4, w: 2, h: 2, id: "dstSW", fill: util.colors.purple, ports: ( east: ((id: "in"),), )) wire.breakout( "tapSE", x: (rel: 5, to: "src-port-out"), y: (from: "src-port-out"), direction: "south-east", port-side: "west", name: "[7:4]", name-pos: "south-east", ) // L-shape: down first, then left into dstSW. wire.wire( "wSW", ("tapSE-port-tapSE", "dstSW-port-in"), style: "zigzag", zigzag-dir: "horizontal", zigzag-ratio: 100%, ) // ---- Lower-right sink: taps bits [7:4] via SE breakout ---- element.block(x: 15, y: -4, w: 2, h: 2, id: "dstSE", fill: util.colors.pink, ports: ( west: ((id: "in"),), )) wire.breakout( "tapSW", x: (rel: 11, to: "src-port-out"), y: (from: "src-port-out"), direction: "south-west", port-side: "east", name: "[3:0]", name-pos: "south-west", ) // L-shape: down first, then right into dstSE. wire.wire( "wSE", ("tapSW-port-tapSW", "dstSE-port-in"), style: "zigzag", zigzag-dir: "horizontal", zigzag-ratio: 100%, ) })