Cursor/Cursor_test/hds/divider_tester/interface

DocumentHdrVersion "1.1"
Header (DocumentHdr
version 2
dmPackageRefs [
(DmPackageRef
library "ieee"
unitName "std_logic_1164"
)
(DmPackageRef
library "ieee"
unitName "numeric_std"
)
]
libraryRefs [
"ieee"
]
)
version "27.1"
appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 2037,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
uid 171,0
optionalChildren [
*2 (RefLabelRowHdr
)
*3 (TitleRowHdr
)
*4 (FilterRowHdr
)
*5 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*6 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*7 (GroupColHdr
tm "GroupColHdrMgr"
)
*8 (NameColHdr
tm "NameColHdrMgr"
)
*9 (ModeColHdr
tm "ModeColHdrMgr"
)
*10 (TypeColHdr
tm "TypeColHdrMgr"
)
*11 (BoundsColHdr
tm "BoundsColHdrMgr"
)
*12 (InitColHdr
tm "InitColHdrMgr"
)
*13 (EolColHdr
tm "EolColHdrMgr"
)
*14 (LogPort
port (LogicalPort
m 1
decl (Decl
n "clock"
t "std_ulogic"
o 1
suid 2033,0
)
)
uid 504,0
)
*15 (LogPort
port (LogicalPort
decl (Decl
n "enPWM"
t "std_uLogic"
o 2
suid 2034,0
)
)
uid 506,0
)
*16 (LogPort
port (LogicalPort
decl (Decl
n "enRamp"
t "std_uLogic"
o 3
suid 2035,0
)
)
uid 508,0
)
*17 (LogPort
port (LogicalPort
m 1
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 2036,0
)
)
uid 510,0
)
*18 (LogPort
port (LogicalPort
m 1
decl (Decl
n "testMode"
t "std_uLogic"
o 5
suid 2037,0
)
)
uid 512,0
)
]
)
pdm (PhysicalDM
uid 178,0
optionalChildren [
*19 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *20 (MRCItem
litem &1
pos 3
dimension 20
)
uid 113,0
optionalChildren [
*21 (MRCItem
litem &2
pos 0
dimension 20
uid 116,0
)
*22 (MRCItem
litem &3
pos 1
dimension 23
uid 118,0
)
*23 (MRCItem
litem &4
pos 2
hidden 1
dimension 20
uid 120,0
)
*24 (MRCItem
litem &14
pos 0
dimension 20
uid 505,0
)
*25 (MRCItem
litem &15
pos 1
dimension 20
uid 507,0
)
*26 (MRCItem
litem &16
pos 2
dimension 20
uid 509,0
)
*27 (MRCItem
litem &17
pos 3
dimension 20
uid 511,0
)
*28 (MRCItem
litem &18
pos 4
dimension 20
uid 513,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 114,0
optionalChildren [
*29 (MRCItem
litem &5
pos 0
dimension 20
uid 122,0
)
*30 (MRCItem
litem &7
pos 1
dimension 50
uid 126,0
)
*31 (MRCItem
litem &8
pos 2
dimension 100
uid 128,0
)
*32 (MRCItem
litem &9
pos 3
dimension 50
uid 130,0
)
*33 (MRCItem
litem &10
pos 4
dimension 100
uid 132,0
)
*34 (MRCItem
litem &11
pos 5
dimension 100
uid 134,0
)
*35 (MRCItem
litem &12
pos 6
dimension 50
uid 136,0
)
*36 (MRCItem
litem &13
pos 7
dimension 80
uid 138,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 112,0
vaOverrides [
]
)
]
)
uid 170,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *37 (LEmptyRow
)
uid 180,0
optionalChildren [
*38 (RefLabelRowHdr
)
*39 (TitleRowHdr
)
*40 (FilterRowHdr
)
*41 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*42 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*43 (GroupColHdr
tm "GroupColHdrMgr"
)
*44 (NameColHdr
tm "GenericNameColHdrMgr"
)
*45 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*46 (InitColHdr
tm "GenericValueColHdrMgr"
)
*47 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*48 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
)
pdm (PhysicalDM
uid 181,0
optionalChildren [
*49 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *50 (MRCItem
litem &37
pos 3
dimension 20
)
uid 146,0
optionalChildren [
*51 (MRCItem
litem &38
pos 0
dimension 20
uid 149,0
)
*52 (MRCItem
litem &39
pos 1
dimension 23
uid 151,0
)
*53 (MRCItem
litem &40
pos 2
hidden 1
dimension 20
uid 153,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 147,0
optionalChildren [
*54 (MRCItem
litem &41
pos 0
dimension 20
uid 155,0
)
*55 (MRCItem
litem &43
pos 1
dimension 50
uid 159,0
)
*56 (MRCItem
litem &44
pos 2
dimension 100
uid 161,0
)
*57 (MRCItem
litem &45
pos 3
dimension 100
uid 163,0
)
*58 (MRCItem
litem &46
pos 4
dimension 50
uid 165,0
)
*59 (MRCItem
litem &47
pos 5
dimension 50
uid 167,0
)
*60 (MRCItem
litem &48
pos 6
dimension 80
uid 169,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 145,0
vaOverrides [
]
)
]
)
uid 179,0
type 1
)
VExpander (VariableExpander
vvMap [
(vvPair
variable " "
value " "
)
(vvPair
variable "HDLDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hdl"
)
(vvPair
variable "HDSDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "SideDataDesignDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\divider_tester\\interface.info"
)
(vvPair
variable "SideDataUserDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\divider_tester\\interface.user"
)
(vvPair
variable "SourceDir"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
)
(vvPair
variable "appl"
value "HDL Designer"
)
(vvPair
variable "arch_name"
value "interface"
)
(vvPair
variable "concat_file"
value "concatenated"
)
(vvPair
variable "config"
value "%(unit)_%(view)_config"
)
(vvPair
variable "d"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\divider_tester"
)
(vvPair
variable "d_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\divider_tester"
)
(vvPair
variable "date"
value "11.11.2019"
)
(vvPair
variable "day"
value "Mon"
)
(vvPair
variable "day_long"
value "Monday"
)
(vvPair
variable "dd"
value "11"
)
(vvPair
variable "entity_name"
value "divider_tester"
)
(vvPair
variable "ext"
value "<TBD>"
)
(vvPair
variable "f"
value "interface"
)
(vvPair
variable "f_logical"
value "interface"
)
(vvPair
variable "f_noext"
value "interface"
)
(vvPair
variable "graphical_source_author"
value "silvan.zahno"
)
(vvPair
variable "graphical_source_date"
value "11.11.2019"
)
(vvPair
variable "graphical_source_group"
value "UNKNOWN"
)
(vvPair
variable "graphical_source_host"
value "WE6996"
)
(vvPair
variable "graphical_source_time"
value "08:13:22"
)
(vvPair
variable "group"
value "UNKNOWN"
)
(vvPair
variable "host"
value "WE6996"
)
(vvPair
variable "language"
value "VHDL"
)
(vvPair
variable "library"
value "Cursor_test"
)
(vvPair
variable "library_downstream_ModelSim"
value "D:\\Users\\ELN_labs\\VHDL_comp"
)
(vvPair
variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/Cursor_test/work"
)
(vvPair
variable "mm"
value "11"
)
(vvPair
variable "module_name"
value "divider_tester"
)
(vvPair
variable "month"
value "Nov"
)
(vvPair
variable "month_long"
value "November"
)
(vvPair
variable "p"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\divider_tester\\interface"
)
(vvPair
variable "p_logical"
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\divider_tester\\interface"
)
(vvPair
variable "package_name"
value "<Undefined Variable>"
)
(vvPair
variable "project_name"
value "hds"
)
(vvPair
variable "series"
value "HDL Designer Series"
)
(vvPair
variable "task_ADMS"
value "<TBD>"
)
(vvPair
variable "task_DesignCompilerPath"
value "<TBD>"
)
(vvPair
variable "task_LeonardoPath"
value "<TBD>"
)
(vvPair
variable "task_ModelSimPath"
value "C:\\EDA\\Modelsim\\win32"
)
(vvPair
variable "task_NC"
value "<TBD>"
)
(vvPair
variable "task_PrecisionRTLPath"
value "<TBD>"
)
(vvPair
variable "task_QuestaSimPath"
value "<TBD>"
)
(vvPair
variable "task_VCSPath"
value "<TBD>"
)
(vvPair
variable "this_ext"
value "<TBD>"
)
(vvPair
variable "this_file"
value "interface"
)
(vvPair
variable "this_file_logical"
value "interface"
)
(vvPair
variable "time"
value "08:13:22"
)
(vvPair
variable "unit"
value "divider_tester"
)
(vvPair
variable "user"
value "silvan.zahno"
)
(vvPair
variable "version"
value "2019.2 (Build 5)"
)
(vvPair
variable "view"
value "interface"
)
(vvPair
variable "year"
value "2019"
)
(vvPair
variable "yy"
value "19"
)
]
)
LanguageMgr "VhdlLangMgr"
uid 81,0
optionalChildren [
*61 (SymbolBody
uid 8,0
optionalChildren [
*62 (CptPort
uid 479,0
ps "OnEdgeStrategy"
shape (Triangle
uid 480,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "28625,5250,29375,6000"
)
tg (CPTG
uid 481,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 482,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "28300,7000,29700,10800"
st "clock"
ju 2
blo "29500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 483,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3600,61000,4400"
st "clock    : OUT    std_ulogic  ;
"
)
thePort (LogicalPort
m 1
decl (Decl
n "clock"
t "std_ulogic"
o 1
suid 2033,0
)
)
)
*63 (CptPort
uid 484,0
ps "OnEdgeStrategy"
shape (Triangle
uid 485,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "54625,5250,55375,6000"
)
tg (CPTG
uid 486,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 487,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "54300,7000,55700,12500"
st "enPWM"
ju 2
blo "55500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 488,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2000,61000,2800"
st "enPWM    : IN     std_uLogic  ;
"
)
thePort (LogicalPort
decl (Decl
n "enPWM"
t "std_uLogic"
o 2
suid 2034,0
)
)
)
*64 (CptPort
uid 489,0
ps "OnEdgeStrategy"
shape (Triangle
uid 490,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "56625,5250,57375,6000"
)
tg (CPTG
uid 491,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 492,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "56300,7000,57700,12900"
st "enRamp"
ju 2
blo "57500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 493,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2800,61000,3600"
st "enRamp   : IN     std_uLogic  ;
"
)
thePort (LogicalPort
decl (Decl
n "enRamp"
t "std_uLogic"
o 3
suid 2035,0
)
)
)
*65 (CptPort
uid 494,0
ps "OnEdgeStrategy"
shape (Triangle
uid 495,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "30625,5250,31375,6000"
)
tg (CPTG
uid 496,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 497,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "30300,7000,31700,11100"
st "reset"
ju 2
blo "31500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 498,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4400,61000,5200"
st "reset    : OUT    std_ulogic  ;
"
)
thePort (LogicalPort
m 1
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 2036,0
)
)
)
*66 (CptPort
uid 499,0
ps "OnEdgeStrategy"
shape (Triangle
uid 500,0
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "26625,5250,27375,6000"
)
tg (CPTG
uid 501,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 502,0
ro 270
va (VaSet
font "Verdana,12,0"
)
xt "26300,7000,27700,13700"
st "testMode"
ju 2
blo "27500,7000"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 503,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5200,60000,6000"
st "testMode : OUT    std_uLogic 
"
)
thePort (LogicalPort
m 1
decl (Decl
n "testMode"
t "std_uLogic"
o 5
suid 2037,0
)
)
)
]
shape (Rectangle
uid 9,0
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,69000,14000"
)
biTextGroup (BiTextGroup
uid 10,0
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
uid 11,0
va (VaSet
font "Verdana,9,1"
)
xt "37850,8800,44850,10000"
st "Cursor_test"
blo "37850,9800"
)
second (Text
uid 12,0
va (VaSet
font "Verdana,9,1"
)
xt "37850,10000,46150,11200"
st "divider_tester"
blo "37850,11000"
)
)
gi *67 (GenericInterface
uid 13,0
ps "CenterOffsetStrategy"
matrix (Matrix
uid 14,0
text (MLText
uid 15,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "17000,6000,28500,6800"
st "Generic Declarations"
)
header "Generic Declarations"
showHdrWhenContentsEmpty 1
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
sTC 0
sF 0
)
portVis (PortSigDisplay
sTC 0
sF 0
)
)
*68 (Grouping
uid 16,0
optionalChildren [
*69 (CommentText
uid 18,0
shape (Rectangle
uid 19,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "36000,48000,53000,49000"
)
oxt "18000,70000,35000,71000"
text (MLText
uid 20,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,48500,36200,48500"
st "
by %user on %dd %month %year
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
)
*70 (CommentText
uid 21,0
shape (Rectangle
uid 22,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "53000,44000,57000,45000"
)
oxt "35000,66000,39000,67000"
text (MLText
uid 23,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "53200,44500,53200,44500"
st "
Project:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*71 (CommentText
uid 24,0
shape (Rectangle
uid 25,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "36000,46000,53000,47000"
)
oxt "18000,68000,35000,69000"
text (MLText
uid 26,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,46500,36200,46500"
st "
<enter diagram title here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
)
*72 (CommentText
uid 27,0
shape (Rectangle
uid 28,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,46000,36000,47000"
)
oxt "14000,68000,18000,69000"
text (MLText
uid 29,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "32200,46500,32200,46500"
st "
Title:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*73 (CommentText
uid 30,0
shape (Rectangle
uid 31,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "53000,45000,73000,49000"
)
oxt "35000,67000,55000,71000"
text (MLText
uid 32,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "53200,45200,67300,46400"
st "
<enter comments here>
"
tm "CommentText"
wrapOption 3
visibleHeight 4000
visibleWidth 20000
)
ignorePrefs 1
)
*74 (CommentText
uid 33,0
shape (Rectangle
uid 34,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "57000,44000,73000,45000"
)
oxt "39000,66000,55000,67000"
text (MLText
uid 35,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "57200,44500,57200,44500"
st "
<enter project name here>
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 16000
)
position 1
ignorePrefs 1
)
*75 (CommentText
uid 36,0
shape (Rectangle
uid 37,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,44000,53000,46000"
)
oxt "14000,66000,35000,68000"
text (MLText
uid 38,0
va (VaSet
fg "32768,0,0"
)
xt "37350,44400,47650,45600"
st "
<company name>
"
ju 0
tm "CommentText"
wrapOption 3
visibleHeight 2000
visibleWidth 21000
)
position 1
ignorePrefs 1
)
*76 (CommentText
uid 39,0
shape (Rectangle
uid 40,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,47000,36000,48000"
)
oxt "14000,69000,18000,70000"
text (MLText
uid 41,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "32200,47500,32200,47500"
st "
Path:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*77 (CommentText
uid 42,0
shape (Rectangle
uid 43,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "32000,48000,36000,49000"
)
oxt "14000,70000,18000,71000"
text (MLText
uid 44,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "32200,48500,32200,48500"
st "
Edited:
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 4000
)
position 1
ignorePrefs 1
)
*78 (CommentText
uid 45,0
shape (Rectangle
uid 46,0
sl 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
)
xt "36000,47000,53000,48000"
)
oxt "18000,69000,35000,70000"
text (MLText
uid 47,0
va (VaSet
fg "0,0,32768"
bg "0,0,32768"
)
xt "36200,47500,36200,47500"
st "
%library/%unit/%view
"
tm "CommentText"
wrapOption 3
visibleHeight 1000
visibleWidth 17000
)
position 1
ignorePrefs 1
)
]
shape (GroupingShape
uid 17,0
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineStyle 2
lineWidth 2
)
xt "32000,44000,73000,49000"
)
oxt "14000,66000,55000,71000"
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *79 (PackageList
uid 48,0
stg "VerticalLayoutStrategy"
textVec [
*80 (Text
uid 49,0
va (VaSet
font "arial,8,1"
)
xt "0,0,5400,1000"
st "Package List"
blo "0,800"
)
*81 (MLText
uid 50,0
va (VaSet
)
xt "0,1000,17500,4600"
st "LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;"
tm "PackageList"
)
]
)
windowSize "0,0,895,750"
viewArea "0,0,0,0"
cachedDiagramExtent "0,0,0,0"
pageBreakOrigin "0,0"
defaultCommentText (CommentText
shape (Rectangle
layer 0
va (VaSet
vasetType 1
fg "65280,65280,46080"
lineColor "0,0,32768"
)
xt "0,0,15000,5000"
)
text (MLText
va (VaSet
fg "0,0,32768"
font "Courier New,9,0"
)
xt "200,200,2700,1400"
st "
Text
"
tm "CommentText"
wrapOption 3
visibleHeight 4600
visibleWidth 14600
)
)
defaultRequirementText (RequirementText
shape (ZoomableIcon
layer 0
va (VaSet
vasetType 1
fg "59904,39936,65280"
lineColor "0,0,32768"
)
xt "0,0,1500,1750"
iconName "reqTracerRequirement.bmp"
iconMaskName "reqTracerRequirement.msk"
)
autoResize 1
text (MLText
va (VaSet
fg "0,0,32768"
font "arial,8,0"
)
xt "500,2150,1400,3150"
st "
Text
"
tm "RequirementText"
wrapOption 3
visibleHeight 1350
visibleWidth 1100
)
)
defaultPanel (Panel
shape (RectFrame
va (VaSet
vasetType 1
fg "65535,65535,65535"
lineColor "32768,0,0"
lineWidth 2
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (Text
va (VaSet
font "Verdana,9,1"
)
xt "1000,1000,4400,2200"
st "Panel0"
blo "1000,2000"
tm "PanelText"
)
)
)
parentGraphicsRef (HdmGraphicsRef
libraryName "Cursor_test"
entityName "divider_tb"
viewName "struct.bd"
)
defaultSymbolBody (SymbolBody
shape (Rectangle
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "15000,6000,35000,26000"
)
biTextGroup (BiTextGroup
ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
first (Text
va (VaSet
font "Verdana,9,1"
)
xt "22600,14800,27400,16000"
st "<library>"
blo "22600,15800"
)
second (Text
va (VaSet
font "Verdana,9,1"
)
xt "22600,16000,25900,17200"
st "<cell>"
blo "22600,17000"
)
)
gi *82 (GenericInterface
ps "CenterOffsetStrategy"
matrix (Matrix
text (MLText
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "0,12000,0,12000"
)
header "Generic Declarations"
)
elements [
]
)
portInstanceVisAsIs 1
portInstanceVis (PortSigDisplay
)
)
defaultCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1800,1950"
st "In0"
blo "0,1750"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
thePort (LogicalPort
decl (Decl
n "In0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
defaultCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
bg "0,0,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,3600,1950"
st "Buffer0"
blo "0,1750"
tm "CptPortNameMgr"
)
)
dt (MLText
va (VaSet
font "Courier New,8,0"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Buffer0"
t "std_logic_vector"
b "(15 DOWNTO 0)"
o 0
)
)
)
DeclarativeBlock *83 (SymDeclBlock
uid 1,0
stg "SymDeclLayoutStrategy"
declLabel (Text
uid 2,0
va (VaSet
font "Arial,8,1"
)
xt "42000,0,47400,1000"
st "Declarations"
blo "42000,800"
)
portLabel (Text
uid 3,0
va (VaSet
font "Arial,8,1"
)
xt "42000,1000,44700,2000"
st "Ports:"
blo "42000,1800"
)
externalLabel (Text
uid 4,0
va (VaSet
font "Arial,8,1"
)
xt "42000,6000,44400,7000"
st "User:"
blo "42000,6800"
)
internalLabel (Text
uid 6,0
va (VaSet
isHidden 1
font "Arial,8,1"
)
xt "42000,0,47800,1000"
st "Internal User:"
blo "42000,800"
)
externalText (MLText
uid 5,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7000,44000,7000"
tm "SyDeclarativeTextMgr"
)
internalText (MLText
uid 7,0
va (VaSet
isHidden 1
font "Courier New,8,0"
)
xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 513,0
)