mirror of
https://github.com/Klagarge/Cursor.git
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1887 lines
23 KiB
Plaintext
1887 lines
23 KiB
Plaintext
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DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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itemName "ALL"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "24.1"
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appVersion "2009.2 (Build 10)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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ordering 1
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suid 16,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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optionalChildren [
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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*7 (GroupColHdr
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tm "GroupColHdrMgr"
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tm "NameColHdrMgr"
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tm "ModeColHdrMgr"
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tm "TypeColHdrMgr"
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*11 (BoundsColHdr
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tm "BoundsColHdrMgr"
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)
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*12 (InitColHdr
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tm "InitColHdrMgr"
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)
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*13 (EolColHdr
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tm "EolColHdrMgr"
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)
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*14 (LogPort
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port (LogicalPort
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decl (Decl
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|
n "columnSend"
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t "std_ulogic"
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o 3
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suid 2,0
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)
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)
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uid 108,0
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)
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*15 (LogPort
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port (LogicalPort
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|
decl (Decl
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|
n "columnData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(dataBitNb-1 downto 0)"
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o 4
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suid 3,0
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)
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)
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uid 110,0
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)
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*16 (LogPort
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port (LogicalPort
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m 1
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|
decl (Decl
|
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|
n "lcdData"
|
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|
t "std_ulogic_vector"
|
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b "(dataBitNb-1 DOWNTO 0)"
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o 1
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suid 4,0
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)
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)
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uid 112,0
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)
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*17 (LogPort
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port (LogicalPort
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decl (Decl
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n "clock"
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t "std_ulogic"
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o 2
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suid 6,0
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)
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)
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uid 116,0
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)
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*18 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "lcdSend"
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t "std_ulogic"
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o 5
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suid 11,0
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)
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)
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uid 370,0
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)
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*19 (LogPort
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port (LogicalPort
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decl (Decl
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n "lcdBusy"
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t "std_ulogic"
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o 6
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suid 12,0
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)
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)
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uid 372,0
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)
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*20 (LogPort
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port (LogicalPort
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decl (Decl
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n "reset"
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t "std_ulogic"
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o 7
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suid 13,0
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)
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)
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uid 384,0
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)
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*21 (LogPort
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port (LogicalPort
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m 1
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|
decl (Decl
|
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|
n "columnBusy"
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|
t "std_ulogic"
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o 8
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suid 14,0
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)
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)
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uid 386,0
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)
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*22 (LogPort
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port (LogicalPort
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|
decl (Decl
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|
n "clearDisplay"
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|
t "std_ulogic"
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|
o 9
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suid 15,0
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)
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)
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uid 487,0
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)
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]
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)
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pdm (PhysicalDM
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displayShortBounds 1
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editShortBounds 1
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uid 34,0
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optionalChildren [
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*23 (Sheet
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sheetRow (SheetRow
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headerVa (MVa
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cellColor "49152,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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cellVa (MVa
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cellColor "65535,65535,65535"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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groupVa (MVa
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cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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emptyMRCItem *24 (MRCItem
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litem &1
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pos 9
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dimension 20
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)
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uid 36,0
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optionalChildren [
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*25 (MRCItem
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litem &2
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pos 0
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dimension 20
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uid 37,0
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)
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*26 (MRCItem
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litem &3
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pos 1
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dimension 23
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uid 38,0
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)
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*27 (MRCItem
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litem &4
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pos 2
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hidden 1
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dimension 20
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uid 39,0
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)
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*28 (MRCItem
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litem &14
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pos 0
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dimension 20
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uid 109,0
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)
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litem &15
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pos 1
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dimension 20
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uid 111,0
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)
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litem &16
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pos 2
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dimension 20
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uid 113,0
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)
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*31 (MRCItem
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litem &17
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pos 3
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dimension 20
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uid 117,0
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)
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litem &18
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pos 4
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dimension 20
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uid 371,0
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)
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litem &19
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pos 5
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dimension 20
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uid 373,0
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)
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*34 (MRCItem
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litem &20
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pos 6
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dimension 20
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uid 385,0
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)
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litem &21
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pos 7
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dimension 20
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uid 387,0
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)
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litem &22
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pos 8
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dimension 20
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uid 488,0
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)
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)
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sheetCol (SheetCol
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uid 40,0
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optionalChildren [
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litem &5
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pos 0
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dimension 20
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uid 41,0
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)
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*38 (MRCItem
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litem &7
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pos 1
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dimension 50
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uid 42,0
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)
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*39 (MRCItem
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litem &8
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pos 2
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dimension 100
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uid 43,0
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)
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*40 (MRCItem
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litem &9
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pos 3
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|
dimension 50
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uid 44,0
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)
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*41 (MRCItem
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||
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litem &10
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|
pos 4
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||
|
dimension 100
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||
|
uid 45,0
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||
|
)
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||
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*42 (MRCItem
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||
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litem &11
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||
|
pos 5
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||
|
dimension 100
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||
|
uid 46,0
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||
|
)
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||
|
*43 (MRCItem
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||
|
litem &12
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||
|
pos 6
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||
|
dimension 50
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||
|
uid 47,0
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||
|
)
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||
|
*44 (MRCItem
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||
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litem &13
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||
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pos 7
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dimension 80
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uid 48,0
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)
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]
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||
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)
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fixedCol 4
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fixedRow 2
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name "Ports"
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uid 35,0
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vaOverrides [
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]
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)
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]
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)
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uid 20,0
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||
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)
|
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genericsCommonDM (CommonDM
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ldm (LogicalDM
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emptyRow *45 (LEmptyRow
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)
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uid 50,0
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optionalChildren [
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*46 (RefLabelRowHdr
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|
)
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*47 (TitleRowHdr
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|
)
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||
|
*48 (FilterRowHdr
|
||
|
)
|
||
|
*49 (RefLabelColHdr
|
||
|
tm "RefLabelColHdrMgr"
|
||
|
)
|
||
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*50 (RowExpandColHdr
|
||
|
tm "RowExpandColHdrMgr"
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|
)
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||
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*51 (GroupColHdr
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|
tm "GroupColHdrMgr"
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|
)
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||
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*52 (NameColHdr
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|
tm "GenericNameColHdrMgr"
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|
)
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||
|
*53 (TypeColHdr
|
||
|
tm "GenericTypeColHdrMgr"
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|
)
|
||
|
*54 (InitColHdr
|
||
|
tm "GenericValueColHdrMgr"
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|
)
|
||
|
*55 (PragmaColHdr
|
||
|
tm "GenericPragmaColHdrMgr"
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||
|
)
|
||
|
*56 (EolColHdr
|
||
|
tm "GenericEolColHdrMgr"
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||
|
)
|
||
|
*57 (LogGeneric
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||
|
generic (GiElement
|
||
|
name "dataBitNb"
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||
|
type "positive"
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|
value "8+1"
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|
)
|
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|
uid 142,0
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)
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]
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||
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)
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pdm (PhysicalDM
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displayShortBounds 1
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editShortBounds 1
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uid 62,0
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optionalChildren [
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*58 (Sheet
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sheetRow (SheetRow
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headerVa (MVa
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cellColor "49152,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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cellVa (MVa
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cellColor "65535,65535,65535"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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groupVa (MVa
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cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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emptyMRCItem *59 (MRCItem
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litem &45
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|
pos 1
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|
dimension 20
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|
)
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|
uid 64,0
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optionalChildren [
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*60 (MRCItem
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litem &46
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|
pos 0
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|
dimension 20
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uid 65,0
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)
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*61 (MRCItem
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litem &47
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pos 1
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dimension 23
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uid 66,0
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||
|
)
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*62 (MRCItem
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litem &48
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|
pos 2
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||
|
hidden 1
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||
|
dimension 20
|
||
|
uid 67,0
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)
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*63 (MRCItem
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litem &57
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pos 0
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||
|
dimension 20
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uid 143,0
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)
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]
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)
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sheetCol (SheetCol
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propVa (MVa
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cellColor "0,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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uid 68,0
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optionalChildren [
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||
|
*64 (MRCItem
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|
litem &49
|
||
|
pos 0
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||
|
dimension 20
|
||
|
uid 69,0
|
||
|
)
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||
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*65 (MRCItem
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|
litem &51
|
||
|
pos 1
|
||
|
dimension 50
|
||
|
uid 70,0
|
||
|
)
|
||
|
*66 (MRCItem
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||
|
litem &52
|
||
|
pos 2
|
||
|
dimension 100
|
||
|
uid 71,0
|
||
|
)
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||
|
*67 (MRCItem
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litem &53
|
||
|
pos 3
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||
|
dimension 100
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||
|
uid 72,0
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)
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*68 (MRCItem
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litem &54
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|
pos 4
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||
|
dimension 50
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||
|
uid 73,0
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||
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)
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*69 (MRCItem
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litem &55
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pos 5
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||
|
dimension 50
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||
|
uid 74,0
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||
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)
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*70 (MRCItem
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litem &56
|
||
|
pos 6
|
||
|
dimension 80
|
||
|
uid 75,0
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||
|
)
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||
|
]
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||
|
)
|
||
|
fixedCol 3
|
||
|
fixedRow 2
|
||
|
name "Ports"
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||
|
uid 63,0
|
||
|
vaOverrides [
|
||
|
]
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
uid 49,0
|
||
|
type 1
|
||
|
)
|
||
|
VExpander (VariableExpander
|
||
|
vvMap [
|
||
|
(vvPair
|
||
|
variable " "
|
||
|
value " "
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDLDir"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hdl"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "HDSDir"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataDesignDir"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds\\lcd@initializer\\symbol.sb.info"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SideDataUserDir"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds\\lcd@initializer\\symbol.sb.user"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "SourceDir"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "appl"
|
||
|
value "HDL Designer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "arch_name"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "concat_file"
|
||
|
value "concatenated"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "config"
|
||
|
value "%(unit)_config"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds\\lcd@initializer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "d_logical"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds\\lcdInitializer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "date"
|
||
|
value "14.08.2013"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day"
|
||
|
value "Mi"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "day_long"
|
||
|
value "Mittwoch"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "dd"
|
||
|
value "14"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "designName"
|
||
|
value "$DESIGN_NAME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "entity_name"
|
||
|
value "lcdInitializer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "ext"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_logical"
|
||
|
value "symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "f_noext"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "group"
|
||
|
value "UNKNOWN"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "host"
|
||
|
value "WE3877"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "language"
|
||
|
value "VHDL"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library"
|
||
|
value "Lcd"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_Concatenation"
|
||
|
value "$HDS_PROJECT_DIR/../libs/SPI/concat"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_HdsLintPlugin"
|
||
|
value "$HDS_PROJECT_DIR/../libs/SPI/designcheck"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "library_downstream_ModelSimCompiler"
|
||
|
value "$SCRATCH_DIR/$DESIGN_NAME/Lcd/work"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "mm"
|
||
|
value "08"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "module_name"
|
||
|
value "lcdInitializer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month"
|
||
|
value "Aug"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "month_long"
|
||
|
value "August"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds\\lcd@initializer\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "p_logical"
|
||
|
value "d:\\Workspaces\\Projects\\LCD\\LCD_tester\\..\\Libs\\Lcd\\hds\\lcdInitializer\\symbol.sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "package_name"
|
||
|
value "<Undefined Variable>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "project_name"
|
||
|
value "hds"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "series"
|
||
|
value "HDL Designer Series"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ADMS"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_DesignCompilerPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_HDSPath"
|
||
|
value "$HDS_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEBinPath"
|
||
|
value "$ISE_HOME"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ISEPath"
|
||
|
value "$SCRATCH_DIR\\$DESIGN_NAME\\$ISE_WORK_DIR"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_LeonardoPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_ModelSimPath"
|
||
|
value "$MODELSIM_HOME\\win32"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_NC"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_PrecisionRTLPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_QuestaSimPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "task_VCSPath"
|
||
|
value "<TBD>"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_ext"
|
||
|
value "sb"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "this_file_logical"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "time"
|
||
|
value "08:05:31"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "unit"
|
||
|
value "lcdInitializer"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "user"
|
||
|
value "uadmin"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "version"
|
||
|
value "2009.2 (Build 10)"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "view"
|
||
|
value "symbol"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "year"
|
||
|
value "2013"
|
||
|
)
|
||
|
(vvPair
|
||
|
variable "yy"
|
||
|
value "13"
|
||
|
)
|
||
|
]
|
||
|
)
|
||
|
LanguageMgr "VhdlLangMgr"
|
||
|
uid 19,0
|
||
|
optionalChildren [
|
||
|
*71 (SymbolBody
|
||
|
uid 8,0
|
||
|
optionalChildren [
|
||
|
*72 (CptPort
|
||
|
uid 81,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 82,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "43250,6625,44000,7375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 83,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 84,0
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "45000,6400,52500,7600"
|
||
|
st "columnSend"
|
||
|
blo "45000,7400"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 85,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,1000,21000,1800"
|
||
|
st "columnSend : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "columnSend"
|
||
|
t "std_ulogic"
|
||
|
o 3
|
||
|
suid 2,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*73 (CptPort
|
||
|
uid 86,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 87,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "43250,4625,44000,5375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 88,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 89,0
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "45000,4400,52400,5600"
|
||
|
st "columnData"
|
||
|
blo "45000,5400"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 90,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,1800,36000,2600"
|
||
|
st "columnData : IN std_ulogic_vector (dataBitNb-1 downto 0) ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "columnData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(dataBitNb-1 downto 0)"
|
||
|
o 4
|
||
|
suid 3,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*74 (CptPort
|
||
|
uid 91,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 92,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "60000,4625,60750,5375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 93,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 94,0
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "54400,4400,59000,5600"
|
||
|
st "lcdData"
|
||
|
ju 2
|
||
|
blo "59000,5400"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 95,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,-600,36000,200"
|
||
|
st "lcdData : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0) ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "lcdData"
|
||
|
t "std_ulogic_vector"
|
||
|
b "(dataBitNb-1 DOWNTO 0)"
|
||
|
o 1
|
||
|
suid 4,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*75 (CptPort
|
||
|
uid 101,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 102,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "43250,12625,44000,13375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 103,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "VerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 104,0
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "45000,12400,48400,13600"
|
||
|
st "clock"
|
||
|
blo "45000,13400"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 105,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,200,21000,1000"
|
||
|
st "clock : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "clock"
|
||
|
t "std_ulogic"
|
||
|
o 2
|
||
|
suid 6,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*76 (CptPort
|
||
|
uid 360,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 411,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "60000,6625,60750,7375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 362,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 363,0
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "54300,6400,59000,7600"
|
||
|
st "lcdSend"
|
||
|
ju 2
|
||
|
blo "59000,7400"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 364,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,2600,21000,3400"
|
||
|
st "lcdSend : OUT std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
m 1
|
||
|
decl (Decl
|
||
|
n "lcdSend"
|
||
|
t "std_ulogic"
|
||
|
o 5
|
||
|
suid 11,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*77 (CptPort
|
||
|
uid 365,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 366,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "60000,8625,60750,9375"
|
||
|
)
|
||
|
tg (CPTG
|
||
|
uid 367,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 368,0
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "54300,8400,59000,9600"
|
||
|
st "lcdBusy"
|
||
|
ju 2
|
||
|
blo "59000,9400"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 369,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "2000,3400,21000,4200"
|
||
|
st "lcdBusy : IN std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
thePort (LogicalPort
|
||
|
decl (Decl
|
||
|
n "lcdBusy"
|
||
|
t "std_ulogic"
|
||
|
o 6
|
||
|
suid 12,0
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
*78 (CptPort
|
||
|
uid 374,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 375,0
|
||
|
ro 90
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "43250,14625,44000,15375"
|
||
|
)
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