1
0
mirror of https://github.com/Klagarge/Cursor.git synced 2024-11-23 01:43:28 +00:00

accel + move dans le main

This commit is contained in:
SimoDonn 2021-12-07 16:01:27 +01:00
parent cdc50c7e53
commit 18ae102c38
3 changed files with 612 additions and 481 deletions

View File

@ -21,7 +21,7 @@ appVersion "2019.2 (Build 5)"
model (Symbol
commonDM (CommonDM
ldm (LogicalDM
suid 12,0
suid 26,0
usingSuid 1
emptyRow *1 (LEmptyRow
)
@ -67,23 +67,23 @@ decl (Decl
n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 1,0
o 25
suid 15,0
)
)
uid 111,0
uid 312,0
)
*15 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 2,0
n "clk"
t "std_uLogic"
o 28
suid 16,0
)
)
uid 113,0
uid 314,0
)
*16 (LogPort
port (LogicalPort
@ -92,11 +92,11 @@ decl (Decl
n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 3,0
o 23
suid 17,0
)
)
uid 115,0
uid 316,0
)
*17 (LogPort
port (LogicalPort
@ -106,11 +106,11 @@ decl (Decl
n "Power"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 4,0
o 26
suid 18,0
)
)
uid 117,0
uid 318,0
)
*18 (LogPort
port (LogicalPort
@ -119,47 +119,45 @@ m 1
decl (Decl
n "RaZ"
t "std_ulogic"
o 9
suid 5,0
o 24
suid 19,0
)
)
uid 119,0
uid 320,0
)
*19 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 6,0
n "rst"
t "std_uLogic"
o 29
suid 20,0
)
)
uid 121,0
uid 322,0
)
*20 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "sensor1"
t "std_uLogic"
o 5
suid 7,0
o 10
suid 21,0
)
)
uid 123,0
uid 324,0
)
*21 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "sensor2"
t "std_uLogic"
o 6
suid 8,0
o 11
suid 22,0
)
)
uid 125,0
uid 326,0
)
*22 (LogPort
port (LogicalPort
@ -168,37 +166,35 @@ m 1
decl (Decl
n "SideL"
t "std_ulogic"
o 10
suid 9,0
o 27
suid 23,0
)
)
uid 127,0
uid 328,0
)
*23 (LogPort
port (LogicalPort
lang 11
decl (Decl
n "testMode"
t "std_uLogic"
o 7
suid 10,0
o 12
suid 24,0
)
)
uid 129,0
uid 330,0
)
*24 (LogPort
port (LogicalPort
lang 11
m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 TO testLineNb)"
o 11
suid 11,0
o 21
suid 25,0
)
)
uid 131,0
uid 332,0
)
*25 (LogPort
port (LogicalPort
@ -207,11 +203,11 @@ m 1
decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 12,0
o 26
suid 26,0
)
)
uid 133,0
uid 334,0
)
]
)
@ -265,75 +261,75 @@ uid 155,0
)
*31 (MRCItem
litem &14
pos 1
pos 0
dimension 20
uid 112,0
uid 313,0
)
*32 (MRCItem
litem &15
pos 2
pos 1
dimension 20
uid 114,0
uid 315,0
)
*33 (MRCItem
litem &16
pos 0
pos 2
dimension 20
uid 116,0
uid 317,0
)
*34 (MRCItem
litem &17
pos 7
pos 3
dimension 20
uid 118,0
uid 319,0
)
*35 (MRCItem
litem &18
pos 8
pos 4
dimension 20
uid 120,0
uid 321,0
)
*36 (MRCItem
litem &19
pos 3
pos 5
dimension 20
uid 122,0
uid 323,0
)
*37 (MRCItem
litem &20
pos 4
pos 6
dimension 20
uid 124,0
uid 325,0
)
*38 (MRCItem
litem &21
pos 5
pos 7
dimension 20
uid 126,0
uid 327,0
)
*39 (MRCItem
litem &22
pos 9
pos 8
dimension 20
uid 128,0
uid 329,0
)
*40 (MRCItem
litem &23
pos 6
pos 9
dimension 20
uid 130,0
uid 331,0
)
*41 (MRCItem
litem &24
pos 10
dimension 20
uid 132,0
uid 333,0
)
*42 (MRCItem
litem &25
pos 11
dimension 20
uid 134,0
uid 335,0
)
]
)
@ -660,7 +656,7 @@ value "PC-SDM"
)
(vvPair
variable "graphical_source_time"
value "08:28:07"
value "15:59:54"
)
(vvPair
variable "group"
@ -732,7 +728,7 @@ value "interface"
)
(vvPair
variable "time"
value "08:28:07"
value "15:59:54"
)
(vvPair
variable "unit"
@ -767,10 +763,10 @@ optionalChildren [
uid 8,0
optionalChildren [
*76 (CptPort
uid 51,0
uid 252,0
ps "OnEdgeStrategy"
shape (Triangle
uid 52,0
uid 253,0
ro 90
va (VaSet
vasetType 1
@ -779,11 +775,11 @@ fg "0,65535,0"
xt "14250,38625,15000,39375"
)
tg (CPTG
uid 53,0
uid 254,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 54,0
uid 255,0
va (VaSet
font "Verdana,12,0"
)
@ -794,13 +790,10 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 55,0
uid 256,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,3200,66500,4000"
st "button : IN unsigned (3 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -808,62 +801,59 @@ decl (Decl
n "button"
t "unsigned"
b "(3 DOWNTO 0)"
o 2
suid 1,0
o 25
suid 15,0
)
)
)
*77 (CptPort
uid 56,0
uid 257,0
ps "OnEdgeStrategy"
shape (Triangle
uid 57,0
uid 258,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,62625,15000,63375"
xt "14250,58625,15000,59375"
)
tg (CPTG
uid 58,0
uid 259,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 59,0
uid 260,0
va (VaSet
font "Verdana,12,0"
)
xt "16000,62300,19800,63700"
st "clock"
blo "16000,63500"
xt "16000,58300,18400,59700"
st "clk"
blo "16000,59500"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 60,0
uid 261,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4000,61000,4800"
st "clock : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "clock"
t "std_ulogic"
o 3
suid 2,0
n "clk"
t "std_uLogic"
o 28
suid 16,0
)
)
)
*78 (CptPort
uid 61,0
uid 262,0
ps "OnEdgeStrategy"
shape (Triangle
uid 62,0
uid 263,0
ro 90
va (VaSet
vasetType 1
@ -872,11 +862,11 @@ fg "0,65535,0"
xt "14250,7625,15000,8375"
)
tg (CPTG
uid 63,0
uid 264,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 64,0
uid 265,0
va (VaSet
font "Verdana,12,0"
)
@ -887,13 +877,10 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 65,0
uid 266,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,2400,67000,3200"
st "Position : IN unsigned (15 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -901,16 +888,16 @@ decl (Decl
n "Position"
t "unsigned"
b "(15 DOWNTO 0)"
o 1
suid 3,0
o 23
suid 17,0
)
)
)
*79 (CptPort
uid 66,0
uid 267,0
ps "OnEdgeStrategy"
shape (Triangle
uid 67,0
uid 268,0
ro 90
va (VaSet
vasetType 1
@ -919,11 +906,11 @@ fg "0,65535,0"
xt "45000,59625,45750,60375"
)
tg (CPTG
uid 68,0
uid 269,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 69,0
uid 270,0
va (VaSet
font "Verdana,12,0"
)
@ -935,13 +922,10 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 70,0
uid 271,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8000,66500,8800"
st "Power : OUT unsigned (7 DOWNTO 0) ;
"
)
thePort (LogicalPort
lang 11
@ -950,16 +934,16 @@ decl (Decl
n "Power"
t "unsigned"
b "(7 DOWNTO 0)"
o 8
suid 4,0
o 26
suid 18,0
)
)
)
*80 (CptPort
uid 71,0
uid 272,0
ps "OnEdgeStrategy"
shape (Triangle
uid 72,0
uid 273,0
ro 270
va (VaSet
vasetType 1
@ -968,11 +952,11 @@ fg "0,65535,0"
xt "14250,14625,15000,15375"
)
tg (CPTG
uid 73,0
uid 274,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 74,0
uid 275,0
va (VaSet
font "Verdana,12,0"
)
@ -983,13 +967,10 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 75,0
uid 276,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,8800,61000,9600"
st "RaZ : OUT std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -997,62 +978,59 @@ m 1
decl (Decl
n "RaZ"
t "std_ulogic"
o 9
suid 5,0
o 24
suid 19,0
)
)
)
*81 (CptPort
uid 76,0
uid 277,0
ps "OnEdgeStrategy"
shape (Triangle
uid 77,0
uid 278,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "14250,63625,15000,64375"
xt "14250,59625,15000,60375"
)
tg (CPTG
uid 78,0
uid 279,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 79,0
uid 280,0
va (VaSet
font "Verdana,12,0"
)
xt "16000,63300,20100,64700"
st "reset"
blo "16000,64500"
xt "16000,59300,18500,60700"
st "rst"
blo "16000,60500"
tm "CptPortNameMgr"
)
)
dt (MLText
uid 80,0
uid 281,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,4800,61000,5600"
st "reset : IN std_ulogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "reset"
t "std_ulogic"
o 4
suid 6,0
n "rst"
t "std_uLogic"
o 29
suid 20,0
)
)
)
*82 (CptPort
uid 81,0
uid 282,0
ps "OnEdgeStrategy"
shape (Triangle
uid 82,0
uid 283,0
ro 90
va (VaSet
vasetType 1
@ -1061,11 +1039,11 @@ fg "0,65535,0"
xt "14250,53625,15000,54375"
)
tg (CPTG
uid 83,0
uid 284,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 84,0
uid 285,0
va (VaSet
font "Verdana,12,0"
)
@ -1076,29 +1054,25 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 85,0
uid 286,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,5600,61000,6400"
st "sensor1 : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "sensor1"
t "std_uLogic"
o 5
suid 7,0
o 10
suid 21,0
)
)
)
*83 (CptPort
uid 86,0
uid 287,0
ps "OnEdgeStrategy"
shape (Triangle
uid 87,0
uid 288,0
ro 90
va (VaSet
vasetType 1
@ -1107,11 +1081,11 @@ fg "0,65535,0"
xt "14250,51625,15000,52375"
)
tg (CPTG
uid 88,0
uid 289,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 89,0
uid 290,0
va (VaSet
font "Verdana,12,0"
)
@ -1122,29 +1096,25 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 90,0
uid 291,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,6400,61000,7200"
st "sensor2 : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "sensor2"
t "std_uLogic"
o 6
suid 8,0
o 11
suid 22,0
)
)
)
*84 (CptPort
uid 91,0
uid 292,0
ps "OnEdgeStrategy"
shape (Triangle
uid 92,0
uid 293,0
ro 90
va (VaSet
vasetType 1
@ -1153,11 +1123,11 @@ fg "0,65535,0"
xt "45000,63625,45750,64375"
)
tg (CPTG
uid 93,0
uid 294,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 94,0
uid 295,0
va (VaSet
font "Verdana,12,0"
)
@ -1169,13 +1139,10 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 95,0
uid 296,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,9600,61000,10400"
st "SideL : OUT std_ulogic ;
"
)
thePort (LogicalPort
lang 11
@ -1183,16 +1150,16 @@ m 1
decl (Decl
n "SideL"
t "std_ulogic"
o 10
suid 9,0
o 27
suid 23,0
)
)
)
*85 (CptPort
uid 96,0
uid 297,0
ps "OnEdgeStrategy"
shape (Triangle
uid 97,0
uid 298,0
ro 90
va (VaSet
vasetType 1
@ -1201,11 +1168,11 @@ fg "0,65535,0"
xt "14250,57625,15000,58375"
)
tg (CPTG
uid 98,0
uid 299,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 99,0
uid 300,0
va (VaSet
font "Verdana,12,0"
)
@ -1216,29 +1183,25 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 100,0
uid 301,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,7200,61000,8000"
st "testMode : IN std_uLogic ;
"
)
thePort (LogicalPort
lang 11
decl (Decl
n "testMode"
t "std_uLogic"
o 7
suid 10,0
o 12
suid 24,0
)
)
)
*86 (CptPort
uid 101,0
uid 302,0
ps "OnEdgeStrategy"
shape (Triangle
uid 102,0
uid 303,0
ro 90
va (VaSet
vasetType 1
@ -1247,11 +1210,11 @@ fg "0,65535,0"
xt "45000,7625,45750,8375"
)
tg (CPTG
uid 103,0
uid 304,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 104,0
uid 305,0
va (VaSet
font "Verdana,12,0"
)
@ -1263,31 +1226,27 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 105,0
uid 306,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,10400,73500,11200"
st "testOut : OUT std_uLogic_vector (1 TO testLineNb) ;
"
)
thePort (LogicalPort
lang 11
m 1
decl (Decl
n "testOut"
t "std_uLogic_vector"
b "(1 TO testLineNb)"
o 11
suid 11,0
o 21
suid 25,0
)
)
)
*87 (CptPort
uid 106,0
uid 307,0
ps "OnEdgeStrategy"
shape (Triangle
uid 107,0
uid 308,0
ro 270
va (VaSet
vasetType 1
@ -1296,11 +1255,11 @@ fg "0,65535,0"
xt "14250,45625,15000,46375"
)
tg (CPTG
uid 108,0
uid 309,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 109,0
uid 310,0
va (VaSet
font "Verdana,12,0"
)
@ -1311,13 +1270,10 @@ tm "CptPortNameMgr"
)
)
dt (MLText
uid 110,0
uid 311,0
va (VaSet
font "Courier New,8,0"
)
xt "44000,11200,60000,12000"
st "unlock : OUT std_ulogic
"
)
thePort (LogicalPort
lang 11
@ -1325,8 +1281,8 @@ m 1
decl (Decl
n "unlock"
t "std_ulogic"
o 12
suid 12,0
o 26
suid 26,0
)
)
)
@ -2037,6 +1993,6 @@ xt "42000,0,42000,0"
tm "SyDeclarativeTextMgr"
)
)
lastUid 214,0
lastUid 335,0
activeModelName "Symbol:CDM"
)

File diff suppressed because it is too large Load Diff

View File

@ -6212,8 +6212,8 @@ activeSidePanelTab 2
activeLibraryTab 3
sidePanelSize 278
showUnixHiddenFiles 0
componentBrowserXpos 569
componentBrowserYpos 300
componentBrowserXpos 1279
componentBrowserYpos 521
componentBrowserWidth 300
componentBrowserHeight 340
componentBrowserLibraryNames [