mirror of
https://github.com/Klagarge/Cursor.git
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1459 lines
19 KiB
Plaintext
1459 lines
19 KiB
Plaintext
DocumentHdrVersion "1.1"
|
||
Header (DocumentHdr
|
||
version 2
|
||
dialect 11
|
||
dmPackageRefs [
|
||
(DmPackageRef
|
||
library "ieee"
|
||
unitName "std_logic_1164"
|
||
)
|
||
(DmPackageRef
|
||
library "ieee"
|
||
unitName "numeric_std"
|
||
)
|
||
(DmPackageRef
|
||
library "gates"
|
||
unitName "gates"
|
||
)
|
||
(DmPackageRef
|
||
library "ieee"
|
||
unitName "NUMERIC_SIGNED"
|
||
)
|
||
]
|
||
libraryRefs [
|
||
"ieee"
|
||
"gates"
|
||
]
|
||
)
|
||
version "27.1"
|
||
appVersion "2019.2 (Build 5)"
|
||
model (Symbol
|
||
commonDM (CommonDM
|
||
ldm (LogicalDM
|
||
suid 6,0
|
||
usingSuid 1
|
||
emptyRow *1 (LEmptyRow
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||
)
|
||
uid 53,0
|
||
optionalChildren [
|
||
*2 (RefLabelRowHdr
|
||
)
|
||
*3 (TitleRowHdr
|
||
)
|
||
*4 (FilterRowHdr
|
||
)
|
||
*5 (RefLabelColHdr
|
||
tm "RefLabelColHdrMgr"
|
||
)
|
||
*6 (RowExpandColHdr
|
||
tm "RowExpandColHdrMgr"
|
||
)
|
||
*7 (GroupColHdr
|
||
tm "GroupColHdrMgr"
|
||
)
|
||
*8 (NameColHdr
|
||
tm "NameColHdrMgr"
|
||
)
|
||
*9 (ModeColHdr
|
||
tm "ModeColHdrMgr"
|
||
)
|
||
*10 (TypeColHdr
|
||
tm "TypeColHdrMgr"
|
||
)
|
||
*11 (BoundsColHdr
|
||
tm "BoundsColHdrMgr"
|
||
)
|
||
*12 (InitColHdr
|
||
tm "InitColHdrMgr"
|
||
)
|
||
*13 (EolColHdr
|
||
tm "EolColHdrMgr"
|
||
)
|
||
*14 (LogPort
|
||
port (LogicalPort
|
||
lang 11
|
||
m 1
|
||
decl (Decl
|
||
n "bar"
|
||
t "unsigned"
|
||
b "(15 DOWNTO 0)"
|
||
o 10
|
||
suid 4,0
|
||
)
|
||
)
|
||
uid 190,0
|
||
)
|
||
*15 (LogPort
|
||
port (LogicalPort
|
||
decl (Decl
|
||
n "clock"
|
||
t "std_ulogic"
|
||
o 2
|
||
suid 5,0
|
||
)
|
||
)
|
||
uid 192,0
|
||
)
|
||
*16 (LogPort
|
||
port (LogicalPort
|
||
decl (Decl
|
||
n "reset"
|
||
t "std_ulogic"
|
||
o 8
|
||
suid 6,0
|
||
)
|
||
)
|
||
uid 194,0
|
||
)
|
||
]
|
||
)
|
||
pdm (PhysicalDM
|
||
displayShortBounds 1
|
||
editShortBounds 1
|
||
uid 66,0
|
||
optionalChildren [
|
||
*17 (Sheet
|
||
sheetRow (SheetRow
|
||
headerVa (MVa
|
||
cellColor "49152,49152,49152"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
)
|
||
cellVa (MVa
|
||
cellColor "65535,65535,65535"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
)
|
||
groupVa (MVa
|
||
cellColor "39936,56832,65280"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
)
|
||
emptyMRCItem *18 (MRCItem
|
||
litem &1
|
||
pos 3
|
||
dimension 20
|
||
)
|
||
uid 68,0
|
||
optionalChildren [
|
||
*19 (MRCItem
|
||
litem &2
|
||
pos 0
|
||
dimension 20
|
||
uid 69,0
|
||
)
|
||
*20 (MRCItem
|
||
litem &3
|
||
pos 1
|
||
dimension 23
|
||
uid 70,0
|
||
)
|
||
*21 (MRCItem
|
||
litem &4
|
||
pos 2
|
||
hidden 1
|
||
dimension 20
|
||
uid 71,0
|
||
)
|
||
*22 (MRCItem
|
||
litem &14
|
||
pos 0
|
||
dimension 20
|
||
uid 191,0
|
||
)
|
||
*23 (MRCItem
|
||
litem &15
|
||
pos 1
|
||
dimension 20
|
||
uid 193,0
|
||
)
|
||
*24 (MRCItem
|
||
litem &16
|
||
pos 2
|
||
dimension 20
|
||
uid 195,0
|
||
)
|
||
]
|
||
)
|
||
sheetCol (SheetCol
|
||
propVa (MVa
|
||
cellColor "0,49152,49152"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
textAngle 90
|
||
)
|
||
uid 72,0
|
||
optionalChildren [
|
||
*25 (MRCItem
|
||
litem &5
|
||
pos 0
|
||
dimension 20
|
||
uid 73,0
|
||
)
|
||
*26 (MRCItem
|
||
litem &7
|
||
pos 1
|
||
dimension 50
|
||
uid 74,0
|
||
)
|
||
*27 (MRCItem
|
||
litem &8
|
||
pos 2
|
||
dimension 100
|
||
uid 75,0
|
||
)
|
||
*28 (MRCItem
|
||
litem &9
|
||
pos 3
|
||
dimension 50
|
||
uid 76,0
|
||
)
|
||
*29 (MRCItem
|
||
litem &10
|
||
pos 4
|
||
dimension 100
|
||
uid 77,0
|
||
)
|
||
*30 (MRCItem
|
||
litem &11
|
||
pos 5
|
||
dimension 100
|
||
uid 78,0
|
||
)
|
||
*31 (MRCItem
|
||
litem &12
|
||
pos 6
|
||
dimension 50
|
||
uid 79,0
|
||
)
|
||
*32 (MRCItem
|
||
litem &13
|
||
pos 7
|
||
dimension 80
|
||
uid 80,0
|
||
)
|
||
]
|
||
)
|
||
fixedCol 4
|
||
fixedRow 2
|
||
name "Ports"
|
||
uid 67,0
|
||
vaOverrides [
|
||
]
|
||
)
|
||
]
|
||
)
|
||
uid 52,0
|
||
)
|
||
genericsCommonDM (CommonDM
|
||
ldm (LogicalDM
|
||
emptyRow *33 (LEmptyRow
|
||
)
|
||
uid 82,0
|
||
optionalChildren [
|
||
*34 (RefLabelRowHdr
|
||
)
|
||
*35 (TitleRowHdr
|
||
)
|
||
*36 (FilterRowHdr
|
||
)
|
||
*37 (RefLabelColHdr
|
||
tm "RefLabelColHdrMgr"
|
||
)
|
||
*38 (RowExpandColHdr
|
||
tm "RowExpandColHdrMgr"
|
||
)
|
||
*39 (GroupColHdr
|
||
tm "GroupColHdrMgr"
|
||
)
|
||
*40 (NameColHdr
|
||
tm "GenericNameColHdrMgr"
|
||
)
|
||
*41 (TypeColHdr
|
||
tm "GenericTypeColHdrMgr"
|
||
)
|
||
*42 (InitColHdr
|
||
tm "GenericValueColHdrMgr"
|
||
)
|
||
*43 (PragmaColHdr
|
||
tm "GenericPragmaColHdrMgr"
|
||
)
|
||
*44 (EolColHdr
|
||
tm "GenericEolColHdrMgr"
|
||
)
|
||
]
|
||
)
|
||
pdm (PhysicalDM
|
||
displayShortBounds 1
|
||
editShortBounds 1
|
||
uid 94,0
|
||
optionalChildren [
|
||
*45 (Sheet
|
||
sheetRow (SheetRow
|
||
headerVa (MVa
|
||
cellColor "49152,49152,49152"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
)
|
||
cellVa (MVa
|
||
cellColor "65535,65535,65535"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
)
|
||
groupVa (MVa
|
||
cellColor "39936,56832,65280"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
)
|
||
emptyMRCItem *46 (MRCItem
|
||
litem &33
|
||
pos 3
|
||
dimension 20
|
||
)
|
||
uid 96,0
|
||
optionalChildren [
|
||
*47 (MRCItem
|
||
litem &34
|
||
pos 0
|
||
dimension 20
|
||
uid 97,0
|
||
)
|
||
*48 (MRCItem
|
||
litem &35
|
||
pos 1
|
||
dimension 23
|
||
uid 98,0
|
||
)
|
||
*49 (MRCItem
|
||
litem &36
|
||
pos 2
|
||
hidden 1
|
||
dimension 20
|
||
uid 99,0
|
||
)
|
||
]
|
||
)
|
||
sheetCol (SheetCol
|
||
propVa (MVa
|
||
cellColor "0,49152,49152"
|
||
fontColor "0,0,0"
|
||
font "Tahoma,10,0"
|
||
textAngle 90
|
||
)
|
||
uid 100,0
|
||
optionalChildren [
|
||
*50 (MRCItem
|
||
litem &37
|
||
pos 0
|
||
dimension 20
|
||
uid 101,0
|
||
)
|
||
*51 (MRCItem
|
||
litem &39
|
||
pos 1
|
||
dimension 50
|
||
uid 102,0
|
||
)
|
||
*52 (MRCItem
|
||
litem &40
|
||
pos 2
|
||
dimension 100
|
||
uid 103,0
|
||
)
|
||
*53 (MRCItem
|
||
litem &41
|
||
pos 3
|
||
dimension 100
|
||
uid 104,0
|
||
)
|
||
*54 (MRCItem
|
||
litem &42
|
||
pos 4
|
||
dimension 50
|
||
uid 105,0
|
||
)
|
||
*55 (MRCItem
|
||
litem &43
|
||
pos 5
|
||
dimension 50
|
||
uid 106,0
|
||
)
|
||
*56 (MRCItem
|
||
litem &44
|
||
pos 6
|
||
dimension 80
|
||
uid 107,0
|
||
)
|
||
]
|
||
)
|
||
fixedCol 3
|
||
fixedRow 2
|
||
name "Ports"
|
||
uid 95,0
|
||
vaOverrides [
|
||
]
|
||
)
|
||
]
|
||
)
|
||
uid 81,0
|
||
type 1
|
||
)
|
||
VExpander (VariableExpander
|
||
vvMap [
|
||
(vvPair
|
||
variable "HDLDir"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hdl"
|
||
)
|
||
(vvPair
|
||
variable "HDSDir"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
|
||
)
|
||
(vvPair
|
||
variable "SideDataDesignDir"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\test\\interface.info"
|
||
)
|
||
(vvPair
|
||
variable "SideDataUserDir"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\test\\interface.user"
|
||
)
|
||
(vvPair
|
||
variable "SourceDir"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds"
|
||
)
|
||
(vvPair
|
||
variable "appl"
|
||
value "HDL Designer"
|
||
)
|
||
(vvPair
|
||
variable "arch_name"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "concat_file"
|
||
value "concatenated"
|
||
)
|
||
(vvPair
|
||
variable "config"
|
||
value "%(unit)_%(view)_config"
|
||
)
|
||
(vvPair
|
||
variable "d"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\test"
|
||
)
|
||
(vvPair
|
||
variable "d_logical"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\test"
|
||
)
|
||
(vvPair
|
||
variable "date"
|
||
value "10.12.2021"
|
||
)
|
||
(vvPair
|
||
variable "day"
|
||
value "ven."
|
||
)
|
||
(vvPair
|
||
variable "day_long"
|
||
value "vendredi"
|
||
)
|
||
(vvPair
|
||
variable "dd"
|
||
value "10"
|
||
)
|
||
(vvPair
|
||
variable "entity_name"
|
||
value "test"
|
||
)
|
||
(vvPair
|
||
variable "ext"
|
||
value "<TBD>"
|
||
)
|
||
(vvPair
|
||
variable "f"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "f_logical"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "f_noext"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "graphical_source_author"
|
||
value "remi"
|
||
)
|
||
(vvPair
|
||
variable "graphical_source_date"
|
||
value "10.12.2021"
|
||
)
|
||
(vvPair
|
||
variable "graphical_source_group"
|
||
value "UNKNOWN"
|
||
)
|
||
(vvPair
|
||
variable "graphical_source_host"
|
||
value "MARVIN"
|
||
)
|
||
(vvPair
|
||
variable "graphical_source_time"
|
||
value "09:46:14"
|
||
)
|
||
(vvPair
|
||
variable "group"
|
||
value "UNKNOWN"
|
||
)
|
||
(vvPair
|
||
variable "host"
|
||
value "MARVIN"
|
||
)
|
||
(vvPair
|
||
variable "language"
|
||
value "VHDL"
|
||
)
|
||
(vvPair
|
||
variable "library"
|
||
value "Cursor"
|
||
)
|
||
(vvPair
|
||
variable "library_downstream_ModelSimCompiler"
|
||
value "$SCRATCH_DIR/Cursor/work"
|
||
)
|
||
(vvPair
|
||
variable "mm"
|
||
value "12"
|
||
)
|
||
(vvPair
|
||
variable "module_name"
|
||
value "test"
|
||
)
|
||
(vvPair
|
||
variable "month"
|
||
value "d<>c."
|
||
)
|
||
(vvPair
|
||
variable "month_long"
|
||
value "d<>cembre"
|
||
)
|
||
(vvPair
|
||
variable "p"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\test\\interface"
|
||
)
|
||
(vvPair
|
||
variable "p_logical"
|
||
value "C:\\Users\\remi\\OneDrive\\Documents\\Cours\\05-HEVS\\S1fb\\electricity\\1-EIN\\project\\cursor\\HDLdesigner\\Cursor\\Prefs\\..\\Cursor\\hds\\test\\interface"
|
||
)
|
||
(vvPair
|
||
variable "package_name"
|
||
value "<Undefined Variable>"
|
||
)
|
||
(vvPair
|
||
variable "project_name"
|
||
value "hds"
|
||
)
|
||
(vvPair
|
||
variable "series"
|
||
value "HDL Designer Series"
|
||
)
|
||
(vvPair
|
||
variable "this_ext"
|
||
value "<TBD>"
|
||
)
|
||
(vvPair
|
||
variable "this_file"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "this_file_logical"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "time"
|
||
value "09:46:14"
|
||
)
|
||
(vvPair
|
||
variable "unit"
|
||
value "test"
|
||
)
|
||
(vvPair
|
||
variable "user"
|
||
value "remi"
|
||
)
|
||
(vvPair
|
||
variable "version"
|
||
value "2019.2 (Build 5)"
|
||
)
|
||
(vvPair
|
||
variable "view"
|
||
value "interface"
|
||
)
|
||
(vvPair
|
||
variable "year"
|
||
value "2021"
|
||
)
|
||
(vvPair
|
||
variable "yy"
|
||
value "21"
|
||
)
|
||
]
|
||
)
|
||
LanguageMgr "Vhdl2008LangMgr"
|
||
uid 51,0
|
||
optionalChildren [
|
||
*57 (SymbolBody
|
||
uid 8,0
|
||
optionalChildren [
|
||
*58 (CptPort
|
||
uid 175,0
|
||
ps "OnEdgeStrategy"
|
||
shape (Triangle
|
||
uid 176,0
|
||
ro 90
|
||
va (VaSet
|
||
vasetType 1
|
||
fg "0,65535,0"
|
||
)
|
||
xt "23000,10625,23750,11375"
|
||
)
|
||
tg (CPTG
|
||
uid 177,0
|
||
ps "CptPortTextPlaceStrategy"
|
||
stg "RightVerticalLayoutStrategy"
|
||
f (Text
|
||
uid 178,0
|
||
va (VaSet
|
||
font "Verdana,12,0"
|
||
)
|
||
xt "19100,10300,22000,11700"
|
||
st "bar"
|
||
ju 2
|
||
blo "22000,11500"
|
||
tm "CptPortNameMgr"
|
||
)
|
||
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