mirror of
https://github.com/Klagarge/Cursor.git
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1963 lines
24 KiB
Plaintext
1963 lines
24 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "27.1"
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appVersion "2019.2 (Build 5)"
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model (Symbol
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commonDM (CommonDM
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ldm (LogicalDM
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ordering 1
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suid 32,0
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usingSuid 1
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emptyRow *1 (LEmptyRow
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)
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uid 21,0
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optionalChildren [
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*2 (RefLabelRowHdr
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)
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*3 (TitleRowHdr
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)
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*4 (FilterRowHdr
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)
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*5 (RefLabelColHdr
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tm "RefLabelColHdrMgr"
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)
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*6 (RowExpandColHdr
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tm "RowExpandColHdrMgr"
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)
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*7 (GroupColHdr
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tm "GroupColHdrMgr"
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)
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*8 (NameColHdr
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tm "NameColHdrMgr"
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)
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*9 (ModeColHdr
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tm "ModeColHdrMgr"
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)
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*10 (TypeColHdr
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tm "TypeColHdrMgr"
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)
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*11 (BoundsColHdr
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tm "BoundsColHdrMgr"
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)
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*12 (InitColHdr
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tm "InitColHdrMgr"
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)
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*13 (EolColHdr
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tm "EolColHdrMgr"
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)
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*14 (LogPort
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port (LogicalPort
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decl (Decl
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n "clock"
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t "std_ulogic"
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o 7
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suid 1,0
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)
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)
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uid 111,0
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)
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*15 (LogPort
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port (LogicalPort
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decl (Decl
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n "reset"
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t "std_ulogic"
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o 1
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suid 2,0
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)
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)
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uid 113,0
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)
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*16 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "SI"
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t "std_ulogic"
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o 2
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suid 3,0
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)
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)
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uid 115,0
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)
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*17 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "SCL"
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t "std_ulogic"
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o 3
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suid 4,0
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)
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)
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uid 117,0
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)
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*18 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "A0"
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t "std_ulogic"
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o 4
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suid 5,0
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)
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)
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uid 119,0
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)
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*19 (LogPort
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port (LogicalPort
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decl (Decl
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n "ascii"
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t "std_ulogic_vector"
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b "(asciiBitNb-1 downto 0)"
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o 8
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suid 11,0
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)
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)
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uid 798,0
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)
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*20 (LogPort
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port (LogicalPort
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decl (Decl
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n "send"
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t "std_ulogic"
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o 9
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suid 21,0
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)
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)
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uid 1608,0
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)
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*21 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "CS1_n"
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t "std_ulogic"
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o 5
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suid 27,0
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)
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)
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uid 2133,0
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)
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*22 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "RST_n"
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t "std_ulogic"
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o 6
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suid 28,0
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)
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)
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uid 2135,0
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)
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*23 (LogPort
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port (LogicalPort
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m 1
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decl (Decl
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n "busy"
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t "std_ulogic"
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o 10
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suid 29,0
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)
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)
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uid 2616,0
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)
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]
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)
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pdm (PhysicalDM
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displayShortBounds 1
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editShortBounds 1
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uid 34,0
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optionalChildren [
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*24 (Sheet
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sheetRow (SheetRow
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headerVa (MVa
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cellColor "49152,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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cellVa (MVa
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cellColor "65535,65535,65535"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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groupVa (MVa
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cellColor "39936,56832,65280"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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)
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emptyMRCItem *25 (MRCItem
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litem &1
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pos 13
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dimension 20
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)
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uid 36,0
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optionalChildren [
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*26 (MRCItem
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litem &2
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pos 0
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dimension 20
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uid 37,0
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)
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*27 (MRCItem
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litem &3
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pos 1
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dimension 23
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uid 38,0
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)
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*28 (MRCItem
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litem &4
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pos 2
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hidden 1
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dimension 20
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uid 39,0
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)
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*29 (MRCItem
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litem &14
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pos 4
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dimension 20
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uid 112,0
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)
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*30 (MRCItem
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litem &15
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pos 0
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dimension 20
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uid 114,0
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)
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*31 (MRCItem
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litem &16
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pos 1
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dimension 20
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uid 116,0
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)
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*32 (MRCItem
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litem &17
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pos 2
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dimension 20
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uid 118,0
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)
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*33 (MRCItem
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litem &18
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pos 3
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dimension 20
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uid 120,0
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)
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*34 (MRCItem
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litem &19
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pos 5
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dimension 20
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uid 797,0
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)
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*35 (MRCItem
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litem &20
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pos 6
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dimension 20
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uid 1607,0
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)
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*36 (MRCItem
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litem &21
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pos 7
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dimension 20
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uid 2132,0
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)
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*37 (MRCItem
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litem &22
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pos 8
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dimension 20
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uid 2134,0
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)
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*38 (MRCItem
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litem &23
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pos 9
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dimension 20
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uid 2615,0
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)
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]
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)
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sheetCol (SheetCol
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propVa (MVa
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cellColor "0,49152,49152"
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fontColor "0,0,0"
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font "Tahoma,10,0"
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textAngle 90
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)
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uid 40,0
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optionalChildren [
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*39 (MRCItem
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litem &5
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pos 0
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dimension 20
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uid 41,0
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)
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*40 (MRCItem
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litem &7
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pos 1
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dimension 50
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uid 42,0
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)
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*41 (MRCItem
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litem &8
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pos 2
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dimension 100
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uid 43,0
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)
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*42 (MRCItem
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litem &9
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pos 3
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dimension 50
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uid 44,0
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)
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*43 (MRCItem
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litem &10
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pos 4
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dimension 100
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uid 45,0
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)
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*44 (MRCItem
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litem &11
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pos 5
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dimension 100
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uid 46,0
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)
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*45 (MRCItem
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litem &12
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pos 6
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dimension 50
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uid 47,0
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)
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*46 (MRCItem
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litem &13
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pos 7
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dimension 80
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uid 48,0
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)
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]
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)
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fixedCol 4
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fixedRow 2
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name "Ports"
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uid 35,0
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vaOverrides [
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]
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)
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]
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)
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uid 20,0
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)
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genericsCommonDM (CommonDM
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ldm (LogicalDM
|
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emptyRow *47 (LEmptyRow
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)
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uid 50,0
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optionalChildren [
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*48 (RefLabelRowHdr
|
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)
|
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*49 (TitleRowHdr
|
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)
|
|
*50 (FilterRowHdr
|
|
)
|
|
*51 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*52 (RowExpandColHdr
|
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tm "RowExpandColHdrMgr"
|
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)
|
|
*53 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
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)
|
|
*54 (NameColHdr
|
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tm "GenericNameColHdrMgr"
|
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)
|
|
*55 (TypeColHdr
|
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tm "GenericTypeColHdrMgr"
|
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)
|
|
*56 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
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)
|
|
*57 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*58 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
*59 (LogGeneric
|
|
generic (GiElement
|
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name "baudRateDivide"
|
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type "integer"
|
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value "2"
|
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)
|
|
uid 149,0
|
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)
|
|
*60 (LogGeneric
|
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generic (GiElement
|
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name "asciiBitNb"
|
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type "positive"
|
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value "7"
|
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)
|
|
uid 805,0
|
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)
|
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]
|
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)
|
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pdm (PhysicalDM
|
|
displayShortBounds 1
|
|
editShortBounds 1
|
|
uid 62,0
|
|
optionalChildren [
|
|
*61 (Sheet
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|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
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)
|
|
cellVa (MVa
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cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
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font "Tahoma,10,0"
|
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)
|
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emptyMRCItem *62 (MRCItem
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litem &47
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pos 2
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dimension 20
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)
|
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uid 64,0
|
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optionalChildren [
|
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*63 (MRCItem
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litem &48
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pos 0
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dimension 20
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uid 65,0
|
|
)
|
|
*64 (MRCItem
|
|
litem &49
|
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pos 1
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dimension 23
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uid 66,0
|
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)
|
|
*65 (MRCItem
|
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litem &50
|
|
pos 2
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hidden 1
|
|
dimension 20
|
|
uid 67,0
|
|
)
|
|
*66 (MRCItem
|
|
litem &59
|
|
pos 0
|
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dimension 20
|
|
uid 150,0
|
|
)
|
|
*67 (MRCItem
|
|
litem &60
|
|
pos 1
|
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dimension 20
|
|
uid 804,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
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|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
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font "Tahoma,10,0"
|
|
textAngle 90
|
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)
|
|
uid 68,0
|
|
optionalChildren [
|
|
*68 (MRCItem
|
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litem &51
|
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pos 0
|
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dimension 20
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|
uid 69,0
|
|
)
|
|
*69 (MRCItem
|
|
litem &53
|
|
pos 1
|
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dimension 50
|
|
uid 70,0
|
|
)
|
|
*70 (MRCItem
|
|
litem &54
|
|
pos 2
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dimension 100
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uid 71,0
|
|
)
|
|
*71 (MRCItem
|
|
litem &55
|
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pos 3
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dimension 100
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|
uid 72,0
|
|
)
|
|
*72 (MRCItem
|
|
litem &56
|
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pos 4
|
|
dimension 50
|
|
uid 73,0
|
|
)
|
|
*73 (MRCItem
|
|
litem &57
|
|
pos 5
|
|
dimension 50
|
|
uid 74,0
|
|
)
|
|
*74 (MRCItem
|
|
litem &58
|
|
pos 6
|
|
dimension 80
|
|
uid 75,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 63,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 49,0
|
|
type 1
|
|
)
|
|
VExpander (VariableExpander
|
|
vvMap [
|
|
(vvPair
|
|
variable " "
|
|
value " "
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|
)
|
|
(vvPair
|
|
variable "HDLDir"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hdl"
|
|
)
|
|
(vvPair
|
|
variable "HDSDir"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds"
|
|
)
|
|
(vvPair
|
|
variable "SideDataDesignDir"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds\\lcd@controller\\symbol.sb.info"
|
|
)
|
|
(vvPair
|
|
variable "SideDataUserDir"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds\\lcd@controller\\symbol.sb.user"
|
|
)
|
|
(vvPair
|
|
variable "SourceDir"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds"
|
|
)
|
|
(vvPair
|
|
variable "appl"
|
|
value "HDL Designer"
|
|
)
|
|
(vvPair
|
|
variable "arch_name"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
|
|
)
|
|
(vvPair
|
|
variable "config"
|
|
value "%(unit)_%(view)_config"
|
|
)
|
|
(vvPair
|
|
variable "d"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds\\lcd@controller"
|
|
)
|
|
(vvPair
|
|
variable "d_logical"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds\\lcdController"
|
|
)
|
|
(vvPair
|
|
variable "date"
|
|
value "14.10.2019"
|
|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "Mon"
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "Monday"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "14"
|
|
)
|
|
(vvPair
|
|
variable "designName"
|
|
value "$DESIGN_NAME"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "lcdController"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_author"
|
|
value "silvan.zahno"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_date"
|
|
value "14.10.2019"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_host"
|
|
value "WE6996"
|
|
)
|
|
(vvPair
|
|
variable "graphical_source_time"
|
|
value "10:35:46"
|
|
)
|
|
(vvPair
|
|
variable "group"
|
|
value "UNKNOWN"
|
|
)
|
|
(vvPair
|
|
variable "host"
|
|
value "WE6996"
|
|
)
|
|
(vvPair
|
|
variable "language"
|
|
value "VHDL"
|
|
)
|
|
(vvPair
|
|
variable "library"
|
|
value "LCD"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_Concatenation"
|
|
value "$HDS_PROJECT_DIR/../libs/SPI/concat"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_HdsLintPlugin"
|
|
value "$HDS_PROJECT_DIR/../libs/SPI/designcheck"
|
|
)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
|
value "$SCRATCH_DIR/Libraries/LCD/work"
|
|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "10"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "lcdController"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "Oct"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "October"
|
|
)
|
|
(vvPair
|
|
variable "p"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds\\lcd@controller\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_chrono\\Libs\\Lcd\\hds\\lcdController\\symbol.sb"
|
|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds"
|
|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "task_ADMS"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_DesignCompilerPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_HDSPath"
|
|
value "$HDS_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEBinPath"
|
|
value "$ISE_HOME"
|
|
)
|
|
(vvPair
|
|
variable "task_ISEPath"
|
|
value "$SCRATCH_DIR\\$DESIGN_NAME\\$ISE_WORK_DIR"
|
|
)
|
|
(vvPair
|
|
variable "task_LeonardoPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_ModelSimPath"
|
|
value "$MODELSIM_HOME\\win32"
|
|
)
|
|
(vvPair
|
|
variable "task_NC"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_PrecisionRTLPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_QuestaSimPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "task_VCSPath"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "sb"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "10:35:46"
|
|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "lcdController"
|
|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "silvan.zahno"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2019.2 (Build 5)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "symbol"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2019"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "19"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "Vhdl2008LangMgr"
|
|
uid 19,0
|
|
optionalChildren [
|
|
*75 (SymbolBody
|
|
uid 8,0
|
|
optionalChildren [
|
|
*76 (CptPort
|
|
uid 76,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 77,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "7250,23625,8000,24375"
|
|
)
|
|
tg (CPTG
|
|
uid 78,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 79,0
|
|
va (VaSet
|
|
)
|
|
xt "9000,23400,12400,24600"
|
|
st "clock"
|
|
blo "9000,24400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 80,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "-28000,12600,-12500,13400"
|
|
st "clock : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 7
|
|
suid 1,0
|
|
)
|
|
)
|
|
)
|
|
*77 (CptPort
|
|
uid 81,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
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uid 82,0
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ro 90
|
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va (VaSet
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|
vasetType 1
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fg "0,65535,0"
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|
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|
|
xt "7250,25625,8000,26375"
|
|
)
|
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tg (CPTG
|
|
uid 83,0
|
|
ps "CptPortTextPlaceStrategy"
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|
stg "VerticalLayoutStrategy"
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f (Text
|
|
uid 84,0
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va (VaSet
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)
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xt "9000,25400,12300,26600"
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|
st "reset"
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|
blo "9000,26400"
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|
tm "CptPortNameMgr"
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|
)
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)
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dt (MLText
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uid 85,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "-28000,7800,-12500,8600"
|
|
st "reset : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 1
|
|
suid 2,0
|
|
)
|
|
)
|
|
)
|
|
*78 (CptPort
|
|
uid 86,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 87,0
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ro 90
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va (VaSet
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vasetType 1
|
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fg "0,65535,0"
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|
)
|
|
xt "24000,15625,24750,16375"
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|
)
|
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tg (CPTG
|
|
uid 88,0
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ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
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|
f (Text
|
|
uid 89,0
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va (VaSet
|
|
)
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xt "21100,15400,23000,16600"
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st "SI"
|
|
ju 2
|
|
blo "23000,16400"
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tm "CptPortNameMgr"
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|
)
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|
)
|
|
dt (MLText
|
|
uid 90,0
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va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "-28000,8600,-12500,9400"
|
|
st "SI : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "SI"
|
|
t "std_ulogic"
|
|
o 2
|
|
suid 3,0
|
|
)
|
|
)
|
|
)
|
|
*79 (CptPort
|
|
uid 91,0
|
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 92,0
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ro 90
|
|
va (VaSet
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vasetType 1
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fg "0,65535,0"
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|
)
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|
xt "24000,17625,24750,18375"
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)
|
|
tg (CPTG
|
|
uid 93,0
|
|
ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
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f (Text
|
|
uid 94,0
|
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va (VaSet
|
|
)
|
|
xt "20200,17400,23000,18600"
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st "SCL"
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ju 2
|
|
blo "23000,18400"
|
|
tm "CptPortNameMgr"
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|
)
|
|
)
|
|
dt (MLText
|
|
uid 95,0
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va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "-28000,9400,-12500,10200"
|
|
st "SCL : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "SCL"
|
|
t "std_ulogic"
|
|
o 3
|
|
suid 4,0
|
|
)
|
|
)
|
|
)
|
|
*80 (CptPort
|
|
uid 96,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 97,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "24000,19625,24750,20375"
|
|
)
|
|
tg (CPTG
|
|
uid 98,0
|
|
ps "CptPortTextPlaceStrategy"
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|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 99,0
|
|
va (VaSet
|
|
)
|
|
xt "20800,19400,23000,20600"
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st "A0"
|
|
ju 2
|
|
blo "23000,20400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 100,0
|
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va (VaSet
|
|
font "Courier New,8,0"
|
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)
|
|
xt "-28000,10200,-12500,11000"
|
|
st "A0 : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "A0"
|
|
t "std_ulogic"
|
|
o 4
|
|
suid 5,0
|
|
)
|
|
)
|
|
)
|
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*81 (CptPort
|
|
uid 799,0
|
|
ps "OnEdgeStrategy"
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shape (Triangle
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uid 800,0
|
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ro 90
|
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va (VaSet
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vasetType 1
|
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fg "0,65535,0"
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)
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xt "7250,15625,8000,16375"
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)
|
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tg (CPTG
|
|
uid 801,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
|
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uid 802,0
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va (VaSet
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|
)
|
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xt "9000,15400,12100,16600"
|
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st "ascii"
|
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blo "9000,16400"
|
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tm "CptPortNameMgr"
|
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)
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|
)
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dt (MLText
|
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uid 803,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "-28000,13400,3000,14200"
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st "ascii : IN std_ulogic_vector (asciiBitNb-1 downto 0) ;"
|
|
)
|
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thePort (LogicalPort
|
|
decl (Decl
|
|
n "ascii"
|
|
t "std_ulogic_vector"
|
|
b "(asciiBitNb-1 downto 0)"
|
|
o 8
|
|
suid 11,0
|
|
)
|
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)
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)
|
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*82 (CptPort
|
|
uid 1611,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 1612,0
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ro 90
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va (VaSet
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vasetType 1
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fg "0,65535,0"
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)
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xt "7250,17625,8000,18375"
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)
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tg (CPTG
|
|
uid 1613,0
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ps "CptPortTextPlaceStrategy"
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stg "VerticalLayoutStrategy"
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f (Text
|
|
uid 1614,0
|
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va (VaSet
|
|
)
|
|
xt "9000,17400,12100,18600"
|
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st "send"
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blo "9000,18400"
|
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tm "CptPortNameMgr"
|
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)
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)
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dt (MLText
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uid 1615,0
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va (VaSet
|
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font "Courier New,8,0"
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)
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xt "-28000,14200,-12500,15000"
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st "send : IN std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "send"
|
|
t "std_ulogic"
|
|
o 9
|
|
suid 21,0
|
|
)
|
|
)
|
|
)
|
|
*83 (CptPort
|
|
uid 2136,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2137,0
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ro 90
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va (VaSet
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vasetType 1
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)
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xt "24000,23625,24750,24375"
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)
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tg (CPTG
|
|
uid 2138,0
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ps "CptPortTextPlaceStrategy"
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stg "RightVerticalLayoutStrategy"
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f (Text
|
|
uid 2139,0
|
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va (VaSet
|
|
)
|
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xt "18900,23400,23000,24600"
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st "CS1_n"
|
|
ju 2
|
|
blo "23000,24400"
|
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
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uid 2140,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "-28000,11000,-12500,11800"
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st "CS1_n : OUT std_ulogic ;"
|
|
)
|
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thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "CS1_n"
|
|
t "std_ulogic"
|
|
o 5
|
|
suid 27,0
|
|
)
|
|
)
|
|
)
|
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*84 (CptPort
|
|
uid 2141,0
|
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ps "OnEdgeStrategy"
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shape (Triangle
|
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uid 2142,0
|
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ro 90
|
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va (VaSet
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vasetType 1
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fg "0,65535,0"
|
|
)
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|
xt "24000,21625,24750,22375"
|
|
)
|
|
tg (CPTG
|
|
uid 2143,0
|
|
ps "CptPortTextPlaceStrategy"
|
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stg "RightVerticalLayoutStrategy"
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f (Text
|
|
uid 2144,0
|
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va (VaSet
|
|
)
|
|
xt "19000,21400,23000,22600"
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st "RST_n"
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ju 2
|
|
blo "23000,22400"
|
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tm "CptPortNameMgr"
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)
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)
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dt (MLText
|
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uid 2145,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "-28000,11800,-12500,12600"
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st "RST_n : OUT std_ulogic ;"
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "RST_n"
|
|
t "std_ulogic"
|
|
o 6
|
|
suid 28,0
|
|
)
|
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)
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)
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*85 (CptPort
|
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uid 2617,0
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ps "OnEdgeStrategy"
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shape (Triangle
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uid 2618,0
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ro 270
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va (VaSet
|
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vasetType 1
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fg "0,65535,0"
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)
|
|
xt "7250,19625,8000,20375"
|
|
)
|
|
tg (CPTG
|
|
uid 2619,0
|
|
ps "CptPortTextPlaceStrategy"
|
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stg "VerticalLayoutStrategy"
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f (Text
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|
uid 2620,0
|
|
va (VaSet
|
|
)
|
|
xt "9000,19400,12100,20600"
|
|
st "busy"
|
|
blo "9000,20400"
|
|
tm "CptPortNameMgr"
|
|
)
|
|
)
|
|
dt (MLText
|
|
uid 2621,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
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)
|
|
xt "-28000,15000,-13500,15800"
|
|
st "busy : OUT std_ulogic "
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "busy"
|
|
t "std_ulogic"
|
|
o 10
|
|
suid 29,0
|
|
)
|
|
)
|
|
)
|
|
]
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|
shape (Rectangle
|
|
uid 148,0
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va (VaSet
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vasetType 1
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|
fg "0,65535,0"
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|
lineColor "0,32896,0"
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|
lineWidth 2
|
|
)
|
|
xt "8000,12000,24000,28000"
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|
)
|
|
oxt "15000,6000,33000,26000"
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biTextGroup (BiTextGroup
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uid 10,0
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ps "CenterOffsetStrategy"
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stg "VerticalLayoutStrategy"
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first (Text
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uid 11,0
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va (VaSet
|
|
font "Verdana,9,1"
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)
|
|
xt "8600,27800,11100,29000"
|
|
st "LCD"
|
|
blo "8600,28800"
|
|
)
|
|
second (Text
|
|
uid 12,0
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "8600,29000,16100,30200"
|
|
st "lcdController"
|
|
blo "8600,30000"
|
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)
|
|
)
|
|
gi *86 (GenericInterface
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|
uid 13,0
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ps "CenterOffsetStrategy"
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matrix (Matrix
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uid 14,0
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st "User:"
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blo "-30000,16800"
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)
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internalLabel (Text
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uid 6,0
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va (VaSet
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isHidden 1
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font "Verdana,9,1"
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)
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xt "-30000,5400,-21800,6600"
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st "Internal User:"
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blo "-30000,6400"
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)
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externalText (MLText
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uid 5,0
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va (VaSet
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font "Courier New,8,0"
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)
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xt "-28000,17000,-28000,17000"
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tm "SyDeclarativeTextMgr"
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internalText (MLText
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uid 7,0
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va (VaSet
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isHidden 1
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font "Courier New,8,0"
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)
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xt "-30000,5400,-30000,5400"
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tm "SyDeclarativeTextMgr"
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)
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)
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lastUid 2849,0
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okToSyncOnLoad 1
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OkToSyncGenericsOnLoad 1
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activeModelName "Symbol"
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)
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