mirror of
https://github.com/Klagarge/Cursor.git
synced 2024-11-26 19:23:27 +00:00
2753 lines
34 KiB
Plaintext
2753 lines
34 KiB
Plaintext
DocumentHdrVersion "1.1"
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Header (DocumentHdr
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version 2
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dialect 11
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dmPackageRefs [
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(DmPackageRef
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library "ieee"
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unitName "std_logic_1164"
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)
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(DmPackageRef
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library "ieee"
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unitName "numeric_std"
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)
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]
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instances [
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(Instance
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name "I1"
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duLibraryName "Cursor_test"
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duName "pulseWidthModulator_tester"
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elements [
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(GiElement
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name "counterBitNb"
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type "positive"
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value "counterBitNb"
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)
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]
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mwi 0
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uid 1774,0
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|
)
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(Instance
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name "I0"
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duLibraryName "Cursor"
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duName "pulseWidthModulator"
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elements [
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(GiElement
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name "counterBitNb"
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type "positive"
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|
value "counterBitNb"
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)
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|
]
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mwi 0
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uid 2122,0
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)
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]
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libraryRefs [
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"ieee"
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]
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)
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version "32.1"
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appVersion "2019.2 (Build 5)"
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noEmbeddedEditors 1
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model (BlockDiag
|
|
VExpander (VariableExpander
|
|
vvMap [
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|
(vvPair
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variable " "
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value " "
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)
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(vvPair
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variable "HDLDir"
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value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hdl"
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)
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(vvPair
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|
variable "HDSDir"
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|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
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|
)
|
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(vvPair
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|
variable "SideDataDesignDir"
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value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\struct.bd.info"
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|
)
|
|
(vvPair
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|
variable "SideDataUserDir"
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|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\struct.bd.user"
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)
|
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(vvPair
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|
variable "SourceDir"
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|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds"
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)
|
|
(vvPair
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|
variable "appl"
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value "HDL Designer"
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)
|
|
(vvPair
|
|
variable "arch_name"
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value "struct"
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)
|
|
(vvPair
|
|
variable "concat_file"
|
|
value "concatenated"
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|
)
|
|
(vvPair
|
|
variable "config"
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|
value "%(unit)_%(view)_config"
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)
|
|
(vvPair
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|
variable "d"
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|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb"
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)
|
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(vvPair
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variable "d_logical"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tb"
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)
|
|
(vvPair
|
|
variable "date"
|
|
value "11.11.2019"
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|
)
|
|
(vvPair
|
|
variable "day"
|
|
value "Mon"
|
|
)
|
|
(vvPair
|
|
variable "day_long"
|
|
value "Monday"
|
|
)
|
|
(vvPair
|
|
variable "dd"
|
|
value "11"
|
|
)
|
|
(vvPair
|
|
variable "entity_name"
|
|
value "pulseWidthModulator_tb"
|
|
)
|
|
(vvPair
|
|
variable "ext"
|
|
value "<TBD>"
|
|
)
|
|
(vvPair
|
|
variable "f"
|
|
value "struct.bd"
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|
)
|
|
(vvPair
|
|
variable "f_logical"
|
|
value "struct.bd"
|
|
)
|
|
(vvPair
|
|
variable "f_noext"
|
|
value "struct"
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|
)
|
|
(vvPair
|
|
variable "graphical_source_author"
|
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value "silvan.zahno"
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)
|
|
(vvPair
|
|
variable "graphical_source_date"
|
|
value "11.11.2019"
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)
|
|
(vvPair
|
|
variable "graphical_source_group"
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value "UNKNOWN"
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)
|
|
(vvPair
|
|
variable "graphical_source_host"
|
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value "WE6996"
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)
|
|
(vvPair
|
|
variable "graphical_source_time"
|
|
value "08:13:22"
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)
|
|
(vvPair
|
|
variable "group"
|
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value "UNKNOWN"
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)
|
|
(vvPair
|
|
variable "host"
|
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value "WE6996"
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|
)
|
|
(vvPair
|
|
variable "language"
|
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value "VHDL"
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)
|
|
(vvPair
|
|
variable "library"
|
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value "Cursor_test"
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)
|
|
(vvPair
|
|
variable "library_downstream_ModelSim"
|
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value "D:\\Users\\ELN_labs\\VHDL_comp"
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)
|
|
(vvPair
|
|
variable "library_downstream_ModelSimCompiler"
|
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value "$SCRATCH_DIR/Cursor_test/work"
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|
)
|
|
(vvPair
|
|
variable "mm"
|
|
value "11"
|
|
)
|
|
(vvPair
|
|
variable "module_name"
|
|
value "pulseWidthModulator_tb"
|
|
)
|
|
(vvPair
|
|
variable "month"
|
|
value "Nov"
|
|
)
|
|
(vvPair
|
|
variable "month_long"
|
|
value "November"
|
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)
|
|
(vvPair
|
|
variable "p"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulse@width@modulator_tb\\struct.bd"
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|
)
|
|
(vvPair
|
|
variable "p_logical"
|
|
value "C:\\work\\git\\Education\\eln\\projects\\solution\\eln_cursor\\Prefs\\..\\Cursor_test\\hds\\pulseWidthModulator_tb\\struct.bd"
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|
)
|
|
(vvPair
|
|
variable "package_name"
|
|
value "<Undefined Variable>"
|
|
)
|
|
(vvPair
|
|
variable "project_name"
|
|
value "hds"
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|
)
|
|
(vvPair
|
|
variable "series"
|
|
value "HDL Designer Series"
|
|
)
|
|
(vvPair
|
|
variable "this_ext"
|
|
value "bd"
|
|
)
|
|
(vvPair
|
|
variable "this_file"
|
|
value "struct"
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|
)
|
|
(vvPair
|
|
variable "this_file_logical"
|
|
value "struct"
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|
)
|
|
(vvPair
|
|
variable "time"
|
|
value "08:13:22"
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|
)
|
|
(vvPair
|
|
variable "unit"
|
|
value "pulseWidthModulator_tb"
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|
)
|
|
(vvPair
|
|
variable "user"
|
|
value "silvan.zahno"
|
|
)
|
|
(vvPair
|
|
variable "version"
|
|
value "2019.2 (Build 5)"
|
|
)
|
|
(vvPair
|
|
variable "view"
|
|
value "struct"
|
|
)
|
|
(vvPair
|
|
variable "year"
|
|
value "2019"
|
|
)
|
|
(vvPair
|
|
variable "yy"
|
|
value "19"
|
|
)
|
|
]
|
|
)
|
|
LanguageMgr "Vhdl2008LangMgr"
|
|
uid 198,0
|
|
optionalChildren [
|
|
*1 (Net
|
|
uid 1315,0
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 5
|
|
suid 1,0
|
|
)
|
|
declText (MLText
|
|
uid 1316,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "-5000,63800,11000,65000"
|
|
st "SIGNAL reset : std_ulogic"
|
|
)
|
|
)
|
|
*2 (Net
|
|
uid 1325,0
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 3
|
|
suid 2,0
|
|
)
|
|
declText (MLText
|
|
uid 1326,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "-5000,57800,11000,59000"
|
|
st "SIGNAL clock : std_ulogic"
|
|
)
|
|
)
|
|
*3 (Grouping
|
|
uid 1487,0
|
|
optionalChildren [
|
|
*4 (CommentText
|
|
uid 1489,0
|
|
shape (Rectangle
|
|
uid 1490,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "47000,60000,66000,62000"
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|
)
|
|
oxt "45000,22000,64000,24000"
|
|
text (MLText
|
|
uid 1491,0
|
|
va (VaSet
|
|
fg "0,0,32768"
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|
bg "0,0,32768"
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)
|
|
xt "47200,60400,62600,61600"
|
|
st "
|
|
<enter project name here>
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 18600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
)
|
|
*5 (CommentText
|
|
uid 1492,0
|
|
shape (Rectangle
|
|
uid 1493,0
|
|
sl 0
|
|
va (VaSet
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vasetType 1
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|
fg "65280,65280,46080"
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)
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|
xt "15000,60000,41000,62000"
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)
|
|
oxt "13000,22000,39000,24000"
|
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text (MLText
|
|
uid 1494,0
|
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va (VaSet
|
|
fg "32768,0,0"
|
|
font "Arial,12,1"
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|
)
|
|
xt "22250,60250,33750,61750"
|
|
st "
|
|
<company name>
|
|
"
|
|
ju 0
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 25600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
)
|
|
*6 (CommentText
|
|
uid 1495,0
|
|
shape (Rectangle
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|
uid 1496,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
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)
|
|
xt "20000,66000,41000,68000"
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)
|
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oxt "18000,28000,39000,30000"
|
|
text (MLText
|
|
uid 1497,0
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va (VaSet
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|
fg "0,0,32768"
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bg "0,0,32768"
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)
|
|
xt "20200,66400,38600,67600"
|
|
st "
|
|
by %user on %dd %month %year
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 20600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
)
|
|
*7 (CommentText
|
|
uid 1498,0
|
|
shape (Rectangle
|
|
uid 1499,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "41000,60000,47000,62000"
|
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)
|
|
oxt "39000,22000,45000,24000"
|
|
text (MLText
|
|
uid 1500,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
|
bg "0,0,32768"
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)
|
|
xt "41200,60400,45900,61600"
|
|
st "
|
|
Project:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 5600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
)
|
|
*8 (CommentText
|
|
uid 1501,0
|
|
shape (Rectangle
|
|
uid 1502,0
|
|
sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
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)
|
|
xt "20000,62000,41000,64000"
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)
|
|
oxt "18000,24000,39000,26000"
|
|
text (MLText
|
|
uid 1503,0
|
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va (VaSet
|
|
fg "0,0,32768"
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bg "0,0,32768"
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)
|
|
xt "20200,62400,35400,63600"
|
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st "
|
|
<enter diagram title here>
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 20600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
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)
|
|
*9 (CommentText
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|
uid 1504,0
|
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shape (Rectangle
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|
uid 1505,0
|
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sl 0
|
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va (VaSet
|
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vasetType 1
|
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fg "65280,65280,46080"
|
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)
|
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xt "15000,62000,20000,64000"
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)
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oxt "13000,24000,18000,26000"
|
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text (MLText
|
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uid 1506,0
|
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va (VaSet
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fg "0,0,32768"
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bg "0,0,32768"
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)
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xt "15200,62400,18600,63600"
|
|
st "
|
|
Title:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 4600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
)
|
|
*10 (CommentText
|
|
uid 1507,0
|
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shape (Rectangle
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uid 1508,0
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sl 0
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va (VaSet
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vasetType 1
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fg "65280,65280,46080"
|
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)
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xt "15000,64000,20000,66000"
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)
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oxt "13000,26000,18000,28000"
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text (MLText
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uid 1509,0
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va (VaSet
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fg "0,0,32768"
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bg "0,0,32768"
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)
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xt "15200,64400,18600,65600"
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st "
|
|
Path:
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"
|
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tm "CommentText"
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|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 4600
|
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)
|
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position 1
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ignorePrefs 1
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)
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uid 1510,0
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shape (Rectangle
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uid 1511,0
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sl 0
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va (VaSet
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vasetType 1
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fg "65280,65280,46080"
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)
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oxt "39000,24000,64000,30000"
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text (MLText
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va (VaSet
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fg "0,0,32768"
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bg "0,0,32768"
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st "
|
|
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|
"
|
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tm "CommentText"
|
|
wrapOption 3
|
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visibleHeight 5600
|
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visibleWidth 24600
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)
|
|
ignorePrefs 1
|
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)
|
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*12 (CommentText
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uid 1513,0
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shape (Rectangle
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uid 1514,0
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sl 0
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va (VaSet
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vasetType 1
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fg "65280,65280,46080"
|
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)
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)
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oxt "18000,26000,39000,28000"
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text (MLText
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uid 1515,0
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va (VaSet
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fg "0,0,32768"
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bg "0,0,32768"
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)
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|
|
st "
|
|
%library/%unit/%view
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 20600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
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)
|
|
*13 (CommentText
|
|
uid 1516,0
|
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shape (Rectangle
|
|
uid 1517,0
|
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sl 0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65280,65280,46080"
|
|
)
|
|
xt "15000,66000,20000,68000"
|
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)
|
|
oxt "13000,28000,18000,30000"
|
|
text (MLText
|
|
uid 1518,0
|
|
va (VaSet
|
|
fg "0,0,32768"
|
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bg "0,0,32768"
|
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)
|
|
xt "15200,66400,19500,67600"
|
|
st "
|
|
Edited:
|
|
"
|
|
tm "CommentText"
|
|
wrapOption 3
|
|
visibleHeight 1600
|
|
visibleWidth 4600
|
|
)
|
|
position 1
|
|
ignorePrefs 1
|
|
)
|
|
]
|
|
shape (GroupingShape
|
|
uid 1488,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineStyle 2
|
|
lineWidth 1
|
|
)
|
|
xt "15000,60000,66000,68000"
|
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)
|
|
oxt "13000,22000,64000,30000"
|
|
)
|
|
*14 (Blk
|
|
uid 1774,0
|
|
shape (Rectangle
|
|
uid 1775,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "39936,56832,65280"
|
|
lineColor "0,0,32768"
|
|
lineWidth 2
|
|
)
|
|
xt "4000,43000,56000,51000"
|
|
)
|
|
oxt "0,0,8000,10000"
|
|
ttg (MlTextGroup
|
|
uid 1776,0
|
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ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*15 (Text
|
|
uid 1777,0
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va (VaSet
|
|
font "Verdana,12,1"
|
|
)
|
|
xt "10600,45900,20200,47300"
|
|
st "Cursor_test"
|
|
blo "10600,47100"
|
|
tm "BdLibraryNameMgr"
|
|
)
|
|
*16 (Text
|
|
uid 1778,0
|
|
va (VaSet
|
|
font "Verdana,12,1"
|
|
)
|
|
xt "10600,47300,32100,48700"
|
|
st "pulseWidthModulator_tester"
|
|
blo "10600,48500"
|
|
tm "BlkNameMgr"
|
|
)
|
|
*17 (Text
|
|
uid 1779,0
|
|
va (VaSet
|
|
font "Verdana,12,1"
|
|
)
|
|
xt "10600,48700,13000,50100"
|
|
st "I1"
|
|
blo "10600,49900"
|
|
tm "InstanceNameMgr"
|
|
)
|
|
]
|
|
)
|
|
ga (GenericAssociation
|
|
uid 1780,0
|
|
ps "EdgeToEdgeStrategy"
|
|
matrix (Matrix
|
|
uid 1781,0
|
|
text (MLText
|
|
uid 1782,0
|
|
va (VaSet
|
|
font "Courier New,9,0"
|
|
)
|
|
xt "20000,53800,44000,55000"
|
|
st "counterBitNb = counterBitNb ( positive ) "
|
|
)
|
|
header ""
|
|
)
|
|
elements [
|
|
(GiElement
|
|
name "counterBitNb"
|
|
type "positive"
|
|
value "counterBitNb"
|
|
)
|
|
]
|
|
)
|
|
)
|
|
*18 (Net
|
|
uid 1963,0
|
|
decl (Decl
|
|
n "en"
|
|
t "std_ulogic"
|
|
o 4
|
|
suid 3,0
|
|
)
|
|
declText (MLText
|
|
uid 1964,0
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va (VaSet
|
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isHidden 1
|
|
font "Courier New,8,0"
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)
|
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xt "0,29600,16000,30400"
|
|
st "SIGNAL en : std_ulogic"
|
|
)
|
|
)
|
|
*19 (Net
|
|
uid 2092,0
|
|
decl (Decl
|
|
n "PWM"
|
|
t "std_ulogic"
|
|
o 1
|
|
suid 4,0
|
|
)
|
|
declText (MLText
|
|
uid 2093,0
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va (VaSet
|
|
isHidden 1
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,29600,16000,30400"
|
|
st "SIGNAL PWM : std_ulogic"
|
|
)
|
|
)
|
|
*20 (Net
|
|
uid 2094,0
|
|
decl (Decl
|
|
n "amplitude"
|
|
t "unsigned"
|
|
b "(counterBitNb-1 DOWNTO 0)"
|
|
o 2
|
|
suid 5,0
|
|
)
|
|
declText (MLText
|
|
uid 2095,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "0,29600,28000,30400"
|
|
st "SIGNAL amplitude : unsigned(counterBitNb-1 DOWNTO 0)"
|
|
)
|
|
)
|
|
*21 (SaComponent
|
|
uid 2122,0
|
|
optionalChildren [
|
|
*22 (CptPort
|
|
uid 2102,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2103,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "23250,30625,24000,31375"
|
|
)
|
|
tg (CPTG
|
|
uid 2104,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2105,0
|
|
va (VaSet
|
|
)
|
|
xt "25000,30500,28400,31700"
|
|
st "clock"
|
|
blo "25000,31500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 2
|
|
)
|
|
)
|
|
)
|
|
*23 (CptPort
|
|
uid 2106,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2107,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "40000,24625,40750,25375"
|
|
)
|
|
tg (CPTG
|
|
uid 2108,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "RightVerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2109,0
|
|
va (VaSet
|
|
)
|
|
xt "35800,24500,39000,25700"
|
|
st "PWM"
|
|
ju 2
|
|
blo "39000,25500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
m 1
|
|
decl (Decl
|
|
n "PWM"
|
|
t "std_ulogic"
|
|
o 5
|
|
)
|
|
)
|
|
)
|
|
*24 (CptPort
|
|
uid 2110,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2111,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "23250,24625,24000,25375"
|
|
)
|
|
tg (CPTG
|
|
uid 2112,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2113,0
|
|
va (VaSet
|
|
)
|
|
xt "25000,24500,30600,25700"
|
|
st "amplitude"
|
|
blo "25000,25500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "amplitude"
|
|
t "unsigned"
|
|
b "(counterBitNb-1 DOWNTO 0)"
|
|
o 1
|
|
)
|
|
)
|
|
)
|
|
*25 (CptPort
|
|
uid 2114,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2115,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "23250,26625,24000,27375"
|
|
)
|
|
tg (CPTG
|
|
uid 2116,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2117,0
|
|
va (VaSet
|
|
)
|
|
xt "25000,26500,26900,27700"
|
|
st "en"
|
|
blo "25000,27500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "en"
|
|
t "std_ulogic"
|
|
o 3
|
|
)
|
|
)
|
|
)
|
|
*26 (CptPort
|
|
uid 2118,0
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
uid 2119,0
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "23250,32625,24000,33375"
|
|
)
|
|
tg (CPTG
|
|
uid 2120,0
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
uid 2121,0
|
|
va (VaSet
|
|
)
|
|
xt "25000,32500,28300,33700"
|
|
st "reset"
|
|
blo "25000,33500"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 4
|
|
)
|
|
)
|
|
)
|
|
]
|
|
shape (Rectangle
|
|
uid 2123,0
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
lineColor "0,32896,0"
|
|
lineWidth 2
|
|
)
|
|
xt "24000,21000,40000,35000"
|
|
)
|
|
oxt "-850,0,8850,10000"
|
|
ttg (MlTextGroup
|
|
uid 2124,0
|
|
ps "CenterOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*27 (Text
|
|
uid 2125,0
|
|
va (VaSet
|
|
)
|
|
xt "24100,35000,28200,36200"
|
|
st "Cursor"
|
|
blo "24100,36000"
|
|
tm "BdLibraryNameMgr"
|
|
)
|
|
*28 (Text
|
|
uid 2126,0
|
|
va (VaSet
|
|
)
|
|
xt "24100,36000,36000,37200"
|
|
st "pulseWidthModulator"
|
|
blo "24100,37000"
|
|
tm "CptNameMgr"
|
|
)
|
|
*29 (Text
|
|
uid 2127,0
|
|
va (VaSet
|
|
)
|
|
xt "24100,37000,26000,38200"
|
|
st "I0"
|
|
blo "24100,38000"
|
|
tm "InstanceNameMgr"
|
|
)
|
|
]
|
|
)
|
|
ga (GenericAssociation
|
|
uid 2128,0
|
|
ps "EdgeToEdgeStrategy"
|
|
matrix (Matrix
|
|
uid 2129,0
|
|
text (MLText
|
|
uid 2130,0
|
|
va (VaSet
|
|
font "Courier New,8,0"
|
|
)
|
|
xt "24000,38600,48000,39400"
|
|
st "counterBitNb = counterBitNb ( positive ) "
|
|
)
|
|
header ""
|
|
)
|
|
elements [
|
|
(GiElement
|
|
name "counterBitNb"
|
|
type "positive"
|
|
value "counterBitNb"
|
|
)
|
|
]
|
|
)
|
|
portVis (PortSigDisplay
|
|
sTC 0
|
|
)
|
|
archFileType "UNKNOWN"
|
|
)
|
|
*30 (Wire
|
|
uid 1317,0
|
|
shape (OrthoPolyLine
|
|
uid 1318,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "20000,33000,23250,43000"
|
|
pts [
|
|
"23250,33000"
|
|
"20000,33000"
|
|
"20000,43000"
|
|
]
|
|
)
|
|
start &26
|
|
end &14
|
|
sat 32
|
|
eat 2
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 1321,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 1322,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "20000,31600,24100,33000"
|
|
st "reset"
|
|
blo "20000,32800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &1
|
|
)
|
|
*31 (Wire
|
|
uid 1327,0
|
|
shape (OrthoPolyLine
|
|
uid 1328,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "18000,31000,23250,43000"
|
|
pts [
|
|
"23250,31000"
|
|
"18000,31000"
|
|
"18000,43000"
|
|
]
|
|
)
|
|
start &22
|
|
end &14
|
|
sat 32
|
|
eat 2
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 1331,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 1332,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "20000,29600,23800,31000"
|
|
st "clock"
|
|
blo "20000,30800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &2
|
|
)
|
|
*32 (Wire
|
|
uid 1965,0
|
|
shape (OrthoPolyLine
|
|
uid 1966,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "14000,27000,23250,43000"
|
|
pts [
|
|
"23250,27000"
|
|
"14000,27000"
|
|
"14000,43000"
|
|
]
|
|
)
|
|
start &25
|
|
end &14
|
|
sat 32
|
|
eat 2
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 1969,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 1970,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "20250,25600,22650,27000"
|
|
st "en"
|
|
blo "20250,26800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &18
|
|
)
|
|
*33 (Wire
|
|
uid 2005,0
|
|
shape (OrthoPolyLine
|
|
uid 2006,0
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
xt "40750,25000,48000,43000"
|
|
pts [
|
|
"40750,25000"
|
|
"48000,25000"
|
|
"48000,43000"
|
|
]
|
|
)
|
|
start &23
|
|
end &14
|
|
sat 32
|
|
eat 1
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 2009,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 2010,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "42750,23600,46650,25000"
|
|
st "PWM"
|
|
blo "42750,24800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &19
|
|
)
|
|
*34 (Wire
|
|
uid 2096,0
|
|
shape (OrthoPolyLine
|
|
uid 2097,0
|
|
va (VaSet
|
|
vasetType 3
|
|
lineWidth 2
|
|
)
|
|
xt "12000,25000,23250,43000"
|
|
pts [
|
|
"23250,25000"
|
|
"12000,25000"
|
|
"12000,43000"
|
|
]
|
|
)
|
|
start &24
|
|
end &14
|
|
sat 32
|
|
eat 2
|
|
sty 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
uid 2100,0
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
uid 2101,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "16250,23600,23250,25000"
|
|
st "amplitude"
|
|
blo "16250,24800"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
on &20
|
|
)
|
|
]
|
|
bg "65535,65535,65535"
|
|
grid (Grid
|
|
origin "0,0"
|
|
isVisible 1
|
|
isActive 1
|
|
xSpacing 1000
|
|
xySpacing 1000
|
|
xShown 1
|
|
yShown 1
|
|
color "32768,32768,32768"
|
|
)
|
|
packageList *35 (PackageList
|
|
uid 187,0
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*36 (Text
|
|
uid 1297,0
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "-7000,19600,2500,21000"
|
|
st "Package List"
|
|
blo "-7000,20800"
|
|
)
|
|
*37 (MLText
|
|
uid 1298,0
|
|
va (VaSet
|
|
)
|
|
xt "-7000,21000,10500,24600"
|
|
st "LIBRARY ieee;
|
|
USE ieee.std_logic_1164.all;
|
|
USE ieee.numeric_std.all;"
|
|
tm "PackageList"
|
|
)
|
|
]
|
|
)
|
|
compDirBlock (MlTextGroup
|
|
uid 190,0
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*38 (Text
|
|
uid 191,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "arial,10,1"
|
|
)
|
|
xt "20000,0,31000,1200"
|
|
st "Compiler Directives"
|
|
blo "20000,1000"
|
|
)
|
|
*39 (Text
|
|
uid 192,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "arial,10,1"
|
|
)
|
|
xt "20000,1400,33000,2600"
|
|
st "Pre-module directives:"
|
|
blo "20000,2400"
|
|
)
|
|
*40 (MLText
|
|
uid 193,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "arial,10,0"
|
|
)
|
|
xt "20000,2800,30400,5400"
|
|
st "`resetall
|
|
`timescale 1ns/10ps"
|
|
tm "BdCompilerDirectivesTextMgr"
|
|
)
|
|
*41 (Text
|
|
uid 194,0
|
|
va (VaSet
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)
|
|
s (Text
|
|
va (VaSet
|
|
)
|
|
xt "3000,500,3000,500"
|
|
blo "3000,500"
|
|
tm "SignalTypeMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultPortIoBuffer (PortIoBuffer
|
|
shape (CompositeShape
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "0,0,32768"
|
|
)
|
|
optionalChildren [
|
|
(Hexagon
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|
sl 0
|
|
xt "500,-375,2000,375"
|
|
)
|
|
(Line
|
|
sl 0
|
|
xt "0,0,500,0"
|
|
pts [
|
|
"0,0"
|
|
"500,0"
|
|
]
|
|
)
|
|
]
|
|
)
|
|
tg (WTG
|
|
ps "PortIoTextPlaceStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
isHidden 1
|
|
)
|
|
xt "3000,500,3000,500"
|
|
blo "3000,500"
|
|
tm "WireNameMgr"
|
|
)
|
|
s (Text
|
|
va (VaSet
|
|
)
|
|
xt "3000,500,3000,500"
|
|
blo "3000,500"
|
|
tm "SignalTypeMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultSignal (Wire
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,0,2600,1400"
|
|
st "sig0"
|
|
blo "0,1200"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultBus (Wire
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
lineWidth 2
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
sty 1
|
|
stc 0
|
|
st 0
|
|
sf 1
|
|
si 0
|
|
tg (WTG
|
|
ps "ConnStartEndStrategy"
|
|
stg "STSignalDisplayStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,0,3900,1400"
|
|
st "dbus0"
|
|
blo "0,1200"
|
|
tm "WireNameMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultBundle (Bundle
|
|
shape (OrthoPolyLine
|
|
va (VaSet
|
|
vasetType 3
|
|
lineColor "32768,0,0"
|
|
lineStyle 3
|
|
lineWidth 2
|
|
)
|
|
pts [
|
|
"0,0"
|
|
"0,0"
|
|
]
|
|
)
|
|
ss 0
|
|
es 0
|
|
sat 32
|
|
eat 32
|
|
textGroup (BiTextGroup
|
|
ps "ConnStartEndStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,0,5100,1400"
|
|
st "bundle0"
|
|
blo "0,1200"
|
|
tm "BundleNameMgr"
|
|
)
|
|
second (MLText
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,1400,1800,2800"
|
|
st "()"
|
|
tm "BundleContentsMgr"
|
|
)
|
|
)
|
|
bundleNet &0
|
|
)
|
|
defaultPortMapFrame (PortMapFrame
|
|
ps "PortMapFrameStrategy"
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "0,0,32768"
|
|
lineWidth 2
|
|
)
|
|
xt "0,0,10000,12000"
|
|
)
|
|
portMapText (BiTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
first (MLText
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,0,5900,1400"
|
|
st "Auto list"
|
|
)
|
|
second (MLText
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,1400,11800,2800"
|
|
st "User defined list"
|
|
tm "PortMapTextMgr"
|
|
)
|
|
)
|
|
)
|
|
defaultGenFrame (Frame
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "26368,26368,26368"
|
|
lineStyle 2
|
|
lineWidth 2
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,-1400,18500,-200"
|
|
st "g0: FOR i IN 0 TO n GENERATE"
|
|
tm "FrameTitleTextMgr"
|
|
)
|
|
)
|
|
seqNum (FrameSequenceNumber
|
|
ps "TopLeftStrategy"
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "50,50,1050,1750"
|
|
)
|
|
num (Text
|
|
va (VaSet
|
|
)
|
|
xt "200,300,600,1300"
|
|
st "1"
|
|
blo "200,1100"
|
|
tm "FrameSeqNumMgr"
|
|
)
|
|
)
|
|
decls (MlTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*62 (Text
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "11800,20000,22600,21200"
|
|
st "Frame Declarations"
|
|
blo "11800,21000"
|
|
)
|
|
*63 (MLText
|
|
va (VaSet
|
|
)
|
|
xt "11800,21200,11800,21200"
|
|
tm "BdFrameDeclTextMgr"
|
|
)
|
|
]
|
|
)
|
|
)
|
|
defaultBlockFrame (Frame
|
|
shape (RectFrame
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
lineColor "26368,26368,26368"
|
|
lineStyle 1
|
|
lineWidth 2
|
|
)
|
|
xt "0,0,20000,20000"
|
|
)
|
|
title (TextAssociate
|
|
ps "TopLeftStrategy"
|
|
text (MLText
|
|
va (VaSet
|
|
)
|
|
xt "0,-1400,11000,-200"
|
|
st "b0: BLOCK (guard)"
|
|
tm "FrameTitleTextMgr"
|
|
)
|
|
)
|
|
seqNum (FrameSequenceNumber
|
|
ps "TopLeftStrategy"
|
|
shape (Rectangle
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "50,50,1050,1750"
|
|
)
|
|
num (Text
|
|
va (VaSet
|
|
)
|
|
xt "200,300,600,1300"
|
|
st "1"
|
|
blo "200,1100"
|
|
tm "FrameSeqNumMgr"
|
|
)
|
|
)
|
|
decls (MlTextGroup
|
|
ps "BottomRightOffsetStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
textVec [
|
|
*64 (Text
|
|
va (VaSet
|
|
font "Verdana,9,1"
|
|
)
|
|
xt "11800,20000,22600,21200"
|
|
st "Frame Declarations"
|
|
blo "11800,21000"
|
|
)
|
|
*65 (MLText
|
|
va (VaSet
|
|
)
|
|
xt "11800,21200,11800,21200"
|
|
tm "BdFrameDeclTextMgr"
|
|
)
|
|
]
|
|
)
|
|
style 3
|
|
)
|
|
defaultSaCptPort (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Triangle
|
|
ro 90
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "0,65535,0"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,750,2600,2150"
|
|
st "Port"
|
|
blo "0,1950"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
decl (Decl
|
|
n "Port"
|
|
t ""
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultSaCptPortBuffer (CptPort
|
|
ps "OnEdgeStrategy"
|
|
shape (Diamond
|
|
va (VaSet
|
|
vasetType 1
|
|
fg "65535,65535,65535"
|
|
)
|
|
xt "0,0,750,750"
|
|
)
|
|
tg (CPTG
|
|
ps "CptPortTextPlaceStrategy"
|
|
stg "VerticalLayoutStrategy"
|
|
f (Text
|
|
va (VaSet
|
|
font "Verdana,12,0"
|
|
)
|
|
xt "0,750,2600,2150"
|
|
st "Port"
|
|
blo "0,1950"
|
|
)
|
|
)
|
|
thePort (LogicalPort
|
|
m 3
|
|
decl (Decl
|
|
n "Port"
|
|
t ""
|
|
o 0
|
|
)
|
|
)
|
|
)
|
|
defaultDeclText (MLText
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,9,0"
|
|
)
|
|
)
|
|
archDeclarativeBlock (BdArchDeclBlock
|
|
uid 1,0
|
|
stg "BdArchDeclBlockLS"
|
|
declLabel (Text
|
|
uid 2,0
|
|
va (VaSet
|
|
font "Verdana,10,1"
|
|
)
|
|
xt "-7000,55400,1600,56600"
|
|
st "Declarations"
|
|
blo "-7000,56400"
|
|
)
|
|
portLabel (Text
|
|
uid 3,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,10,1"
|
|
)
|
|
xt "-7000,56600,-2800,57800"
|
|
st "Ports:"
|
|
blo "-7000,57600"
|
|
)
|
|
preUserLabel (Text
|
|
uid 4,0
|
|
va (VaSet
|
|
font "Verdana,10,1"
|
|
)
|
|
xt "-7000,56600,-1000,57800"
|
|
st "Pre User:"
|
|
blo "-7000,57600"
|
|
)
|
|
preUserText (MLText
|
|
uid 5,0
|
|
va (VaSet
|
|
font "Courier New,10,0"
|
|
)
|
|
xt "-5000,57800,19000,59000"
|
|
st "constant counterBitNb: positive := 8;"
|
|
tm "BdDeclarativeTextMgr"
|
|
)
|
|
diagSignalLabel (Text
|
|
uid 6,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,10,1"
|
|
)
|
|
xt "-7000,56600,4000,57800"
|
|
st "Diagram Signals:"
|
|
blo "-7000,57600"
|
|
)
|
|
postUserLabel (Text
|
|
uid 7,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Verdana,10,1"
|
|
)
|
|
xt "-7000,56600,300,57800"
|
|
st "Post User:"
|
|
blo "-7000,57600"
|
|
)
|
|
postUserText (MLText
|
|
uid 8,0
|
|
va (VaSet
|
|
isHidden 1
|
|
font "Courier New,10,0"
|
|
)
|
|
xt "-5000,71000,-5000,71000"
|
|
tm "BdDeclarativeTextMgr"
|
|
)
|
|
)
|
|
commonDM (CommonDM
|
|
ldm (LogicalDM
|
|
suid 5,0
|
|
usingSuid 1
|
|
emptyRow *66 (LEmptyRow
|
|
)
|
|
uid 2142,0
|
|
optionalChildren [
|
|
*67 (RefLabelRowHdr
|
|
)
|
|
*68 (TitleRowHdr
|
|
)
|
|
*69 (FilterRowHdr
|
|
)
|
|
*70 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*71 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*72 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*73 (NameColHdr
|
|
tm "BlockDiagramNameColHdrMgr"
|
|
)
|
|
*74 (ModeColHdr
|
|
tm "BlockDiagramModeColHdrMgr"
|
|
)
|
|
*75 (TypeColHdr
|
|
tm "BlockDiagramTypeColHdrMgr"
|
|
)
|
|
*76 (BoundsColHdr
|
|
tm "BlockDiagramBoundsColHdrMgr"
|
|
)
|
|
*77 (InitColHdr
|
|
tm "BlockDiagramInitColHdrMgr"
|
|
)
|
|
*78 (EolColHdr
|
|
tm "BlockDiagramEolColHdrMgr"
|
|
)
|
|
*79 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "reset"
|
|
t "std_ulogic"
|
|
o 5
|
|
suid 1,0
|
|
)
|
|
)
|
|
uid 2131,0
|
|
)
|
|
*80 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "clock"
|
|
t "std_ulogic"
|
|
o 3
|
|
suid 2,0
|
|
)
|
|
)
|
|
uid 2133,0
|
|
)
|
|
*81 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "en"
|
|
t "std_ulogic"
|
|
o 4
|
|
suid 3,0
|
|
)
|
|
)
|
|
uid 2135,0
|
|
)
|
|
*82 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "PWM"
|
|
t "std_ulogic"
|
|
o 1
|
|
suid 4,0
|
|
)
|
|
)
|
|
uid 2137,0
|
|
)
|
|
*83 (LeafLogPort
|
|
port (LogicalPort
|
|
m 4
|
|
decl (Decl
|
|
n "amplitude"
|
|
t "unsigned"
|
|
b "(counterBitNb-1 DOWNTO 0)"
|
|
o 2
|
|
suid 5,0
|
|
)
|
|
)
|
|
uid 2139,0
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
uid 2155,0
|
|
optionalChildren [
|
|
*84 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *85 (MRCItem
|
|
litem &66
|
|
pos 3
|
|
dimension 20
|
|
)
|
|
uid 2157,0
|
|
optionalChildren [
|
|
*86 (MRCItem
|
|
litem &67
|
|
pos 0
|
|
dimension 20
|
|
uid 2158,0
|
|
)
|
|
*87 (MRCItem
|
|
litem &68
|
|
pos 1
|
|
dimension 23
|
|
uid 2159,0
|
|
)
|
|
*88 (MRCItem
|
|
litem &69
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 2160,0
|
|
)
|
|
*89 (MRCItem
|
|
litem &79
|
|
pos 0
|
|
dimension 20
|
|
uid 2132,0
|
|
)
|
|
*90 (MRCItem
|
|
litem &80
|
|
pos 1
|
|
dimension 20
|
|
uid 2134,0
|
|
)
|
|
*91 (MRCItem
|
|
litem &81
|
|
pos 2
|
|
dimension 20
|
|
uid 2136,0
|
|
)
|
|
*92 (MRCItem
|
|
litem &82
|
|
pos 3
|
|
dimension 20
|
|
uid 2138,0
|
|
)
|
|
*93 (MRCItem
|
|
litem &83
|
|
pos 4
|
|
dimension 20
|
|
uid 2140,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 2161,0
|
|
optionalChildren [
|
|
*94 (MRCItem
|
|
litem &70
|
|
pos 0
|
|
dimension 20
|
|
uid 2162,0
|
|
)
|
|
*95 (MRCItem
|
|
litem &72
|
|
pos 1
|
|
dimension 50
|
|
uid 2163,0
|
|
)
|
|
*96 (MRCItem
|
|
litem &73
|
|
pos 2
|
|
dimension 100
|
|
uid 2164,0
|
|
)
|
|
*97 (MRCItem
|
|
litem &74
|
|
pos 3
|
|
dimension 50
|
|
uid 2165,0
|
|
)
|
|
*98 (MRCItem
|
|
litem &75
|
|
pos 4
|
|
dimension 100
|
|
uid 2166,0
|
|
)
|
|
*99 (MRCItem
|
|
litem &76
|
|
pos 5
|
|
dimension 100
|
|
uid 2167,0
|
|
)
|
|
*100 (MRCItem
|
|
litem &77
|
|
pos 6
|
|
dimension 50
|
|
uid 2168,0
|
|
)
|
|
*101 (MRCItem
|
|
litem &78
|
|
pos 7
|
|
dimension 80
|
|
uid 2169,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 4
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 2156,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 2141,0
|
|
)
|
|
genericsCommonDM (CommonDM
|
|
ldm (LogicalDM
|
|
emptyRow *102 (LEmptyRow
|
|
)
|
|
uid 2171,0
|
|
optionalChildren [
|
|
*103 (RefLabelRowHdr
|
|
)
|
|
*104 (TitleRowHdr
|
|
)
|
|
*105 (FilterRowHdr
|
|
)
|
|
*106 (RefLabelColHdr
|
|
tm "RefLabelColHdrMgr"
|
|
)
|
|
*107 (RowExpandColHdr
|
|
tm "RowExpandColHdrMgr"
|
|
)
|
|
*108 (GroupColHdr
|
|
tm "GroupColHdrMgr"
|
|
)
|
|
*109 (NameColHdr
|
|
tm "GenericNameColHdrMgr"
|
|
)
|
|
*110 (TypeColHdr
|
|
tm "GenericTypeColHdrMgr"
|
|
)
|
|
*111 (InitColHdr
|
|
tm "GenericValueColHdrMgr"
|
|
)
|
|
*112 (PragmaColHdr
|
|
tm "GenericPragmaColHdrMgr"
|
|
)
|
|
*113 (EolColHdr
|
|
tm "GenericEolColHdrMgr"
|
|
)
|
|
]
|
|
)
|
|
pdm (PhysicalDM
|
|
uid 2183,0
|
|
optionalChildren [
|
|
*114 (Sheet
|
|
sheetRow (SheetRow
|
|
headerVa (MVa
|
|
cellColor "49152,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
cellVa (MVa
|
|
cellColor "65535,65535,65535"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
groupVa (MVa
|
|
cellColor "39936,56832,65280"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
)
|
|
emptyMRCItem *115 (MRCItem
|
|
litem &102
|
|
pos 3
|
|
dimension 20
|
|
)
|
|
uid 2185,0
|
|
optionalChildren [
|
|
*116 (MRCItem
|
|
litem &103
|
|
pos 0
|
|
dimension 20
|
|
uid 2186,0
|
|
)
|
|
*117 (MRCItem
|
|
litem &104
|
|
pos 1
|
|
dimension 23
|
|
uid 2187,0
|
|
)
|
|
*118 (MRCItem
|
|
litem &105
|
|
pos 2
|
|
hidden 1
|
|
dimension 20
|
|
uid 2188,0
|
|
)
|
|
]
|
|
)
|
|
sheetCol (SheetCol
|
|
propVa (MVa
|
|
cellColor "0,49152,49152"
|
|
fontColor "0,0,0"
|
|
font "Tahoma,10,0"
|
|
textAngle 90
|
|
)
|
|
uid 2189,0
|
|
optionalChildren [
|
|
*119 (MRCItem
|
|
litem &106
|
|
pos 0
|
|
dimension 20
|
|
uid 2190,0
|
|
)
|
|
*120 (MRCItem
|
|
litem &108
|
|
pos 1
|
|
dimension 50
|
|
uid 2191,0
|
|
)
|
|
*121 (MRCItem
|
|
litem &109
|
|
pos 2
|
|
dimension 100
|
|
uid 2192,0
|
|
)
|
|
*122 (MRCItem
|
|
litem &110
|
|
pos 3
|
|
dimension 100
|
|
uid 2193,0
|
|
)
|
|
*123 (MRCItem
|
|
litem &111
|
|
pos 4
|
|
dimension 50
|
|
uid 2194,0
|
|
)
|
|
*124 (MRCItem
|
|
litem &112
|
|
pos 5
|
|
dimension 50
|
|
uid 2195,0
|
|
)
|
|
*125 (MRCItem
|
|
litem &113
|
|
pos 6
|
|
dimension 80
|
|
uid 2196,0
|
|
)
|
|
]
|
|
)
|
|
fixedCol 3
|
|
fixedRow 2
|
|
name "Ports"
|
|
uid 2184,0
|
|
vaOverrides [
|
|
]
|
|
)
|
|
]
|
|
)
|
|
uid 2170,0
|
|
type 1
|
|
)
|
|
)
|