16 lines
283 B
Plaintext
16 lines
283 B
Plaintext
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-- VHDL Entity SplineInterpolator_test.sineGen_tb.symbol
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--
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-- Created:
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-- by - francois.francois (Aphelia)
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-- at - 13:00:04 02/19/19
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--
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-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
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--
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ENTITY sineGen_tb IS
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-- Declarations
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END sineGen_tb ;
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