SEm-Labos/06-07-08-09-SystemOnChip/Board/hds/@f@p@g@a_beamer/student@version.bd

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st "1"
blo "22400,14800"
tm "HdlTextNumberMgr"
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]
)
)
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uid 1070,0
decl (Decl
n "data"
t "std_logic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 14
suid 17,0
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declText (MLText
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va (VaSet
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xt "65000,14800,95000,15700"
st "SIGNAL data        : std_logic_vector(dataBitNb-1 DOWNTO 0)"
)
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*79 (PortIoOut
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shape (CompositeShape
uid 1158,0
va (VaSet
vasetType 1
fg "0,0,32768"
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uid 1159,0
sl 0
ro 270
xt "91500,39625,93000,40375"
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(Line
uid 1160,0
sl 0
ro 270
xt "91000,40000,91500,40000"
pts [
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)
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)
tg (WTG
uid 1161,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "94000,39300,98000,40700"
st "LED2"
blo "94000,40500"
tm "WireNameMgr"
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uid 1169,0
decl (Decl
n "LED2"
t "std_ulogic"
o 6
suid 18,0
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declText (MLText
uid 1170,0
va (VaSet
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xt "65000,6400,77500,7300"
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uid 1183,0
decl (Decl
n "LED4"
t "std_ulogic"
o 11
suid 19,0
)
declText (MLText
uid 1184,0
va (VaSet
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xt "65000,12400,81000,13300"
st "SIGNAL LED4        : std_ulogic"
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)
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commentText (CommentText
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shape (Rectangle
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fg "65535,65535,65535"
lineStyle 2
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xt "68000,40000,82000,45000"
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oxt "0,0,18000,5000"
text (MLText
uid 1193,0
va (VaSet
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xt "68200,40200,81400,44200"
st "
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LED4 <= '0';
spare <= (others => '0');
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tm "HdlTextMgr"
wrapOption 3
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)
)
)
]
shape (Rectangle
uid 1186,0
va (VaSet
vasetType 1
fg "65535,65535,32768"
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xt "67000,39000,83000,47000"
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oxt "0,0,8000,10000"
ttg (MlTextGroup
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ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
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uid 1188,0
va (VaSet
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xt "67400,47000,69000,48000"
st "eb2"
blo "67400,47800"
tm "HdlTextNameMgr"
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uid 1189,0
va (VaSet
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xt "67400,48000,68200,49000"
st "2"
blo "67400,48800"
tm "HdlTextNumberMgr"
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)
*86 (SaComponent
uid 1250,0
optionalChildren [
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uid 1202,0
ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
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fg "0,65535,0"
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xt "42250,42625,43000,43375"
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
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xt "44000,42400,47400,43600"
st "clock"
blo "44000,43400"
)
)
thePort (LogicalPort
decl (Decl
n "clock"
t "std_ulogic"
o 3
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)
*88 (CptPort
uid 1206,0
ps "OnEdgeStrategy"
shape (Triangle
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ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "42250,24625,43000,25375"
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
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xt "44000,24400,46900,25600"
st "addr"
blo "44000,25400"
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)
thePort (LogicalPort
decl (Decl
n "addr"
t "unsigned"
b "(addressBitNb-1 DOWNTO 0)"
o 2
)
)
)
*89 (CptPort
uid 1210,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1211,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "59000,24625,59750,25375"
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tg (CPTG
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ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1213,0
va (VaSet
font "courier,9,0"
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xt "55001,24400,58001,25600"
st "outX"
ju 2
blo "58001,25400"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "outX"
t "std_ulogic"
o 1
)
)
)
*90 (CptPort
uid 1214,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1215,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "42250,44625,43000,45375"
)
tg (CPTG
uid 1216,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
font "courier,9,0"
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xt "44000,44400,47300,45600"
st "reset"
blo "44000,45400"
)
)
thePort (LogicalPort
decl (Decl
n "reset"
t "std_ulogic"
o 4
)
)
)
*91 (CptPort
uid 1218,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1219,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "59000,26625,59750,27375"
)
tg (CPTG
uid 1220,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1221,0
va (VaSet
font "courier,9,0"
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xt "55001,26400,58001,27600"
st "outY"
ju 2
blo "58001,27400"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "outY"
t "std_ulogic"
o 5
)
)
)
*92 (CptPort
uid 1222,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1223,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "42250,26625,43000,27375"
)
tg (CPTG
uid 1224,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1225,0
va (VaSet
font "courier,9,0"
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xt "44000,26400,48000,27600"
st "dataIn"
blo "44000,27400"
)
)
thePort (LogicalPort
decl (Decl
n "dataIn"
t "std_ulogic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 6
)
)
)
*93 (CptPort
uid 1226,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1227,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
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xt "42250,32625,43000,33375"
)
tg (CPTG
uid 1228,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1229,0
va (VaSet
font "courier,9,0"
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xt "44000,32400,45700,33600"
st "rd"
blo "44000,33400"
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)
thePort (LogicalPort
decl (Decl
n "rd"
t "std_ulogic"
o 7
)
)
)
*94 (CptPort
uid 1230,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1231,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "42250,34625,43000,35375"
)
tg (CPTG
uid 1232,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1233,0
va (VaSet
font "courier,9,0"
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xt "44000,34400,46600,35600"
st "wrH"
blo "44000,35400"
)
)
thePort (LogicalPort
decl (Decl
n "wrH"
t "std_ulogic"
o 8
)
)
)
*95 (CptPort
uid 1234,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1235,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "42250,38625,43000,39375"
)
tg (CPTG
uid 1236,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
font "courier,9,0"
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xt "44000,38400,45900,39600"
st "cs"
blo "44000,39400"
)
)
thePort (LogicalPort
decl (Decl
n "cs"
t "std_ulogic"
o 9
)
)
)
*96 (CptPort
uid 1238,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1239,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "42250,36625,43000,37375"
)
tg (CPTG
uid 1240,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1241,0
va (VaSet
font "courier,9,0"
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xt "44000,36400,46400,37600"
st "wrL"
blo "44000,37400"
)
)
thePort (LogicalPort
decl (Decl
n "wrL"
t "std_ulogic"
o 10
)
)
)
*97 (CptPort
uid 1242,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1243,0
ro 270
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "42250,28625,43000,29375"
)
tg (CPTG
uid 1244,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
uid 1245,0
va (VaSet
font "courier,9,0"
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xt "44000,28400,48800,29600"
st "dataOut"
blo "44000,29400"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "dataOut"
t "std_logic_vector"
b "(dataBitNb-1 DOWNTO 0)"
o 11
)
)
)
*98 (CptPort
uid 1246,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1247,0
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "59000,42625,59750,43375"
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tg (CPTG
uid 1248,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1249,0
va (VaSet
font "courier,9,0"
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xt "53401,42400,58001,43600"
st "testOut"
ju 2
blo "58001,43400"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "testOut"
t "std_ulogic_vector"
b "(1 TO 16)"
o 12
)
)
)
]
shape (Rectangle
uid 1251,0
va (VaSet
vasetType 1
fg "0,65535,0"
bg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "43000,21000,59000,47000"
)
oxt "0,0,8000,10000"
ttg (MlTextGroup
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ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
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uid 1253,0
va (VaSet
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xt "43600,46800,46400,47800"
st "Curves"
blo "43600,47600"
tm "BdLibraryNameMgr"
)
*100 (Text
uid 1254,0
va (VaSet
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xt "43600,47800,49100,48800"
st "beamerPeriph"
blo "43600,48600"
tm "CptNameMgr"
)
*101 (Text
uid 1255,0
va (VaSet
)
xt "43600,48800,44600,49800"
st "I0"
blo "43600,49600"
tm "InstanceNameMgr"
)
]
)
ga (GenericAssociation
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ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1257,0
text (MLText
uid 1258,0
va (VaSet
font "courier,8,0"
)
xt "43000,50600,65500,52400"
st "dataBitNb    = dataBitNb       ( positive ) 
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)
header ""
)
elements [
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name "dataBitNb"
type "positive"
value "dataBitNb"
)
(GiElement
name "addressBitNb"
type "positive"
value "addressBitNb"
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]
)
ordering 1
portVis (PortSigDisplay
sTC 0
)
archFileType "UNKNOWN"
)
*102 (Net
uid 1259,0
decl (Decl
n "testOut"
t "std_ulogic_vector"
b "(1 TO 16)"
o 24
suid 20,0
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declText (MLText
uid 1260,0
va (VaSet
font "courier,8,0"
)
xt "65000,22800,89000,23700"
st "SIGNAL testOut     : std_ulogic_vector(1 TO 16)"
)
)
*103 (PortIoOut
uid 1267,0
shape (CompositeShape
uid 1268,0
va (VaSet
vasetType 1
fg "0,0,32768"
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optionalChildren [
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uid 1269,0
sl 0
ro 270
xt "91500,43625,93000,44375"
)
(Line
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sl 0
ro 270
xt "91000,44000,91500,44000"
pts [
"91000,44000"
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]
)
]
)
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "94000,43300,106400,44700"
st "spare : (1 TO 17)"
blo "94000,44500"
tm "WireNameMgr"
)
)
)
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decl (Decl
n "spare"
t "std_ulogic_vector"
b "(1 TO 17)"
o 7
suid 21,0
)
declText (MLText
uid 1280,0
va (VaSet
font "courier,8,0"
)
xt "65000,7200,85500,8100"
st "spare       : std_ulogic_vector(1 TO 17)"
)
)
*105 (SaComponent
uid 1307,0
optionalChildren [
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uid 1295,0
ps "OnEdgeStrategy"
shape (Triangle
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ro 270
va (VaSet
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isHidden 1
fg "0,65535,0"
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xt "51000,16625,51750,17375"
)
tg (CPTG
uid 1297,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
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va (VaSet
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font "courier,12,0"
)
xt "39400,16200,51000,17600"
st "in1 : std_uLogic"
ju 2
blo "51000,17400"
)
)
thePort (LogicalPort
decl (Decl
n "in1"
t "std_uLogic"
o 1
)
)
)
*107 (CptPort
uid 1299,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1300,0
ro 270
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,0"
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xt "51000,12625,51750,13375"
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tg (CPTG
uid 1301,0
ps "CptPortTextPlaceStrategy"
stg "RightVerticalLayoutStrategy"
f (Text
uid 1302,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "39400,12200,51000,13600"
st "in2 : std_uLogic"
ju 2
blo "51000,13400"
)
)
thePort (LogicalPort
decl (Decl
n "in2"
t "std_uLogic"
o 2
)
)
)
*108 (CptPort
uid 1303,0
ps "OnEdgeStrategy"
shape (Triangle
uid 1304,0
ro 270
va (VaSet
vasetType 1
isHidden 1
fg "0,65535,0"
)
xt "43300,14625,44050,15375"
)
tg (CPTG
uid 1305,0
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
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va (VaSet
isHidden 1
font "courier,12,0"
)
xt "44000,14250,56600,15650"
st "out1 : std_uLogic"
blo "44000,15450"
)
)
thePort (LogicalPort
m 1
decl (Decl
n "out1"
t "std_uLogic"
o 3
)
)
)
]
shape (And
uid 1308,0
ro 180
va (VaSet
vasetType 1
fg "0,65535,0"
lineColor "0,32896,0"
lineWidth 2
)
xt "44000,12000,51000,18000"
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showPorts 0
oxt "0,0,8000,10000"
ttg (MlTextGroup
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ps "CenterOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*109 (Text
uid 1310,0
va (VaSet
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xt "46600,12700,48900,13700"
st "gates"
blo "46600,13500"
tm "BdLibraryNameMgr"
)
*110 (Text
uid 1311,0
va (VaSet
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xt "46600,13700,48600,14700"
st "and2"
blo "46600,14500"
tm "CptNameMgr"
)
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uid 1312,0
va (VaSet
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xt "46600,13700,47600,14700"
st "I7"
blo "46600,14500"
tm "InstanceNameMgr"
)
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)
ga (GenericAssociation
uid 1313,0
ps "EdgeToEdgeStrategy"
matrix (Matrix
uid 1314,0
text (MLText
uid 1315,0
va (VaSet
isHidden 1
)
xt "44000,18400,59600,19400"
st "delay = 1 ns    ( time ) "
)
header ""
)
elements [
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type "time"
value "1 ns"
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]
)
portVis (PortSigDisplay
sN 0
sT 1
)
archFileType "UNKNOWN"
)
*112 (Net
uid 1334,0
decl (Decl
n "dataOE"
t "std_ulogic"
o 16
suid 22,0
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declText (MLText
uid 1335,0
va (VaSet
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xt "65000,16400,81000,17300"
st "SIGNAL dataOE      : std_ulogic"
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)
*113 (PortIoIn
uid 1516,0
shape (CompositeShape
uid 1517,0
va (VaSet
vasetType 1
fg "0,0,32768"
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optionalChildren [
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uid 1518,0
sl 0
ro 270
xt "17000,65625,18500,66375"
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(Line
uid 1519,0
sl 0
ro 270
xt "18500,66000,19000,66000"
pts [
"18500,66000"
"19000,66000"
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)
]
)
tg (WTG
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ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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font "courier,12,0"
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xt "6700,65500,16000,66900"
st "selSinCos_n"
ju 2
blo "16000,66700"
tm "WireNameMgr"
)
)
)
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uid 1528,0
decl (Decl
n "selSinCos_n"
t "std_ulogic"
o 23
suid 23,0
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declText (MLText
uid 1529,0
va (VaSet
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xt "65000,4800,77500,5700"
st "selSinCos_n : std_ulogic"
)
)
*115 (PortIoOut
uid 1530,0
shape (CompositeShape
uid 1531,0
va (VaSet
vasetType 1
fg "0,0,32768"
)
optionalChildren [
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uid 1532,0
sl 0
ro 270
xt "91500,47625,93000,48375"
)
(Line
uid 1533,0
sl 0
ro 270
xt "91000,48000,91500,48000"
pts [
"91000,48000"
"91500,48000"
]
)
]
)
tg (WTG
uid 1534,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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font "courier,12,0"
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xt "94000,47500,98000,48900"
st "LED1"
blo "94000,48700"
tm "WireNameMgr"
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uid 1542,0
decl (Decl
n "LED1"
t "std_ulogic"
o 24
suid 24,0
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declText (MLText
uid 1543,0
va (VaSet
font "courier,8,0"
)
xt "65000,5600,77500,6500"
st "LED1        : std_ulogic"
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)
*117 (PortIoOut
uid 1544,0
shape (CompositeShape
uid 1545,0
va (VaSet
vasetType 1
fg "0,0,32768"
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optionalChildren [
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uid 1546,0
sl 0
ro 270
xt "91500,49625,93000,50375"
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(Line
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sl 0
ro 270
xt "91000,50000,91500,50000"
pts [
"91000,50000"
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]
)
]
)
tg (WTG
uid 1548,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
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va (VaSet
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xt "94000,49500,97600,50900"
st "txd0"
blo "94000,50700"
tm "WireNameMgr"
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uid 1556,0
decl (Decl
n "txd0"
t "std_ulogic"
o 25
suid 25,0
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declText (MLText
uid 1557,0
va (VaSet
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xt "65000,8000,77500,8900"
st "txd0        : std_ulogic"
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)
*119 (PortIoIn
uid 1558,0
shape (CompositeShape
uid 1559,0
va (VaSet
vasetType 1
fg "0,0,32768"
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optionalChildren [
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uid 1560,0
sl 0
ro 270
xt "17000,67625,18500,68375"
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(Line
uid 1561,0
sl 0
ro 270
xt "18500,68000,19000,68000"
pts [
"18500,68000"
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]
)
]
)
tg (WTG
uid 1562,0
ps "PortIoTextPlaceStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1563,0
va (VaSet
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font "courier,12,0"
)
xt "12400,67500,16000,68900"
st "rxd0"
ju 2
blo "16000,68700"
tm "WireNameMgr"
)
)
)
*120 (Net
uid 1570,0
decl (Decl
n "rxd0"
t "std_ulogic"
o 26
suid 26,0
)
declText (MLText
uid 1571,0
va (VaSet
font "courier,8,0"
)
xt "65000,4000,77500,4900"
st "rxd0        : std_ulogic"
)
)
*121 (Wire
uid 15,0
shape (OrthoPolyLine
uid 16,0
va (VaSet
vasetType 3
)
xt "19000,43000,42250,58000"
pts [
"19000,58000"
"39000,58000"
"39000,43000"
"42250,43000"
]
)
start &1
end &87
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 19,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 20,0
va (VaSet
font "courier,12,0"
)
xt "19000,56600,22800,58000"
st "clock"
blo "19000,57800"
tm "WireNameMgr"
)
)
on &2
)
*122 (Wire
uid 29,0
shape (OrthoPolyLine
uid 30,0
va (VaSet
vasetType 3
)
xt "59750,27000,67000,27000"
pts [
"67000,27000"
"59750,27000"
]
)
start &3
end &91
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 33,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 34,0
va (VaSet
font "courier,12,0"
)
xt "62000,25600,65800,27000"
st "yOut"
blo "62000,26800"
tm "WireNameMgr"
)
)
on &27
)
*123 (Wire
uid 43,0
shape (OrthoPolyLine
uid 44,0
va (VaSet
vasetType 3
)
xt "19000,62000,24000,62000"
pts [
"19000,62000"
"24000,62000"
]
)
start &4
end &18
es 0
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 47,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 48,0
va (VaSet
font "courier,12,0"
)
xt "18000,60600,23800,62000"
st "reset_N"
blo "18000,61800"
tm "WireNameMgr"
)
)
on &24
)
*124 (Wire
uid 245,0
shape (OrthoPolyLine
uid 246,0
va (VaSet
vasetType 3
)
xt "29750,45000,42250,62000"
pts [
"29750,62000"
"41000,62000"
"41000,45000"
"42250,45000"
]
)
start &19
end &90
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 251,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 252,0
va (VaSet
font "courier,12,0"
)
xt "31000,60600,35100,62000"
st "reset"
blo "31000,61800"
tm "WireNameMgr"
)
)
on &5
)
*125 (Wire
uid 575,0
shape (OrthoPolyLine
uid 576,0
va (VaSet
vasetType 3
)
xt "59750,25000,67000,25000"
pts [
"67000,25000"
"59750,25000"
]
)
start &26
end &89
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 577,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 578,0
va (VaSet
font "courier,12,0"
)
xt "62000,23600,65800,25000"
st "xOut"
blo "62000,24800"
tm "WireNameMgr"
)
)
on &25
)
*126 (Wire
uid 900,0
shape (OrthoPolyLine
uid 901,0
va (VaSet
vasetType 3
)
xt "29750,31000,42250,33000"
pts [
"42250,33000"
"33000,33000"
"33000,31000"
"29750,31000"
]
)
start &93
end &51
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 902,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 903,0
va (VaSet
font "courier,12,0"
)
xt "31000,29600,33100,31000"
st "rd"
blo "31000,30800"
tm "WireNameMgr"
)
)
on &56
)
*127 (Wire
uid 906,0
shape (OrthoPolyLine
uid 907,0
va (VaSet
vasetType 3
)
xt "29750,35000,42250,38000"
pts [
"42250,35000"
"33000,35000"
"33000,38000"
"29750,38000"
]
)
start &94
end &44
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 908,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 909,0
va (VaSet
font "courier,12,0"
)
xt "31000,36600,34300,38000"
st "wrH"
blo "31000,37800"
tm "WireNameMgr"
)
)
on &57
)
*128 (Wire
uid 912,0
shape (OrthoPolyLine
uid 913,0
va (VaSet
vasetType 3
)
xt "29750,37000,42250,46000"
pts [
"42250,37000"
"35000,37000"
"35000,46000"
"29750,46000"
]
)
start &96
end &37
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 914,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 915,0
va (VaSet
font "courier,12,0"
)
xt "31000,44600,34100,46000"
st "wrL"
blo "31000,45800"
tm "WireNameMgr"
)
)
on &58
)
*129 (Wire
uid 918,0
shape (OrthoPolyLine
uid 919,0
va (VaSet
vasetType 3
)
xt "29750,39000,42250,54000"
pts [
"42250,39000"
"37000,39000"
"37000,54000"
"29750,54000"
]
)
start &95
end &30
sat 32
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 920,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 921,0
va (VaSet
font "courier,12,0"
)
xt "31000,52600,33100,54000"
st "cs"
blo "31000,53800"
tm "WireNameMgr"
)
)
on &59
)
*130 (Wire
uid 922,0
shape (OrthoPolyLine
uid 923,0
va (VaSet
vasetType 3
)
xt "19000,46000,24000,46000"
pts [
"24000,46000"
"19000,46000"
]
)
start &36
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 928,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 929,0
va (VaSet
font "courier,12,0"
)
xt "19000,44600,23000,46000"
st "nwr0"
blo "19000,45800"
tm "WireNameMgr"
)
)
on &61
)
*131 (Wire
uid 930,0
shape (OrthoPolyLine
uid 931,0
va (VaSet
vasetType 3
)
xt "19000,31000,24000,31000"
pts [
"24000,31000"
"19000,31000"
]
)
start &50
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 936,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 937,0
va (VaSet
font "courier,12,0"
)
xt "19000,29600,21900,31000"
st "nrd"
blo "19000,30800"
tm "WireNameMgr"
)
)
on &63
)
*132 (Wire
uid 938,0
shape (OrthoPolyLine
uid 939,0
va (VaSet
vasetType 3
)
xt "19000,54000,24000,54000"
pts [
"24000,54000"
"19000,54000"
]
)
start &29
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 944,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 945,0
va (VaSet
font "courier,12,0"
)
xt "19000,52600,21900,54000"
st "ncs"
blo "19000,53800"
tm "WireNameMgr"
)
)
on &60
)
*133 (Wire
uid 946,0
shape (OrthoPolyLine
uid 947,0
va (VaSet
vasetType 3
)
xt "19000,38000,24000,38000"
pts [
"24000,38000"
"19000,38000"
]
)
start &43
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 952,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 953,0
va (VaSet
font "courier,12,0"
)
xt "19000,36600,23000,38000"
st "nwr1"
blo "19000,37800"
tm "WireNameMgr"
)
)
on &62
)
*134 (Wire
uid 1027,0
shape (OrthoPolyLine
uid 1028,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "30750,21000,42250,29000"
pts [
"42250,29000"
"35000,29000"
"35000,21000"
"30750,21000"
]
)
start &97
end &66
sat 32
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1029,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1030,0
va (VaSet
font "courier,12,0"
)
xt "36250,27600,42250,29000"
st "dataOut"
blo "36250,28800"
tm "WireNameMgr"
)
)
on &71
)
*135 (Wire
uid 1033,0
shape (OrthoPolyLine
uid 1034,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "35000,11000,42250,27000"
pts [
"42250,27000"
"37000,27000"
"37000,11000"
"35000,11000"
]
)
start &92
end &74
sat 32
eat 2
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1037,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1038,0
va (VaSet
font "courier,12,0"
)
xt "37250,25600,42250,27000"
st "dataIn"
blo "37250,26800"
tm "WireNameMgr"
)
)
on &72
)
*136 (Wire
uid 1041,0
shape (OrthoPolyLine
uid 1042,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "19000,5000,42250,25000"
pts [
"42250,25000"
"38000,25000"
"38000,5000"
"19000,5000"
]
)
start &88
sat 32
eat 16
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1045,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1046,0
va (VaSet
font "courier,12,0"
)
xt "19000,3600,22700,5000"
st "addr"
blo "19000,4800"
tm "WireNameMgr"
)
)
on &73
)
*137 (Wire
uid 1062,0
optionalChildren [
*138 (BdJunction
uid 1084,0
ps "OnConnectorStrategy"
shape (Circle
uid 1085,0
va (VaSet
vasetType 1
)
xt "20600,15600,21400,16400"
radius 400
)
)
]
shape (OrthoPolyLine
uid 1063,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "19000,16000,23250,21000"
pts [
"23250,21000"
"21000,21000"
"21000,16000"
"19000,16000"
]
)
start &65
sat 32
eat 16
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1068,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1069,0
va (VaSet
font "courier,12,0"
)
xt "18000,13600,21700,15000"
st "data"
blo "18000,14800"
tm "WireNameMgr"
)
)
on &78
)
*139 (Wire
uid 1078,0
shape (OrthoPolyLine
uid 1079,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "21000,11000,23000,16000"
pts [
"21000,16000"
"21000,11000"
"23000,11000"
]
)
start &138
end &74
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1082,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1083,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "19000,9600,22700,11000"
st "data"
blo "19000,10800"
tm "WireNameMgr"
)
)
on &78
)
*140 (Wire
uid 1086,0
shape (OrthoPolyLine
uid 1087,0
va (VaSet
vasetType 3
)
xt "51000,13000,55000,13000"
pts [
"51000,13000"
"55000,13000"
]
)
start &107
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1092,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1093,0
va (VaSet
font "courier,12,0"
)
xt "53000,11600,55100,13000"
st "rd"
blo "53000,12800"
tm "WireNameMgr"
)
)
on &56
)
*141 (Wire
uid 1163,0
shape (OrthoPolyLine
uid 1164,0
va (VaSet
vasetType 3
)
xt "83000,40000,91000,40000"
pts [
"83000,40000"
"91000,40000"
]
)
start &82
end &79
sat 2
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1167,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1168,0
va (VaSet
font "courier,12,0"
)
xt "88000,38600,92000,40000"
st "LED2"
blo "88000,39800"
tm "WireNameMgr"
)
)
on &80
)
*142 (Wire
uid 1177,0
shape (OrthoPolyLine
uid 1178,0
va (VaSet
vasetType 3
)
xt "83000,42000,91000,42000"
pts [
"83000,42000"
"91000,42000"
]
)
start &82
sat 2
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1181,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1182,0
va (VaSet
font "courier,12,0"
)
xt "88000,40600,92000,42000"
st "LED4"
blo "88000,41800"
tm "WireNameMgr"
)
)
on &81
)
*143 (Wire
uid 1261,0
shape (OrthoPolyLine
uid 1262,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "59750,43000,67000,43000"
pts [
"59750,43000"
"67000,43000"
]
)
start &98
end &82
sat 32
eat 1
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1265,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1266,0
va (VaSet
font "courier,12,0"
)
xt "61750,41600,67350,43000"
st "testOut"
blo "61750,42800"
tm "WireNameMgr"
)
)
on &102
)
*144 (Wire
uid 1273,0
shape (OrthoPolyLine
uid 1274,0
va (VaSet
vasetType 3
lineWidth 2
)
xt "83000,44000,91000,44000"
pts [
"83000,44000"
"91000,44000"
]
)
start &82
end &103
sat 2
eat 32
sty 1
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1277,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1278,0
va (VaSet
font "courier,12,0"
)
xt "87000,42600,91400,44000"
st "spare"
blo "87000,43800"
tm "WireNameMgr"
)
)
on &104
)
*145 (Wire
uid 1330,0
shape (OrthoPolyLine
uid 1331,0
va (VaSet
vasetType 3
)
xt "27000,15000,44050,18250"
pts [
"44050,15000"
"27000,15000"
"27000,18250"
]
)
start &108
end &67
sat 32
eat 32
sf 1
si 0
tg (WTG
uid 1332,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1333,0
ro 270
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "48600,-1050,50000,12950"
st "dataOE : std_ulogic"
blo "49800,12950"
tm "WireNameMgr"
)
)
on &112
)
*146 (Wire
uid 1336,0
shape (OrthoPolyLine
uid 1337,0
va (VaSet
vasetType 3
)
xt "51000,17000,55000,17000"
pts [
"55000,17000"
"51000,17000"
]
)
end &106
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1342,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1343,0
va (VaSet
font "courier,12,0"
)
xt "53000,15600,55100,17000"
st "cs"
blo "53000,16800"
tm "WireNameMgr"
)
)
on &59
)
*147 (Wire
uid 1522,0
shape (OrthoPolyLine
uid 1523,0
va (VaSet
vasetType 3
)
xt "19000,66000,29000,66000"
pts [
"19000,66000"
"29000,66000"
]
)
start &113
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1526,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1527,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "21000,64600,30300,66000"
st "selSinCos_n"
blo "21000,65800"
tm "WireNameMgr"
)
)
on &114
)
*148 (Wire
uid 1536,0
shape (OrthoPolyLine
uid 1537,0
va (VaSet
vasetType 3
)
xt "81000,48000,91000,48000"
pts [
"81000,48000"
"91000,48000"
]
)
end &115
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1540,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1541,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "83000,46600,87000,48000"
st "LED1"
blo "83000,47800"
tm "WireNameMgr"
)
)
on &116
)
*149 (Wire
uid 1550,0
shape (OrthoPolyLine
uid 1551,0
va (VaSet
vasetType 3
)
xt "81000,50000,91000,50000"
pts [
"81000,50000"
"91000,50000"
]
)
end &117
sat 16
eat 32
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1554,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1555,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "83000,48600,86600,50000"
st "txd0"
blo "83000,49800"
tm "WireNameMgr"
)
)
on &118
)
*150 (Wire
uid 1564,0
shape (OrthoPolyLine
uid 1565,0
va (VaSet
vasetType 3
)
xt "19000,68000,29000,68000"
pts [
"19000,68000"
"29000,68000"
]
)
start &119
sat 32
eat 16
stc 0
st 0
sf 1
si 0
tg (WTG
uid 1568,0
ps "ConnStartEndStrategy"
stg "STSignalDisplayStrategy"
f (Text
uid 1569,0
va (VaSet
isHidden 1
font "courier,12,0"
)
xt "21000,66600,24600,68000"
st "rxd0"
blo "21000,67800"
tm "WireNameMgr"
)
)
on &120
)
]
bg "65535,65535,65535"
grid (Grid
origin "0,0"
isVisible 1
isActive 1
xSpacing 1000
xySpacing 1000
xShown 1
yShown 1
color "26368,26368,26368"
)
packageList *151 (PackageList
uid 84,0
stg "VerticalLayoutStrategy"
textVec [
*152 (Text
uid 85,0
va (VaSet
font "courier,8,1"
)
xt "-3000,0,2400,1000"
st "Package List"
blo "-3000,800"
)
*153 (MLText
uid 86,0
va (VaSet
)
xt "-3000,1000,15600,4000"
st "LIBRARY ieee;
  USE ieee.std_logic_1164.all;
  USE ieee.numeric_std.all;"
tm "PackageList"
)
]
)
compDirBlock (MlTextGroup
uid 87,0
stg "VerticalLayoutStrategy"
textVec [
*154 (Text
uid 88,0
va (VaSet
isHidden 1
font "courier,8,1"
)
xt "20000,0,28100,1000"
st "Compiler Directives"
blo "20000,800"
)
*155 (Text
uid 89,0
va (VaSet
isHidden 1
font "courier,8,1"
)
xt "20000,1000,29600,2000"
st "Pre-module directives:"
blo "20000,1800"
)
*156 (MLText
uid 90,0
va (VaSet
isHidden 1
)
xt "20000,2000,32000,4000"
st "`resetall
`timescale 1ns/10ps"
tm "BdCompilerDirectivesTextMgr"
)
*157 (Text
uid 91,0
va (VaSet
isHidden 1
font "courier,8,1"
)
xt "20000,4000,30100,5000"
st "Post-module directives:"
blo "20000,4800"
)
*158 (MLText
uid 92,0
va (VaSet
isHidden 1
)
xt "20000,0,20000,0"
tm "BdCompilerDirectivesTextMgr"
)
*159 (Text
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va (VaSet
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