SEm-Labos/02-SplineInterpolator/SplineInterpolator_test/hds/sine@gen_tb/struct.bd

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fg "65535,65535,65535"
lineColor "28160,28160,28160"
lineStyle 1
lineWidth 3
)
xt "0,0,20000,20000"
)
title (TextAssociate
ps "TopLeftStrategy"
text (MLText
va (VaSet
)
xt "0,-1100,11000,100"
st "b0: BLOCK (guard)"
tm "FrameTitleTextMgr"
)
)
seqNum (FrameSequenceNumber
ps "TopLeftStrategy"
shape (Rectangle
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "50,50,1050,1450"
)
num (Text
va (VaSet
)
xt "350,250,750,1250"
st "1"
blo "350,1050"
tm "FrameSeqNumMgr"
)
)
decls (MlTextGroup
ps "BottomRightOffsetStrategy"
stg "VerticalLayoutStrategy"
textVec [
*70 (Text
va (VaSet
font "Verdana,8,1"
)
xt "14100,20000,22000,21000"
st "Frame Declarations"
blo "14100,20800"
)
*71 (MLText
va (VaSet
)
xt "14100,21000,14100,21000"
tm "BdFrameDeclTextMgr"
)
]
)
style 3
)
defaultSaCptPort (CptPort
ps "OnEdgeStrategy"
shape (Triangle
ro 90
va (VaSet
vasetType 1
fg "0,65535,0"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1400,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultSaCptPortBuffer (CptPort
ps "OnEdgeStrategy"
shape (Diamond
va (VaSet
vasetType 1
fg "65535,65535,65535"
)
xt "0,0,750,750"
)
tg (CPTG
ps "CptPortTextPlaceStrategy"
stg "VerticalLayoutStrategy"
f (Text
va (VaSet
)
xt "0,750,1400,1750"
st "Port"
blo "0,1550"
)
)
thePort (LogicalPort
m 3
decl (Decl
n "Port"
t ""
o 0
)
)
)
defaultDeclText (MLText
va (VaSet
font "Verdana,8,0"
)
)
archDeclarativeBlock (BdArchDeclBlock
uid 1,0
stg "BdArchDeclBlockLS"
declLabel (Text
uid 2,0
va (VaSet
font "Verdana,8,1"
)
xt "0,41000,7000,42000"
st "Declarations"
blo "0,41800"
)
portLabel (Text
uid 3,0
va (VaSet
font "Verdana,8,1"
)
xt "0,42000,3400,43000"
st "Ports:"
blo "0,42800"
)
preUserLabel (Text
uid 4,0
va (VaSet
font "Verdana,8,1"
)
xt "0,43000,4800,44000"
st "Pre User:"
blo "0,43800"
)
preUserText (MLText
uid 5,0
va (VaSet
font "Verdana,8,0"
)
xt "2000,44000,21800,48000"
st "constant signalBitNb: positive := 16;
constant phaseBitNb: positive := 10;
constant clockFrequency: real := 60.0E6;
--constant clockFrequency: real := 66.0E6;"
tm "BdDeclarativeTextMgr"
)
diagSignalLabel (Text
uid 6,0
va (VaSet
font "Verdana,8,1"
)
xt "0,48000,9000,49000"
st "Diagram Signals:"
blo "0,48800"
)
postUserLabel (Text
uid 7,0
va (VaSet
isHidden 1
font "Verdana,8,1"
)
xt "0,41000,6000,42000"
st "Post User:"
blo "0,41800"
)
postUserText (MLText
uid 8,0
va (VaSet
isHidden 1
font "Verdana,8,0"
)
xt "0,41000,0,41000"
tm "BdDeclarativeTextMgr"
)
)
commonDM (CommonDM
ldm (LogicalDM
suid 8,0
usingSuid 1
emptyRow *72 (LEmptyRow
)
uid 1087,0
optionalChildren [
*73 (RefLabelRowHdr
)
*74 (TitleRowHdr
)
*75 (FilterRowHdr
)
*76 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*77 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*78 (GroupColHdr
tm "GroupColHdrMgr"
)
*79 (NameColHdr
tm "BlockDiagramNameColHdrMgr"
)
*80 (ModeColHdr
tm "BlockDiagramModeColHdrMgr"
)
*81 (TypeColHdr
tm "BlockDiagramTypeColHdrMgr"
)
*82 (BoundsColHdr
tm "BlockDiagramBoundsColHdrMgr"
)
*83 (InitColHdr
tm "BlockDiagramInitColHdrMgr"
)
*84 (EolColHdr
tm "BlockDiagramEolColHdrMgr"
)
*85 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "reset"
t "std_ulogic"
o 2
suid 1,0
)
)
uid 1070,0
)
*86 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "clock"
t "std_ulogic"
o 1
suid 2,0
)
)
uid 1072,0
)
*87 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "sine"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 4
suid 4,0
)
)
uid 1076,0
)
*88 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "triangle"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 7
suid 5,0
)
)
uid 1078,0
)
*89 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "square"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 5
suid 6,0
)
)
uid 1080,0
)
*90 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "sawtooth"
t "unsigned"
b "(signalBitNb-1 DOWNTO 0)"
o 3
suid 7,0
)
)
uid 1082,0
)
*91 (LeafLogPort
port (LogicalPort
m 4
decl (Decl
n "step"
t "unsigned"
b "(phaseBitNb-1 DOWNTO 0)"
o 6
suid 8,0
)
)
uid 1084,0
)
]
)
pdm (PhysicalDM
displayShortBounds 1
editShortBounds 1
uid 1100,0
optionalChildren [
*92 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *93 (MRCItem
litem &72
pos 7
dimension 20
)
uid 1102,0
optionalChildren [
*94 (MRCItem
litem &73
pos 0
dimension 20
uid 1103,0
)
*95 (MRCItem
litem &74
pos 1
dimension 23
uid 1104,0
)
*96 (MRCItem
litem &75
pos 2
hidden 1
dimension 20
uid 1105,0
)
*97 (MRCItem
litem &85
pos 0
dimension 20
uid 1071,0
)
*98 (MRCItem
litem &86
pos 1
dimension 20
uid 1073,0
)
*99 (MRCItem
litem &87
pos 2
dimension 20
uid 1077,0
)
*100 (MRCItem
litem &88
pos 3
dimension 20
uid 1079,0
)
*101 (MRCItem
litem &89
pos 4
dimension 20
uid 1081,0
)
*102 (MRCItem
litem &90
pos 5
dimension 20
uid 1083,0
)
*103 (MRCItem
litem &91
pos 6
dimension 20
uid 1085,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 1106,0
optionalChildren [
*104 (MRCItem
litem &76
pos 0
dimension 20
uid 1107,0
)
*105 (MRCItem
litem &78
pos 1
dimension 50
uid 1108,0
)
*106 (MRCItem
litem &79
pos 2
dimension 100
uid 1109,0
)
*107 (MRCItem
litem &80
pos 3
dimension 50
uid 1110,0
)
*108 (MRCItem
litem &81
pos 4
dimension 100
uid 1111,0
)
*109 (MRCItem
litem &82
pos 5
dimension 100
uid 1112,0
)
*110 (MRCItem
litem &83
pos 6
dimension 50
uid 1113,0
)
*111 (MRCItem
litem &84
pos 7
dimension 80
uid 1114,0
)
]
)
fixedCol 4
fixedRow 2
name "Ports"
uid 1101,0
vaOverrides [
]
)
]
)
uid 1086,0
)
genericsCommonDM (CommonDM
ldm (LogicalDM
emptyRow *112 (LEmptyRow
)
uid 1116,0
optionalChildren [
*113 (RefLabelRowHdr
)
*114 (TitleRowHdr
)
*115 (FilterRowHdr
)
*116 (RefLabelColHdr
tm "RefLabelColHdrMgr"
)
*117 (RowExpandColHdr
tm "RowExpandColHdrMgr"
)
*118 (GroupColHdr
tm "GroupColHdrMgr"
)
*119 (NameColHdr
tm "GenericNameColHdrMgr"
)
*120 (TypeColHdr
tm "GenericTypeColHdrMgr"
)
*121 (InitColHdr
tm "GenericValueColHdrMgr"
)
*122 (PragmaColHdr
tm "GenericPragmaColHdrMgr"
)
*123 (EolColHdr
tm "GenericEolColHdrMgr"
)
]
)
pdm (PhysicalDM
uid 1128,0
optionalChildren [
*124 (Sheet
sheetRow (SheetRow
headerVa (MVa
cellColor "49152,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
)
cellVa (MVa
cellColor "65535,65535,65535"
fontColor "0,0,0"
font "Tahoma,10,0"
)
groupVa (MVa
cellColor "39936,56832,65280"
fontColor "0,0,0"
font "Tahoma,10,0"
)
emptyMRCItem *125 (MRCItem
litem &112
pos 0
dimension 20
)
uid 1130,0
optionalChildren [
*126 (MRCItem
litem &113
pos 0
dimension 20
uid 1131,0
)
*127 (MRCItem
litem &114
pos 1
dimension 23
uid 1132,0
)
*128 (MRCItem
litem &115
pos 2
hidden 1
dimension 20
uid 1133,0
)
]
)
sheetCol (SheetCol
propVa (MVa
cellColor "0,49152,49152"
fontColor "0,0,0"
font "Tahoma,10,0"
textAngle 90
)
uid 1134,0
optionalChildren [
*129 (MRCItem
litem &116
pos 0
dimension 20
uid 1135,0
)
*130 (MRCItem
litem &118
pos 1
dimension 50
uid 1136,0
)
*131 (MRCItem
litem &119
pos 2
dimension 100
uid 1137,0
)
*132 (MRCItem
litem &120
pos 3
dimension 100
uid 1138,0
)
*133 (MRCItem
litem &121
pos 4
dimension 50
uid 1139,0
)
*134 (MRCItem
litem &122
pos 5
dimension 50
uid 1140,0
)
*135 (MRCItem
litem &123
pos 6
dimension 80
uid 1141,0
)
]
)
fixedCol 3
fixedRow 2
name "Ports"
uid 1129,0
vaOverrides [
]
)
]
)
uid 1115,0
type 1
)
activeModelName "BlockDiag"
)