1183 lines
15 KiB
Plaintext
1183 lines
15 KiB
Plaintext
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DocumentHdrVersion "1.1"
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Header (DocumentHdr
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packageRefs [
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(PackageRef
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library "ieee"
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unitName "std_logic_1164"
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itemName "all"
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)
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(PackageRef
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library "ieee"
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unitName "numeric_std"
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itemName "all"
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)
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]
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)
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version "15.1"
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appVersion "2002.1a (Build 22)"
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model (Symbol
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VExpander (VariableExpander
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vvMap [
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(vvPair
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variable " "
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value " "
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)
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(vvPair
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variable "HDLDir"
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value "D:\\Users\\ELN_labs\\VHDL_gen"
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)
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(vvPair
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variable "SideDataDesignDir"
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value "U:\\SEm_curves\\Test\\sine@gen_tester\\interface.info"
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)
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(vvPair
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variable "SideDataUserDir"
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value "U:\\SEm_curves\\Test\\sine@gen_tester\\interface.user"
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)
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(vvPair
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variable "SourceDir"
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value "U:\\SEm_curves\\Test"
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)
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(vvPair
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variable "appl"
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value "HDL Designer - Pro"
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)
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(vvPair
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variable "d"
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value "U:\\SEm_curves\\Test\\sine@gen_tester"
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)
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(vvPair
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variable "d_logical"
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value "U:\\SEm_curves\\Test\\sineGen_tester"
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)
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(vvPair
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variable "date"
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value "04/01/08"
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)
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|
(vvPair
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variable "day"
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value "Tue"
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)
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(vvPair
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variable "day_long"
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value "Tuesday"
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)
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(vvPair
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variable "dd"
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value "01"
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)
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(vvPair
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variable "ext"
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value "<TBD>"
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)
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(vvPair
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variable "f"
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value "interface"
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)
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(vvPair
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variable "f_logical"
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value "interface"
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)
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(vvPair
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variable "group"
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value "UNKNOWN"
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)
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(vvPair
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variable "host"
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value "WE2636"
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)
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(vvPair
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variable "library"
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value "Curves_test"
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)
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(vvPair
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|
variable "library_downstream_ModelSim"
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value "D:\\Users\\ELN_labs\\VHDL_comp"
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)
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|
(vvPair
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|
variable "mm"
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|
value "04"
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)
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|
(vvPair
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|
variable "month"
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value "Apr"
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|
)
|
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|
(vvPair
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||
|
variable "month_long"
|
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|
value "April"
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)
|
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|
(vvPair
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|
variable "p"
|
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|
value "U:\\SEm_curves\\Test\\sine@gen_tester\\interface"
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|
)
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(vvPair
|
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|
variable "p_logical"
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value "U:\\SEm_curves\\Test\\sineGen_tester\\interface"
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)
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(vvPair
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|
variable "series"
|
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|
value "HDL Designer Series"
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)
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|
(vvPair
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variable "time"
|
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|
value "12:48:44"
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|
)
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|
(vvPair
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|
variable "unit"
|
||
|
value "sineGen_tester"
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|
)
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|
(vvPair
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variable "user"
|
||
|
value "cof"
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|
)
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(vvPair
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variable "version"
|
||
|
value "2002.1a (Build 22)"
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|
)
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(vvPair
|
||
|
variable "view"
|
||
|
value "interface"
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)
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||
|
(vvPair
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||
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variable "year"
|
||
|
value "2008"
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|
)
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(vvPair
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||
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variable "yy"
|
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value "08"
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)
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]
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|
)
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uid 61,0
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optionalChildren [
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||
|
*1 (SymbolBody
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|
uid 8,0
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optionalChildren [
|
||
|
*2 (CptPort
|
||
|
uid 162,0
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|
ps "OnEdgeStrategy"
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|
shape (Triangle
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||
|
uid 163,0
|
||
|
va (VaSet
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||
|
vasetType 1
|
||
|
fg "0,65535,0"
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|
)
|
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|
xt "28625,5250,29375,6000"
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|
)
|
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|
n "clock"
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|
t "std_ulogic"
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m 1
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|
o 3
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r 5
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|
d 0
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|
s 0
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|
sf 1
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|
tg (CPTG
|
||
|
uid 164,0
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|
ps "CptPortTextPlaceStrategy"
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|
stg "RightVerticalLayoutStrategy"
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|
f (Text
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uid 165,0
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ro 270
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|
va (VaSet
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|
font "Verdana,9,0"
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)
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|
xt "28400,7000,29600,9700"
|
||
|
st "clock"
|
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|
ju 2
|
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|
blo "29400,7000"
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|
tm "CptPortNameMgr"
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|
)
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|
)
|
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|
dt (MLText
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|
uid 166,0
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|
va (VaSet
|
||
|
font "Courier New,8,0"
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|
)
|
||
|
xt "44000,5200,62000,6000"
|
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|
st "clock : OUT std_ulogic ;
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|
"
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|
)
|
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|
)
|
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|
*3 (CptPort
|
||
|
uid 167,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 168,0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "30625,5250,31375,6000"
|
||
|
)
|
||
|
n "reset"
|
||
|
t "std_ulogic"
|
||
|
m 1
|
||
|
o 2
|
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|
r 6
|
||
|
d 0
|
||
|
s 0
|
||
|
sf 1
|
||
|
tg (CPTG
|
||
|
uid 169,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
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||
|
uid 170,0
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|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
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)
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|
xt "30400,7000,31600,9600"
|
||
|
st "reset"
|
||
|
ju 2
|
||
|
blo "31400,7000"
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|
tm "CptPortNameMgr"
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||
|
)
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)
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||
|
dt (MLText
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||
|
uid 171,0
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|
va (VaSet
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font "Courier New,8,0"
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)
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|
xt "44000,6000,62000,6800"
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||
|
st "reset : OUT std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*4 (CptPort
|
||
|
uid 172,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 173,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "60625,5250,61375,6000"
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||
|
)
|
||
|
n "sawtooth"
|
||
|
t "unsigned"
|
||
|
b "(signalBitNb-1 DOWNTO 0)"
|
||
|
o 7
|
||
|
r 1
|
||
|
d 0
|
||
|
s 0
|
||
|
sf 1
|
||
|
tg (CPTG
|
||
|
uid 174,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 175,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "60400,7000,61600,23500"
|
||
|
st "sawtooth : (signalBitNb-1:0)"
|
||
|
ju 2
|
||
|
blo "61400,7000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 176,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
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||
|
)
|
||
|
xt "44000,2000,73500,2800"
|
||
|
st "sawtooth : IN unsigned (signalBitNb-1 DOWNTO 0) ;
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*5 (CptPort
|
||
|
uid 177,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 178,0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "24625,5250,25375,6000"
|
||
|
)
|
||
|
n "shiftPhase"
|
||
|
t "std_ulogic"
|
||
|
m 1
|
||
|
o 3
|
||
|
r 7
|
||
|
d 0
|
||
|
s 0
|
||
|
sf 1
|
||
|
tg (CPTG
|
||
|
uid 179,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 180,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "24400,7000,25600,13700"
|
||
|
st "shiftPhase"
|
||
|
ju 2
|
||
|
blo "25400,7000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 181,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,6800,62000,7600"
|
||
|
st "shiftPhase : OUT std_ulogic ;
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*6 (CptPort
|
||
|
uid 182,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 183,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "54625,5250,55375,6000"
|
||
|
)
|
||
|
n "sine"
|
||
|
t "unsigned"
|
||
|
b "(signalBitNb-1 DOWNTO 0)"
|
||
|
o 4
|
||
|
r 2
|
||
|
d 0
|
||
|
s 0
|
||
|
sf 1
|
||
|
tg (CPTG
|
||
|
uid 184,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 185,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "54400,7000,55600,21100"
|
||
|
st "sine : (signalBitNb-1:0)"
|
||
|
ju 2
|
||
|
blo "55400,7000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 186,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,2800,73500,3600"
|
||
|
st "sine : IN unsigned (signalBitNb-1 DOWNTO 0) ;
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*7 (CptPort
|
||
|
uid 187,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 188,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "58625,5250,59375,6000"
|
||
|
)
|
||
|
n "square"
|
||
|
t "unsigned"
|
||
|
b "(signalBitNb-1 DOWNTO 0)"
|
||
|
o 6
|
||
|
r 3
|
||
|
d 0
|
||
|
s 0
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||
|
sf 1
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||
|
tg (CPTG
|
||
|
uid 189,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 190,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "58400,7000,59600,22400"
|
||
|
st "square : (signalBitNb-1:0)"
|
||
|
ju 2
|
||
|
blo "59400,7000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 191,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,3600,73500,4400"
|
||
|
st "square : IN unsigned (signalBitNb-1 DOWNTO 0) ;
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*8 (CptPort
|
||
|
uid 192,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 193,0
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "22625,5250,23375,6000"
|
||
|
)
|
||
|
n "step"
|
||
|
t "unsigned"
|
||
|
b "(phaseBitNb-1 DOWNTO 0)"
|
||
|
m 1
|
||
|
o 8
|
||
|
r 8
|
||
|
d 0
|
||
|
s 0
|
||
|
sf 1
|
||
|
tg (CPTG
|
||
|
uid 194,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 195,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "22400,7000,23600,21200"
|
||
|
st "step : (phaseBitNb-1:0)"
|
||
|
ju 2
|
||
|
blo "23400,7000"
|
||
|
tm "CptPortNameMgr"
|
||
|
)
|
||
|
)
|
||
|
dt (MLText
|
||
|
uid 196,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "44000,7600,72000,8400"
|
||
|
st "step : OUT unsigned (phaseBitNb-1 DOWNTO 0)
|
||
|
"
|
||
|
)
|
||
|
)
|
||
|
*9 (CptPort
|
||
|
uid 197,0
|
||
|
ps "OnEdgeStrategy"
|
||
|
shape (Triangle
|
||
|
uid 198,0
|
||
|
ro 180
|
||
|
va (VaSet
|
||
|
vasetType 1
|
||
|
fg "0,65535,0"
|
||
|
)
|
||
|
xt "56625,5250,57375,6000"
|
||
|
)
|
||
|
n "triangle"
|
||
|
t "unsigned"
|
||
|
b "(signalBitNb-1 DOWNTO 0)"
|
||
|
o 5
|
||
|
r 4
|
||
|
d 0
|
||
|
s 0
|
||
|
sf 1
|
||
|
tg (CPTG
|
||
|
uid 199,0
|
||
|
ps "CptPortTextPlaceStrategy"
|
||
|
stg "RightVerticalLayoutStrategy"
|
||
|
f (Text
|
||
|
uid 200,0
|
||
|
ro 270
|
||
|
va (VaSet
|
||
|
font "Verdana,9,0"
|
||
|
)
|
||
|
xt "56400,7000,57600,22800"
|
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|
)
|
||
|
xt "22600,16000,25900,17200"
|
||
|
st "<cell>"
|
||
|
blo "22600,17000"
|
||
|
)
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||
|
)
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||
|
gi *25 (GenericInterface
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||
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ps "CenterOffsetStrategy"
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||
|
matrix (Matrix
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|
text (MLText
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|
va (VaSet
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||
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isHidden 1
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||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "0,12000,0,12000"
|
||
|
)
|
||
|
header "Generic Declarations"
|
||
|
)
|
||
|
elements [
|
||
|
]
|
||
|
)
|
||
|
portInstanceVisAsIs 1
|
||
|
portInstanceVis (PortSigDisplay
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||
|
)
|
||
|
)
|
||
|
defaultCptPort (CptPort
|
||
|
ps "OnEdgeStrategy"
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||
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shape (Triangle
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||
|
ro 90
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va (VaSet
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||
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vasetType 1
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fg "0,65535,0"
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)
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|
xt "0,0,750,750"
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)
|
||
|
n "In0"
|
||
|
t "std_logic_vector"
|
||
|
b "(15 DOWNTO 0)"
|
||
|
o 0
|
||
|
r 0
|
||
|
d 0
|
||
|
s 0
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||
|
sf 1
|
||
|
tg (CPTG
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||
|
ps "CptPortTextPlaceStrategy"
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||
|
stg "VerticalLayoutStrategy"
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f (Text
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va (VaSet
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font "Verdana,9,0"
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)
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xt "0,750,1800,1950"
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|
st "In0"
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blo "0,1750"
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||
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tm "CptPortNameMgr"
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)
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)
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|
dt (MLText
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||
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va (VaSet
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||
|
font "Courier New,8,0"
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||
|
)
|
||
|
)
|
||
|
)
|
||
|
defaultCptPortBuffer (CptPort
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||
|
ps "OnEdgeStrategy"
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shape (Diamond
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va (VaSet
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vasetType 1
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fg "65535,65535,65535"
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bg "0,0,0"
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)
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xt "0,0,750,750"
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)
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|
n "Buffer0"
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t "std_logic_vector"
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|
b "(15 DOWNTO 0)"
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|
m 3
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||
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o 0
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||
|
r 0
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||
|
d 0
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|
s 0
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|
sf 1
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tg (CPTG
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||
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ps "CptPortTextPlaceStrategy"
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|
stg "VerticalLayoutStrategy"
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f (Text
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|
va (VaSet
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font "Verdana,9,0"
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)
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xt "0,750,3600,1950"
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||
|
st "Buffer0"
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||
|
blo "0,1750"
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||
|
tm "CptPortNameMgr"
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|
)
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|
)
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||
|
dt (MLText
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||
|
va (VaSet
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
)
|
||
|
)
|
||
|
DeclarativeBlock *26 (SymDeclBlock
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||
|
uid 1,0
|
||
|
stg "SymDeclLayoutStrategy"
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||
|
declLabel (Text
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||
|
uid 2,0
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||
|
va (VaSet
|
||
|
font "Arial,8,1"
|
||
|
)
|
||
|
xt "42000,0,47400,1000"
|
||
|
st "Declarations"
|
||
|
blo "42000,800"
|
||
|
)
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||
|
portLabel (Text
|
||
|
uid 3,0
|
||
|
va (VaSet
|
||
|
font "Arial,8,1"
|
||
|
)
|
||
|
xt "42000,1000,44300,2000"
|
||
|
st "Ports:"
|
||
|
blo "42000,1800"
|
||
|
)
|
||
|
externalLabel (Text
|
||
|
uid 4,0
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||
|
va (VaSet
|
||
|
font "Arial,8,1"
|
||
|
)
|
||
|
xt "42000,8400,44000,9400"
|
||
|
st "User:"
|
||
|
blo "42000,9200"
|
||
|
)
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||
|
internalLabel (Text
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||
|
uid 6,0
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||
|
va (VaSet
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||
|
isHidden 1
|
||
|
font "Arial,8,1"
|
||
|
)
|
||
|
xt "42000,0,47800,1000"
|
||
|
st "Internal User:"
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||
|
blo "42000,800"
|
||
|
)
|
||
|
externalText (MLText
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||
|
uid 5,0
|
||
|
va (VaSet
|
||
|
font "Courier New,8,0"
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||
|
)
|
||
|
xt "44000,9400,44000,9400"
|
||
|
tm "SyDeclarativeTextMgr"
|
||
|
)
|
||
|
internalText (MLText
|
||
|
uid 7,0
|
||
|
va (VaSet
|
||
|
isHidden 1
|
||
|
font "Courier New,8,0"
|
||
|
)
|
||
|
xt "42000,0,42000,0"
|
||
|
tm "SyDeclarativeTextMgr"
|
||
|
)
|
||
|
)
|
||
|
lastUid 201,0
|
||
|
)
|