finish lab2
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@ -5,7 +5,6 @@ signal x: st;
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signal u: st;
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signal v: st;
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signal w: st;
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signal y: st;
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BEGIN
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@ -15,28 +14,25 @@ BEGIN
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u <= (others => '0');
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v <= (others => '0');
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w <= (others => '0');
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y <= (others => '0');
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elsif rising_edge(clock) then
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if restartPolynom = '1' then
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x <= resize(d, st'high+1) sll (oversamplingBitNb * 3 + 1);
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u <= resize(a, st'high+1) + (resize(b, st'high+1) sll oversamplingBitNb) + (resize(c, st'high+1) sll (oversamplingBitNb*2));
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v <= resize(6*a, v'length) + (resize(b, st'high+1) sll (oversamplingBitNb + 1));
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x <= resize(d, st'high+1) sla (oversamplingBitNb * 3 + 1);
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u <= resize(a, st'high+1) + (resize(b, st'high+1) sla oversamplingBitNb) + (resize(c, st'high+1) sla (oversamplingBitNb*2));
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v <= resize(6*a, v'length) + (resize(b, st'high+1) sla (oversamplingBitNb + 1));
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w <= resize(6*a, w'length);
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y <= resize(d, st'high+1);
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else
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x <= x + u;
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u <= u + v;
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v <= v + w;
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y <= x srl (oversamplingBitNb * 3 + 1);
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end if;
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end if;
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end process;
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sampleOut <= resize(y,signalBitNb);
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sampleOut <= resize(x sra (oversamplingBitNb * 3 + 1),signalBitNb);
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END ARCHITECTURE studentVersion;
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@ -1,4 +1,17 @@
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ARCHITECTURE studentVersion OF offsetToUnsigned IS
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signal mySignal : unsigned(BitNb-1 downto 0);
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signal const : unsigned(BitNb-1 downto 0) := (others => '1');
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BEGIN
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unsignedOut <= (others => '0');
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process(signedIn) begin
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if signedIn(signedIn'high) then
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mySignal <= unsigned(signedIn) - (const srl 1);
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else
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mySignal <= unsigned(signedIn) + (const srl 1);
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end if;
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end process;
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unsignedOut <= mySignal;
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END ARCHITECTURE studentVersion;
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