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709 changed files with 375 additions and 301952 deletions

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@ -1,10 +1,11 @@
[Concat]
[ModelSim] [ModelSim]
SplineInterpolator = $SCRATCH_DIR/SplineInterpolator SplineInterpolator = $SCRATCH_DIR/SplineInterpolator
SplineInterpolator_test = $SCRATCH_DIR/SplineInterpolator_test SplineInterpolator_test = $SCRATCH_DIR/SplineInterpolator_test
WaveformGenerator = $SCRATCH_DIR/WaveformGenerator WaveformGenerator = $SCRATCH_DIR/WaveformGenerator
WaveformGenerator_test = $SCRATCH_DIR/WaveformGenerator_test WaveformGenerator_test = $SCRATCH_DIR/WaveformGenerator_test
[hdl] [hdl]
ieee = $HDS_HOME\hdl_libs\ieee\hdl ieee = $HDS_HOME/hdl_libs/ieee/hdl
SplineInterpolator = $HDS_PROJECT_DIR/../SplineInterpolator/hdl SplineInterpolator = $HDS_PROJECT_DIR/../SplineInterpolator/hdl
SplineInterpolator_test = $HDS_PROJECT_DIR/../SplineInterpolator_test/hdl SplineInterpolator_test = $HDS_PROJECT_DIR/../SplineInterpolator_test/hdl
std = $HDS_HOME/hdl_libs/std/hdl std = $HDS_HOME/hdl_libs/std/hdl

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@ -1280,7 +1280,6 @@ projectPaths [
"C:\\work\\repo\\edu\\sem\\labo\\solution\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\work\\repo\\edu\\sem\\labo\\solution\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
] ]
libMappingsRootDir "" libMappingsRootDir ""
@ -4150,7 +4149,7 @@ hdsWorkspaceLocation ""
relativeLibraryRootDir "" relativeLibraryRootDir ""
vmLabelLatestDontAskAgain 0 vmLabelLatestDontAskAgain 0
vmLabelWorkspaceDontAskAgain 0 vmLabelWorkspaceDontAskAgain 0
logWindowGeometry "600x573+406+95" logWindowGeometry "600x573+405+95"
diagramBrowserTabNo 0 diagramBrowserTabNo 0
showInsertPortHint 0 showInsertPortHint 0
showContentFirstTime 0 showContentFirstTime 0
@ -6218,9 +6217,9 @@ size 180
] ]
displayHierarchy 0 displayHierarchy 0
xPos 0 xPos 0
yPos 4 yPos 14
width 892 width 1936
height 982 height 1056
activeSidePanelTab 2 activeSidePanelTab 2
activeLibraryTab 2 activeLibraryTab 2
sidePanelSize 278 sidePanelSize 278

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@ -1280,7 +1280,6 @@ projectPaths [
"C:\\work\\repo\\edu\\sem\\labo\\solution\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\work\\repo\\edu\\sem\\labo\\solution\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\work\\edu\\sem\\labo\\sem_labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\dev\\sem-labs\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\Users\\uadmin\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp" "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\02-SplineInterpolator\\Prefs\\hds.hdp"
] ]
libMappingsRootDir "" libMappingsRootDir ""
@ -4150,7 +4149,7 @@ hdsWorkspaceLocation ""
relativeLibraryRootDir "" relativeLibraryRootDir ""
vmLabelLatestDontAskAgain 0 vmLabelLatestDontAskAgain 0
vmLabelWorkspaceDontAskAgain 0 vmLabelWorkspaceDontAskAgain 0
logWindowGeometry "600x573+406+95" logWindowGeometry "600x573+405+95"
diagramBrowserTabNo 0 diagramBrowserTabNo 0
showInsertPortHint 0 showInsertPortHint 0
showContentFirstTime 0 showContentFirstTime 0
@ -6218,9 +6217,9 @@ size 180
] ]
displayHierarchy 0 displayHierarchy 0
xPos 0 xPos 0
yPos 4 yPos 14
width 892 width 1936
height 982 height 1056
activeSidePanelTab 2 activeSidePanelTab 2
activeLibraryTab 2 activeLibraryTab 2
sidePanelSize 278 sidePanelSize 278

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@ -1,38 +1,4 @@
ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS ARCHITECTURE studentVersion OF interpolatorCalculatePolynom IS
subtype st is signed(coeffBitNb-1+oversamplingBitNb+8 DOWNTO 0);
signal x: st;
signal u: st;
signal v: st;
signal w: st;
BEGIN BEGIN
sampleOut <= (others => '0');
process(clock, reset) begin
if reset = '1' then
x <= (others => '0');
u <= (others => '0');
v <= (others => '0');
w <= (others => '0');
elsif rising_edge(clock) then
if restartPolynom = '1' then
x <= resize(d, st'high+1) sla (oversamplingBitNb * 3 + 1);
u <= resize(a, st'high+1) + (resize(b, st'high+1) sla oversamplingBitNb) + (resize(c, st'high+1) sla (oversamplingBitNb*2));
v <= resize(6*a, v'length) + (resize(b, st'high+1) sla (oversamplingBitNb + 1));
w <= resize(6*a, w'length);
else
x <= x + u;
u <= u + v;
v <= v + w;
end if;
end if;
end process;
sampleOut <= resize(x sra (oversamplingBitNb * 3 + 1),signalBitNb);
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -1,27 +1,7 @@
ARCHITECTURE studentVersion OF interpolatorCoefficients IS ARCHITECTURE studentVersion OF interpolatorCoefficients IS
subtype sample is signed(bitNb-1 DOWNTO 0);
subtype coeff is signed(coeffBitNb-1 DOWNTO 0);
type samples_type is array (1 to 4) of coeff;
signal samples: samples_type;
BEGIN BEGIN
-- a = - sample1 +3·sample2 -3·sample3 + sample4 a <= (others => '0');
-- b = 2·sample1 -5·sample2 +4·sample3 - sample4 b <= (others => '0');
-- c = - sample1 + sample3 c <= (others => '0');
-- d = sample2 d <= (others => '0');
process(sample1, sample2, sample3, sample4) begin
samples(1) <= resize(sample1, coeff'high+1);
samples(2) <= resize(sample2, coeff'high+1);
samples(3) <= resize(sample3, coeff'high+1);
samples(4) <= resize(sample4, coeff'high+1);
end process;
a <= samples(4) - samples(1) + resize( 3*(samples(2) - samples(3)), coeff'high+1);
b <= resize(2*samples(1), coeff'high+1) - resize(5*samples(2), coeff'high+1) + resize(4*samples(3), coeff'high+1) - samples(4);
c <= samples(3) - samples(1);
d <= samples(2);
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -1,28 +1,7 @@
ARCHITECTURE studentVersion OF interpolatorShiftRegister IS ARCHITECTURE studentVersion OF interpolatorShiftRegister IS
subtype sample_type is signed(sampleIn'range);
type samples_type is array (1 to 4) of sample_type;
signal samples: samples_type;
BEGIN BEGIN
sample1 <= (others => '0');
process(clock, reset) begin sample2 <= (others => '0');
if reset = '1' then sample3 <= (others => '0');
samples <= (others => (others => '0')); sample4 <= (others => '0');
elsif rising_edge(clock) then
if shiftSamples then
for i in samples_type'low to samples_type'high-1 loop
samples(i+1) <= samples(i);
end loop;
samples(1) <= sampleIn;
end if;
end if;
end process;
sample1 <= samples(4);
sample2 <= samples(3);
sample3 <= samples(2);
sample4 <= samples(1);
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -1,29 +1,4 @@
ARCHITECTURE studentVersion OF interpolatorTrigger IS ARCHITECTURE studentVersion OF interpolatorTrigger IS
signal counter : unsigned(counterBitNb-1 downto 0);
BEGIN BEGIN
process(clock, reset)
begin
if reset = '1' then
counter <= (others => '0');
elsif rising_edge(clock) then
if en = '1' then
counter <= counter - 1;
end if;
end if;
end process;
process(counter)
begin
if counter = 0 then
triggerOut <= '1';
else
triggerOut <= '0'; triggerOut <= '0';
end if;
end process;
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -1,17 +1,4 @@
ARCHITECTURE studentVersion OF offsetToUnsigned IS ARCHITECTURE studentVersion OF offsetToUnsigned IS
signal mySignal : unsigned(BitNb-1 downto 0);
signal const : unsigned(BitNb-1 downto 0) := (others => '1');
BEGIN BEGIN
process(signedIn) begin unsignedOut <= (others => '0');
if signedIn(signedIn'high) then
mySignal <= unsigned(signedIn) - (const srl 1);
else
mySignal <= unsigned(signedIn) + (const srl 1);
end if;
end process;
unsignedOut <= mySignal;
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -8,7 +8,7 @@ BEGIN
phaseTableAddress <= phase(phase'high-2 downto phase'high-2-tableAddressBitNb+1); phaseTableAddress <= phase(phase'high-2 downto phase'high-2-tableAddressBitNb+1);
sequenceTable: process(phaseTableAddress) sequenceTable: process(phase)
begin begin
if phase(phase'high-1) = '1' then if phase(phase'high-1) = '1' then
phaseTableAddress2 <= 8 - phaseTableAddress; phaseTableAddress2 <= 8 - phaseTableAddress;
@ -30,14 +30,9 @@ BEGIN
when 7 => quarterSine <= to_signed(16#7D89#, quarterSine'length); when 7 => quarterSine <= to_signed(16#7D89#, quarterSine'length);
when others => quarterSine <= (others => '-'); when others => quarterSine <= (others => '-');
end case; end case;
if phaseTableAddress2 = 0 then
if phase(phase'high-1) = '1' then
quarterSine <= to_signed(16#7FFF#, quarterSine'length);
end if;
end if;
end process quarterTable; end process quarterTable;
invert: process(quarterSine, phase(phase'high)) invert: process(quarterSine)
begin begin
if phase(phase'high) = '1' then if phase(phase'high) = '1' then
sine <= NOT quarterSine; sine <= NOT quarterSine;
@ -46,4 +41,6 @@ BEGIN
end if; end if;
end process invert; end process invert;
--sine <= quarterSine;
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -1,275 +0,0 @@
-- VHDL Entity Morse.charToMorseController.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:13:01 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY charToMorseController IS
GENERIC(
characterBitNb : positive := 8;
unitCountBitNb : positive := 3
);
PORT(
morseOut : OUT std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic;
charNotReady : IN std_ulogic;
char : IN std_ulogic_vector (characterBitNb-1 DOWNTO 0);
startCounter : OUT std_ulogic;
unitNb : OUT unsigned (unitCountBitNb-1 DOWNTO 0);
counterDone : IN std_ulogic;
readChar : OUT std_ulogic
);
-- Declarations
END charToMorseController ;
--
-- VHDL Architecture Morse.charToMorseController.fsm
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:50:02 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ARCHITECTURE fsm OF charToMorseController IS
TYPE STATE_TYPE IS (
waitForChar,
storeChar,
sendDotStart,
sendDotWait,
sendDotSpacerStart,
sendDotSpacerWait,
sendDotDotStart,
sendDotDotWait,
sendDotDashStart,
sendDotDashWait,
sendDashStart,
sendDashWait,
sendDahsSpacerStart,
sendDashSpacerWait,
sendDashDotStart,
sendDashDashStart,
sendDashDotWait,
sendDashDashWait,
popChar,
popChar1
);
-- Declare current and next state signals
SIGNAL current_state : STATE_TYPE;
SIGNAL next_state : STATE_TYPE;
BEGIN
-----------------------------------------------------------------
clocked_proc : PROCESS (
clock,
reset
)
-----------------------------------------------------------------
BEGIN
IF (reset = '1') THEN
current_state <= waitForChar;
ELSIF (clock'EVENT AND clock = '1') THEN
current_state <= next_state;
END IF;
END PROCESS clocked_proc;
-----------------------------------------------------------------
nextstate_proc : PROCESS (
char,
charNotReady,
counterDone,
current_state
)
-----------------------------------------------------------------
BEGIN
CASE current_state IS
WHEN waitForChar =>
IF (charNotReady = '0') THEN
next_state <= storeChar;
ELSE
next_state <= waitForChar;
END IF;
WHEN storeChar =>
IF (character'val(to_integer(unsigned(char))) = 'e' or
character'val(to_integer(unsigned(char))) = 'i' or
character'val(to_integer(unsigned(char))) = 'a') THEN
next_state <= sendDotStart;
ELSIF (character'val(to_integer(unsigned(char))) = 't' or
character'val(to_integer(unsigned(char))) = 'n' or
character'val(to_integer(unsigned(char))) = 'm') THEN
next_state <= sendDashStart;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDotStart =>
next_state <= sendDotWait;
WHEN sendDotWait =>
IF (counterDone = '0') THEN
next_state <= sendDotWait;
ELSIF (character'val(to_integer(unsigned(char))) = 'e') THEN
next_state <= popChar1;
ELSE
next_state <= sendDotSpacerStart;
END IF;
WHEN sendDotSpacerStart =>
next_state <= sendDotSpacerWait;
WHEN sendDotSpacerWait =>
IF (counterDone = '0') THEN
next_state <= sendDotSpacerWait;
ELSIF (character'val(to_integer(unsigned(char))) = 'i') THEN
next_state <= sendDotDotStart;
ELSE
next_state <= sendDotDashStart;
END IF;
WHEN sendDotDotStart =>
next_state <= sendDotDotWait;
WHEN sendDotDotWait =>
IF (counterDone = '0') THEN
next_state <= sendDotDotWait;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDotDashStart =>
next_state <= sendDotDashWait;
WHEN sendDotDashWait =>
IF (counterDone = '0') THEN
next_state <= sendDotDashWait;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDashStart =>
next_state <= sendDashWait;
WHEN sendDashWait =>
IF (counterDone = '0') THEN
next_state <= sendDashWait;
ELSIF (character'val(to_integer(unsigned(char))) = 't') THEN
next_state <= popChar1;
ELSE
next_state <= sendDahsSpacerStart;
END IF;
WHEN sendDahsSpacerStart =>
next_state <= sendDashSpacerWait;
WHEN sendDashSpacerWait =>
IF (counterDone = '0') THEN
next_state <= sendDashSpacerWait;
ELSIF (character'val(to_integer(unsigned(char))) = 'i') THEN
next_state <= sendDashDotStart;
ELSE
next_state <= sendDashDashStart;
END IF;
WHEN sendDashDotStart =>
next_state <= sendDashDotWait;
WHEN sendDashDashStart =>
next_state <= sendDashDashWait;
WHEN sendDashDotWait =>
IF (counterDone = '0') THEN
next_state <= sendDashDotWait;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDashDashWait =>
IF (counterDone = '0') THEN
next_state <= sendDashDashWait;
ELSE
next_state <= popChar1;
END IF;
WHEN popChar =>
IF (counterDone = '1') THEN
next_state <= waitForChar;
ELSE
next_state <= popChar;
END IF;
WHEN popChar1 =>
next_state <= popChar;
WHEN OTHERS =>
next_state <= waitForChar;
END CASE;
END PROCESS nextstate_proc;
-----------------------------------------------------------------
output_proc : PROCESS (
current_state
)
-----------------------------------------------------------------
BEGIN
-- Default Assignment
morseOut <= '0';
startCounter <= '0';
unitNb <= (others => '0');
readChar <= '0';
-- Combined Actions
CASE current_state IS
WHEN sendDotStart =>
startCounter <= '1';
WHEN sendDotWait =>
unitNb <= to_unsigned(1, unitNb'length);
morseOut <= '1';
WHEN sendDotSpacerStart =>
startCounter <= '1';
WHEN sendDotSpacerWait =>
unitNb <= to_unsigned(1, unitNb'length);
WHEN sendDotDotStart =>
startCounter <= '1';
WHEN sendDotDotWait =>
unitNb <= to_unsigned(1, unitNb'length);
morseOut <= '1';
WHEN sendDotDashStart =>
startCounter <= '1';
WHEN sendDotDashWait =>
unitNb <= to_unsigned(3, unitNb'length);
morseOut <= '1';
WHEN sendDashStart =>
startCounter <= '1';
WHEN sendDashWait =>
unitNb <= to_unsigned(3, unitNb'length);
morseOut <= '1';
WHEN sendDahsSpacerStart =>
startCounter <= '1';
WHEN sendDashSpacerWait =>
unitNb <= to_unsigned(1, unitNb'length);
WHEN sendDashDotStart =>
startCounter <= '1';
WHEN sendDashDashStart =>
startCounter <= '1';
WHEN sendDashDotWait =>
unitNb <= to_unsigned(1, unitNb'length);
morseOut <= '1';
WHEN sendDashDashWait =>
unitNb <= to_unsigned(3, unitNb'length);
morseOut <= '1';
WHEN popChar =>
unitNb <= to_unsigned(3, unitNb'length);
WHEN popChar1 =>
readChar <= '1';
startCounter <= '1';
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS output_proc;
END fsm;

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@ -1,526 +1,54 @@
ARCHITECTURE studentVersion OF charToMorseController IS ARCHITECTURE studentVersion OF charToMorseController IS
signal isA, isB, isC, isD, isE, isF, isG, isH, signal isA, isB, isC, isD, isE, isF, isG, isH,
isI, isJ, isK, isL, isM, isN, isO, isP, isI, isJ, isK, isL, isM, isN, isO, isP,
isQ, isR, isS, isT, isU, isV, isW, isX, isQ, isR, isS, isT, isU, isV, isW, isX,
isY, isZ, isY, isZ,
is0, is1, is2, is3, is4, is5, is6, is7, is0, is1, is2, is3, is4, is5, is6, is7,
is8, is9 : std_ulogic; is8, is9 : std_ulogic;
type T_MORSE is (SHORT, LONG, SPACE, END_WORD);
--type registers_type is array (1 to 5) of T_MORSE;
signal register1: T_MORSE;
signal register2: T_MORSE;
signal register3: T_MORSE;
signal register4: T_MORSE;
signal register5: T_MORSE;
TYPE GENERAL_STATE_TYPE IS (
waitForChar,
storeChar,
sendRegisters,
sended
);
signal general_current_state, general_next_state : GENERAL_STATE_TYPE;
TYPE SENDING_STATE_TYPE IS (
waiting,
sendR1,
waitR1,
sendR2,
waitR2,
sendR3,
waitR3,
sendR4,
waitR4,
sendR5,
waitSpace,
waitEndWord
);
signal sending_current_state, sending_next_state : SENDING_STATE_TYPE;
signal signSendRegisters, signRegistersSended: std_ulogic;
BEGIN BEGIN
------------------------------------------------------------------------------ ------------------------------------------------------------------------------
-- conditions for morse units -- conditions for morse units
isA <= '1' when std_match(unsigned(char), "1-0" & x"1") else '0'; -- 1-0 0001 isA <= '1' when std_match(unsigned(char), "1-0" & x"1") else '0';
isB <= '1' when std_match(unsigned(char), "1-0" & x"2") else '0'; -- 1-0 0010 isB <= '1' when std_match(unsigned(char), "1-0" & x"2") else '0';
isC <= '1' when std_match(unsigned(char), "1-0" & x"3") else '0'; -- 1-0 0011 isC <= '1' when std_match(unsigned(char), "1-0" & x"3") else '0';
isD <= '1' when std_match(unsigned(char), "1-0" & x"4") else '0'; -- 1-0 0100 isD <= '1' when std_match(unsigned(char), "1-0" & x"4") else '0';
isE <= '1' when std_match(unsigned(char), "1-0" & x"5") else '0'; -- 1-0 0101 isE <= '1' when std_match(unsigned(char), "1-0" & x"5") else '0';
isF <= '1' when std_match(unsigned(char), "1-0" & x"6") else '0'; -- 1-0 0110 isF <= '1' when std_match(unsigned(char), "1-0" & x"6") else '0';
isG <= '1' when std_match(unsigned(char), "1-0" & x"7") else '0'; -- 1-0 0111 isG <= '1' when std_match(unsigned(char), "1-0" & x"7") else '0';
isH <= '1' when std_match(unsigned(char), "1-0" & x"8") else '0'; -- 1-0 1000 isH <= '1' when std_match(unsigned(char), "1-0" & x"8") else '0';
isI <= '1' when std_match(unsigned(char), "1-0" & x"9") else '0'; -- 1-0 1001 isI <= '1' when std_match(unsigned(char), "1-0" & x"9") else '0';
isJ <= '1' when std_match(unsigned(char), "1-0" & x"A") else '0'; -- 1-0 1010 isJ <= '1' when std_match(unsigned(char), "1-0" & x"A") else '0';
isK <= '1' when std_match(unsigned(char), "1-0" & x"B") else '0'; -- 1-0 1011 isK <= '1' when std_match(unsigned(char), "1-0" & x"B") else '0';
isL <= '1' when std_match(unsigned(char), "1-0" & x"C") else '0'; -- 1-0 1100 isL <= '1' when std_match(unsigned(char), "1-0" & x"C") else '0';
isM <= '1' when std_match(unsigned(char), "1-0" & x"D") else '0'; -- 1-0 1101 isM <= '1' when std_match(unsigned(char), "1-0" & x"D") else '0';
isN <= '1' when std_match(unsigned(char), "1-0" & x"E") else '0'; -- 1-0 1110 isN <= '1' when std_match(unsigned(char), "1-0" & x"E") else '0';
isO <= '1' when std_match(unsigned(char), "1-0" & x"F") else '0'; -- 1-0 1111 isO <= '1' when std_match(unsigned(char), "1-0" & x"F") else '0';
isP <= '1' when std_match(unsigned(char), "1-1" & x"0") else '0'; -- 1-1 0000 isP <= '1' when std_match(unsigned(char), "1-1" & x"0") else '0';
isQ <= '1' when std_match(unsigned(char), "1-1" & x"1") else '0'; -- 1-1 0001 isQ <= '1' when std_match(unsigned(char), "1-1" & x"1") else '0';
isR <= '1' when std_match(unsigned(char), "1-1" & x"2") else '0'; -- 1-1 0010 isR <= '1' when std_match(unsigned(char), "1-1" & x"2") else '0';
isS <= '1' when std_match(unsigned(char), "1-1" & x"3") else '0'; -- 1-1 0011 isS <= '1' when std_match(unsigned(char), "1-1" & x"3") else '0';
isT <= '1' when std_match(unsigned(char), "1-1" & x"4") else '0'; -- 1-1 0100 isT <= '1' when std_match(unsigned(char), "1-1" & x"4") else '0';
isU <= '1' when std_match(unsigned(char), "1-1" & x"5") else '0'; -- 1-1 0101 isU <= '1' when std_match(unsigned(char), "1-1" & x"5") else '0';
isV <= '1' when std_match(unsigned(char), "1-1" & x"6") else '0'; -- 1-1 0110 isV <= '1' when std_match(unsigned(char), "1-1" & x"6") else '0';
isW <= '1' when std_match(unsigned(char), "1-1" & x"7") else '0'; -- 1-1 0111 isW <= '1' when std_match(unsigned(char), "1-1" & x"7") else '0';
isX <= '1' when std_match(unsigned(char), "1-1" & x"8") else '0'; -- 1-1 1000 isX <= '1' when std_match(unsigned(char), "1-1" & x"8") else '0';
isY <= '1' when std_match(unsigned(char), "1-1" & x"9") else '0'; -- 1-1 1001 isY <= '1' when std_match(unsigned(char), "1-1" & x"9") else '0';
isZ <= '1' when std_match(unsigned(char), "1-1" & x"A") else '0'; -- 1-1 1010 isZ <= '1' when std_match(unsigned(char), "1-1" & x"A") else '0';
is0 <= '1' when std_match(unsigned(char), "011" & x"0") else '0'; -- 011 0000 is0 <= '1' when std_match(unsigned(char), "011" & x"0") else '0';
is1 <= '1' when std_match(unsigned(char), "011" & x"1") else '0'; -- 011 0001 is1 <= '1' when std_match(unsigned(char), "011" & x"1") else '0';
is2 <= '1' when std_match(unsigned(char), "011" & x"2") else '0'; -- 011 0010 is2 <= '1' when std_match(unsigned(char), "011" & x"2") else '0';
is3 <= '1' when std_match(unsigned(char), "011" & x"3") else '0'; -- 011 0011 is3 <= '1' when std_match(unsigned(char), "011" & x"3") else '0';
is4 <= '1' when std_match(unsigned(char), "011" & x"4") else '0'; -- 011 0100 is4 <= '1' when std_match(unsigned(char), "011" & x"4") else '0';
is5 <= '1' when std_match(unsigned(char), "011" & x"5") else '0'; -- 011 0101 is5 <= '1' when std_match(unsigned(char), "011" & x"5") else '0';
is6 <= '1' when std_match(unsigned(char), "011" & x"6") else '0'; -- 011 0110 is6 <= '1' when std_match(unsigned(char), "011" & x"6") else '0';
is7 <= '1' when std_match(unsigned(char), "011" & x"7") else '0'; -- 011 0111 is7 <= '1' when std_match(unsigned(char), "011" & x"7") else '0';
is8 <= '1' when std_match(unsigned(char), "011" & x"8") else '0'; -- 011 1000 is8 <= '1' when std_match(unsigned(char), "011" & x"8") else '0';
is9 <= '1' when std_match(unsigned(char), "011" & x"9") else '0'; -- 011 1001 is9 <= '1' when std_match(unsigned(char), "011" & x"9") else '0';
------------------------------------------------------------------------------
process(reset, clock) begin
if reset = '1' then
general_current_state <= waitForChar;
sending_current_state <= waiting;
elsif rising_edge(clock) then
general_current_state <= general_next_state;
sending_current_state <= sending_next_state;
end if;
end process;
process(reset, clock) begin
case general_current_state is
when waitForChar =>
--report "General current state is wait for char" severity note;
register1 <= SPACE;
register2 <= SPACE;
register3 <= SPACE;
register4 <= SPACE;
register5 <= SPACE;
signSendRegisters <= '0';
if charNotReady = '0' then
general_next_state <= storeChar;
readChar <= '1';
report "charReady" severity note;
else
general_next_state <= waitForChar;
readChar <= '0';
--report "charNotReady" severity note;
end if;
when storeChar =>
report "General current state is store char" severity note;
if isA then
register1 <= SHORT;
register2 <= LONG;
general_next_state <= sendRegisters;
report "New char: A" severity note;
elsif isB then
register1 <= LONG;
register2 <= SHORT;
register3 <= SHORT;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif isC then
register1 <= LONG;
register2 <= SHORT;
register3 <= LONG;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif isD then
register1 <= LONG;
register2 <= SHORT;
register3 <= SHORT;
general_next_state <= sendRegisters;
elsif isE then
register1 <= SHORT;
general_next_state <= sendRegisters;
report "New char: E" severity note;
elsif isF then
register1 <= SHORT;
register2 <= SHORT;
register3 <= LONG;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif isG then
register1 <= LONG;
register2 <= LONG;
register3 <= SHORT;
general_next_state <= sendRegisters;
elsif isH then
register1 <= SHORT;
register2 <= SHORT;
register3 <= SHORT;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif isI then
register1 <= SHORT;
register2 <= SHORT;
general_next_state <= sendRegisters;
report "New char: I" severity note;
elsif isJ then
register1 <= SHORT;
register2 <= LONG;
register3 <= LONG;
register4 <= LONG;
general_next_state <= sendRegisters;
elsif isK then
register1 <= LONG;
register2 <= SHORT;
register3 <= LONG;
general_next_state <= sendRegisters;
elsif isL then
register1 <= SHORT;
register2 <= LONG;
register3 <= SHORT;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif isM then
register1 <= LONG;
register2 <= LONG;
general_next_state <= sendRegisters;
report "New char: M" severity note;
elsif isN then
register1 <= LONG;
register2 <= SHORT;
general_next_state <= sendRegisters;
elsif isO then
register1 <= LONG;
register2 <= LONG;
register3 <= LONG;
general_next_state <= sendRegisters;
elsif isP then
register1 <= SHORT;
register2 <= LONG;
register3 <= LONG;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif isQ then
register1 <= LONG;
register2 <= LONG;
register3 <= SHORT;
register4 <= LONG;
general_next_state <= sendRegisters;
elsif isR then
register1 <= SHORT;
register2 <= LONG;
register3 <= SHORT;
general_next_state <= sendRegisters;
elsif isS then
register1 <= SHORT;
register2 <= SHORT;
register3 <= SHORT;
general_next_state <= sendRegisters;
elsif isT then
register1 <= LONG;
general_next_state <= sendRegisters;
report "New char: T" severity note;
elsif isU then
register1 <= SHORT;
register2 <= SHORT;
register3 <= LONG;
general_next_state <= sendRegisters;
elsif isV then
register1 <= SHORT;
register2 <= SHORT;
register3 <= SHORT;
register4 <= LONG;
general_next_state <= sendRegisters;
elsif isW then
register1 <= SHORT;
register2 <= LONG;
register3 <= LONG;
general_next_state <= sendRegisters;
elsif isX then
register1 <= LONG;
register2 <= SHORT;
register3 <= SHORT;
register4 <= LONG;
general_next_state <= sendRegisters;
elsif isY then
register1 <= LONG;
register2 <= SHORT;
register3 <= LONG;
register4 <= LONG;
general_next_state <= sendRegisters;
elsif isZ then
register1 <= LONG;
register2 <= LONG;
register3 <= SHORT;
register4 <= SHORT;
general_next_state <= sendRegisters;
elsif is0 then
register1 <= LONG;
register2 <= LONG;
register3 <= LONG;
register4 <= LONG;
register5 <= LONG;
general_next_state <= sendRegisters;
elsif is1 then
register1 <= SHORT;
register2 <= LONG;
register3 <= LONG;
register4 <= LONG;
register5 <= LONG;
general_next_state <= sendRegisters;
elsif is2 then
register1 <= SHORT;
register2 <= SHORT;
register3 <= LONG;
register4 <= LONG;
register5 <= LONG;
general_next_state <= sendRegisters;
elsif is3 then
register1 <= SHORT;
register2 <= SHORT;
register3 <= SHORT;
register4 <= LONG;
register5 <= LONG;
general_next_state <= sendRegisters;
elsif is4 then
register1 <= SHORT;
register2 <= SHORT;
register3 <= SHORT;
register4 <= SHORT;
register5 <= LONG;
general_next_state <= sendRegisters;
elsif is5 then
register1 <= SHORT;
register2 <= SHORT;
register3 <= SHORT;
register4 <= SHORT;
register5 <= SHORT;
general_next_state <= sendRegisters;
elsif is6 then
register1 <= LONG;
register2 <= SHORT;
register3 <= SHORT;
register4 <= SHORT;
register5 <= SHORT;
general_next_state <= sendRegisters;
elsif is7 then
register1 <= LONG;
register2 <= LONG;
register3 <= SHORT;
register4 <= SHORT;
register5 <= SHORT;
general_next_state <= sendRegisters;
elsif is8 then
register1 <= LONG;
register2 <= LONG;
register3 <= LONG;
register4 <= SHORT;
register5 <= SHORT;
general_next_state <= sendRegisters;
elsif is9 then
register1 <= LONG;
register2 <= LONG;
register3 <= LONG;
register4 <= LONG;
register5 <= SHORT;
general_next_state <= sendRegisters;
else
register1 <= SPACE;
register2 <= SPACE;
register3 <= SPACE;
register4 <= SPACE;
register5 <= SPACE;
general_next_state <= storeChar;
report "Char look not correct" severity warning;
end if;
signSendRegisters <= '1';
when sendRegisters =>
--report "General current state is send registers" severity note;
readChar <= '0';
signSendRegisters <= '0';
if signRegistersSended then
general_next_state <= sended;
report "Char is send" severity note;
end if;
when sended =>
--report "General current state is sended" severity note;
general_next_state <= waitForChar;
register1 <= SPACE;
register2 <= SPACE;
register3 <= SPACE;
register4 <= SPACE;
register5 <= SPACE;
WHEN OTHERS =>
report "General current state is BROKEN" severity warning;
general_next_state <= waitForChar;
end case;
end process;
process(reset, clock) begin
case sending_current_state is
when waiting =>
morseOut <= '0'; morseOut <= '0';
startCounter <= '0'; startCounter <= '0';
unitNb <= "000"; unitNb <= (others => '-');
signRegistersSended <= '0';
if signSendRegisters = '1' then
sending_next_state <= sendR1;
report "Start to send new char" severity note;
else
sending_next_state <= waiting;
end if;
when sendR1 =>
report "Send register1" severity note;
startCounter <= '1';
morseOut <= '1';
case register1 is
when SHORT =>
unitNb <= "001";
when LONG =>
unitNb <= "011";
when others =>
report "Error when sending register1" severity error;
end case;
case register2 is
when SPACE =>
sending_next_state <= waitSpace;
when END_WORD =>
sending_next_state <= waitEndWord;
when others =>
sending_next_state <= waitR1;
end case;
when waitR1 =>
report "Wait register1" severity note;
startCounter <= '0';
if counterDone = '1' then
morseOut <= '0';
sending_next_state <= sendR2;
end if;
when sendR2 =>
report "Send register2" severity note;
startCounter <= '1';
morseOut <= '1';
case register2 is
when SHORT =>
unitNb <= "001";
when LONG =>
unitNb <= "011";
when others =>
report "Error when sending register2" severity error;
end case;
case register3 is
when SPACE =>
sending_next_state <= waitSpace;
when END_WORD =>
sending_next_state <= waitEndWord;
when others =>
sending_next_state <= waitR2;
end case;
when waitR2 =>
report "Wait register2" severity note;
startCounter <= '0';
if counterDone = '1' then
morseOut <= '0';
sending_next_state <= sendR3;
end if;
when sendR3 =>
report "Send register3" severity note;
startCounter <= '1';
morseOut <= '1';
case register3 is
when SHORT =>
unitNb <= "001";
when LONG =>
unitNb <= "011";
when others =>
report "Error when sending register3" severity error;
end case;
case register4 is
when SPACE =>
sending_next_state <= waitSpace;
when END_WORD =>
sending_next_state <= waitEndWord;
when others =>
sending_next_state <= waitR3;
end case;
when waitR3 =>
startCounter <= '0';
if counterDone = '1' then
morseOut <= '0';
sending_next_state <= sendR4;
end if;
when sendR4 =>
startCounter <= '1';
morseOut <= '1';
case register4 is
when SHORT =>
unitNb <= "001";
when LONG =>
unitNb <= "011";
when others =>
report "Error when sending register4" severity error;
end case;
case register5 is
when SPACE =>
sending_next_state <= waitSpace;
when END_WORD =>
sending_next_state <= waitEndWord;
when others =>
sending_next_state <= waitR4;
end case;
when waitR4 =>
startCounter <= '0';
if counterDone = '1' then
morseOut <= '0';
sending_next_state <= sendR5;
end if;
when sendR5 =>
startCounter <= '1';
morseOut <= '1';
case register5 is
when SHORT =>
unitNb <= "001";
when LONG =>
unitNb <= "011";
when others =>
report "Error when sending register5" severity error;
end case;
sending_next_state <= waitSpace;
when waitSpace =>
startCounter <= '0';
if counterDone = '1' then
morseOut <= '0';
sending_next_state <= waiting;
end if;
signRegistersSended <= '1';
when waitEndWord =>
sending_next_state <= waiting;
when others =>
sending_next_state <= waiting;
end case;
end process;
END ARCHITECTURE studentVersion; END ARCHITECTURE studentVersion;

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@ -1,30 +0,0 @@
-- VHDL Entity Morse.charToMorse.symbol
--
-- Created:
-- by - remi.heredero.UNKNOWN (WE2330808)
-- at - 13:09:12 10.04.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY charToMorse IS
GENERIC(
characterBitNb : positive := 8;
unitCountDivide : positive := 10E3
);
PORT(
morseOut : OUT std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic;
charIn : IN std_ulogic_vector (characterBitNb-1 DOWNTO 0);
readChar : OUT std_ulogic;
charNotReady : IN std_ulogic
);
-- Declarations
END charToMorse ;

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@ -1,98 +0,0 @@
--
-- VHDL Architecture Morse.charToMorse.struct
--
-- Created:
-- by - remi.heredero.UNKNOWN (WE2330808)
-- at - 13:09:12 10.04.2024
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY Morse;
ARCHITECTURE struct OF charToMorse IS
-- Architecture declarations
constant unitCountBitNb: positive := 3;
-- Internal signal declarations
SIGNAL startCounter : std_ulogic;
SIGNAL done : std_ulogic;
SIGNAL unitNb : unsigned(unitCountBitNb-1 DOWNTO 0);
-- Component Declarations
COMPONENT charToMorseController
GENERIC (
characterBitNb : positive := 8;
unitCountBitNb : positive := 3
);
PORT (
morseOut : OUT std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic ;
charNotReady : IN std_ulogic ;
char : IN std_ulogic_vector (characterBitNb-1 DOWNTO 0);
startCounter : OUT std_ulogic ;
unitNb : OUT unsigned (unitCountBitNb-1 DOWNTO 0);
counterDone : IN std_ulogic ;
readChar : OUT std_ulogic
);
END COMPONENT;
COMPONENT unitCounter
GENERIC (
unitCountDivide : positive := 10E3;
unitCountBitNb : positive := 3
);
PORT (
clock : IN std_ulogic ;
reset : IN std_ulogic ;
startCounter : IN std_ulogic ;
unitNb : IN unsigned (unitCountBitNb-1 DOWNTO 0);
done : OUT std_ulogic
);
END COMPONENT;
-- Optional embedded configurations
-- pragma synthesis_off
FOR ALL : charToMorseController USE ENTITY Morse.charToMorseController;
FOR ALL : unitCounter USE ENTITY Morse.unitCounter;
-- pragma synthesis_on
BEGIN
-- Instance port mappings.
I_ctl : charToMorseController
GENERIC MAP (
characterBitNb => characterBitNb,
unitCountBitNb => unitCountBitNb
)
PORT MAP (
morseOut => morseOut,
clock => clock,
reset => reset,
charNotReady => charNotReady,
char => charIn,
startCounter => startCounter,
unitNb => unitNb,
counterDone => done,
readChar => readChar
);
I_cnt : unitCounter
GENERIC MAP (
unitCountDivide => unitCountDivide,
unitCountBitNb => unitCountBitNb
)
PORT MAP (
clock => clock,
reset => reset,
startCounter => startCounter,
unitNb => unitNb,
done => done
);
END struct;

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@ -1,33 +0,0 @@
-- VHDL Entity Morse.charToMorseController.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:13:01 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY charToMorseController IS
GENERIC(
characterBitNb : positive := 8;
unitCountBitNb : positive := 3
);
PORT(
morseOut : OUT std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic;
charNotReady : IN std_ulogic;
char : IN std_ulogic_vector (characterBitNb-1 DOWNTO 0);
startCounter : OUT std_ulogic;
unitNb : OUT unsigned (unitCountBitNb-1 DOWNTO 0);
counterDone : IN std_ulogic;
readChar : OUT std_ulogic
);
-- Declarations
END charToMorseController ;

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@ -1,234 +0,0 @@
--
-- VHDL Architecture Morse.charToMorseController.fsm
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:50:02 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ARCHITECTURE fsm OF charToMorseController IS
TYPE STATE_TYPE IS (
waitForChar,
storeChar,
sendDotStart,
sendDotWait,
sendDotSpacerStart,
sendDotSpacerWait,
sendDotDotStart,
sendDotDotWait,
sendDotDashStart,
sendDotDashWait,
sendDashStart,
sendDashWait,
sendDahsSpacerStart,
sendDashSpacerWait,
sendDashDotStart,
sendDashDashStart,
sendDashDotWait,
sendDashDashWait,
popChar,
popChar1
);
-- Declare current and next state signals
SIGNAL current_state : STATE_TYPE;
SIGNAL next_state : STATE_TYPE;
BEGIN
-----------------------------------------------------------------
clocked_proc : PROCESS (
clock,
reset
)
-----------------------------------------------------------------
BEGIN
IF (reset = '1') THEN
current_state <= waitForChar;
ELSIF (clock'EVENT AND clock = '1') THEN
current_state <= next_state;
END IF;
END PROCESS clocked_proc;
-----------------------------------------------------------------
nextstate_proc : PROCESS (
char,
charNotReady,
counterDone,
current_state
)
-----------------------------------------------------------------
BEGIN
CASE current_state IS
WHEN waitForChar =>
IF (charNotReady = '0') THEN
next_state <= storeChar;
ELSE
next_state <= waitForChar;
END IF;
WHEN storeChar =>
IF (character'val(to_integer(unsigned(char))) = 'e' or
character'val(to_integer(unsigned(char))) = 'i' or
character'val(to_integer(unsigned(char))) = 'a') THEN
next_state <= sendDotStart;
ELSIF (character'val(to_integer(unsigned(char))) = 't' or
character'val(to_integer(unsigned(char))) = 'n' or
character'val(to_integer(unsigned(char))) = 'm') THEN
next_state <= sendDashStart;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDotStart =>
next_state <= sendDotWait;
WHEN sendDotWait =>
IF (counterDone = '0') THEN
next_state <= sendDotWait;
ELSIF (character'val(to_integer(unsigned(char))) = 'e') THEN
next_state <= popChar1;
ELSE
next_state <= sendDotSpacerStart;
END IF;
WHEN sendDotSpacerStart =>
next_state <= sendDotSpacerWait;
WHEN sendDotSpacerWait =>
IF (counterDone = '0') THEN
next_state <= sendDotSpacerWait;
ELSIF (character'val(to_integer(unsigned(char))) = 'i') THEN
next_state <= sendDotDotStart;
ELSE
next_state <= sendDotDashStart;
END IF;
WHEN sendDotDotStart =>
next_state <= sendDotDotWait;
WHEN sendDotDotWait =>
IF (counterDone = '0') THEN
next_state <= sendDotDotWait;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDotDashStart =>
next_state <= sendDotDashWait;
WHEN sendDotDashWait =>
IF (counterDone = '0') THEN
next_state <= sendDotDashWait;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDashStart =>
next_state <= sendDashWait;
WHEN sendDashWait =>
IF (counterDone = '0') THEN
next_state <= sendDashWait;
ELSIF (character'val(to_integer(unsigned(char))) = 't') THEN
next_state <= popChar1;
ELSE
next_state <= sendDahsSpacerStart;
END IF;
WHEN sendDahsSpacerStart =>
next_state <= sendDashSpacerWait;
WHEN sendDashSpacerWait =>
IF (counterDone = '0') THEN
next_state <= sendDashSpacerWait;
ELSIF (character'val(to_integer(unsigned(char))) = 'i') THEN
next_state <= sendDashDotStart;
ELSE
next_state <= sendDashDashStart;
END IF;
WHEN sendDashDotStart =>
next_state <= sendDashDotWait;
WHEN sendDashDashStart =>
next_state <= sendDashDashWait;
WHEN sendDashDotWait =>
IF (counterDone = '0') THEN
next_state <= sendDashDotWait;
ELSE
next_state <= popChar1;
END IF;
WHEN sendDashDashWait =>
IF (counterDone = '0') THEN
next_state <= sendDashDashWait;
ELSE
next_state <= popChar1;
END IF;
WHEN popChar =>
IF (counterDone = '1') THEN
next_state <= waitForChar;
ELSE
next_state <= popChar;
END IF;
WHEN popChar1 =>
next_state <= popChar;
WHEN OTHERS =>
next_state <= waitForChar;
END CASE;
END PROCESS nextstate_proc;
-----------------------------------------------------------------
output_proc : PROCESS (
current_state
)
-----------------------------------------------------------------
BEGIN
-- Default Assignment
morseOut <= '0';
startCounter <= '0';
unitNb <= (others => '0');
readChar <= '0';
-- Combined Actions
CASE current_state IS
WHEN sendDotStart =>
startCounter <= '1';
WHEN sendDotWait =>
unitNb <= to_unsigned(1, unitNb'length);
morseOut <= '1';
WHEN sendDotSpacerStart =>
startCounter <= '1';
WHEN sendDotSpacerWait =>
unitNb <= to_unsigned(1, unitNb'length);
WHEN sendDotDotStart =>
startCounter <= '1';
WHEN sendDotDotWait =>
unitNb <= to_unsigned(1, unitNb'length);
morseOut <= '1';
WHEN sendDotDashStart =>
startCounter <= '1';
WHEN sendDotDashWait =>
unitNb <= to_unsigned(3, unitNb'length);
morseOut <= '1';
WHEN sendDashStart =>
startCounter <= '1';
WHEN sendDashWait =>
unitNb <= to_unsigned(3, unitNb'length);
morseOut <= '1';
WHEN sendDahsSpacerStart =>
startCounter <= '1';
WHEN sendDashSpacerWait =>
unitNb <= to_unsigned(1, unitNb'length);
WHEN sendDashDotStart =>
startCounter <= '1';
WHEN sendDashDashStart =>
startCounter <= '1';
WHEN sendDashDotWait =>
unitNb <= to_unsigned(1, unitNb'length);
morseOut <= '1';
WHEN sendDashDashWait =>
unitNb <= to_unsigned(3, unitNb'length);
morseOut <= '1';
WHEN popChar =>
unitNb <= to_unsigned(3, unitNb'length);
WHEN popChar1 =>
readChar <= '1';
startCounter <= '1';
WHEN OTHERS =>
NULL;
END CASE;
END PROCESS output_proc;
END fsm;

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@ -1,31 +0,0 @@
-- VHDL Entity Morse.morseEncoder.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:13:01 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY morseEncoder IS
GENERIC(
clockFrequency : real := 100.0E6;
uartBaudRate : real := 115.2E3;
uartDataBitNb : positive := 8;
unitDuration : real := 100.0E-3;
toneFrequency : real := 300.0
);
PORT(
morseCode : OUT std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic;
RxD : IN std_ulogic
);
-- Declarations
END morseEncoder ;

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@ -1,154 +0,0 @@
--
-- VHDL Architecture Morse.morseEncoder.struct
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:50:20 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
LIBRARY Memory;
LIBRARY Morse;
LIBRARY RS232;
ARCHITECTURE struct OF morseEncoder IS
-- Architecture declarations
constant fifoDepth : positive := 100;
-- Internal signal declarations
SIGNAL characterReg : std_ulogic_vector(uartDataBitNb-1 DOWNTO 0);
SIGNAL characterIn : std_ulogic_vector(uartDataBitNb-1 DOWNTO 0);
SIGNAL characterValid : std_ulogic;
SIGNAL morseOut : std_ulogic;
SIGNAL tone : std_ulogic;
SIGNAL charNotReady : std_ulogic;
SIGNAL readChar : std_ulogic;
-- Component Declarations
COMPONENT FIFO_bram
GENERIC (
dataBitNb : positive := 8;
depth : positive := 8
);
PORT (
write : IN std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic ;
dataOut : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0);
read : IN std_ulogic ;
dataIn : IN std_ulogic_vector (dataBitNb-1 DOWNTO 0);
empty : OUT std_ulogic ;
full : OUT std_ulogic
);
END COMPONENT;
COMPONENT charToMorse
GENERIC (
characterBitNb : positive := 8;
unitCountDivide : positive := 10E3
);
PORT (
morseOut : OUT std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic ;
charIn : IN std_ulogic_vector (characterBitNb-1 DOWNTO 0);
readChar : OUT std_ulogic ;
charNotReady : IN std_ulogic
);
END COMPONENT;
COMPONENT toneGenerator
GENERIC (
toneDivide : positive := 100E3
);
PORT (
tone : OUT std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic
);
END COMPONENT;
COMPONENT serialPortReceiver
GENERIC (
dataBitNb : positive := 8;
baudRateDivide : positive := 2083
);
PORT (
RxD : IN std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic ;
dataOut : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0);
dataValid : OUT std_ulogic
);
END COMPONENT;
-- Optional embedded configurations
-- pragma synthesis_off
FOR ALL : FIFO_bram USE ENTITY Memory.FIFO_bram;
FOR ALL : charToMorse USE ENTITY Morse.charToMorse;
FOR ALL : serialPortReceiver USE ENTITY RS232.serialPortReceiver;
FOR ALL : toneGenerator USE ENTITY Morse.toneGenerator;
-- pragma synthesis_on
BEGIN
-- Architecture concurrent statements
-- HDL Embedded Text Block 1 eb1
morseCode <= morseOut and tone;
-- Instance port mappings.
I_FIFO : FIFO_bram
GENERIC MAP (
dataBitNb => uartDataBitNb,
depth => fifoDepth
)
PORT MAP (
write => characterValid,
clock => clock,
reset => reset,
dataOut => characterReg,
read => readChar,
dataIn => characterIn,
empty => charNotReady,
full => OPEN
);
I_enc : charToMorse
GENERIC MAP (
characterBitNb => uartDataBitNb,
unitCountDivide => integer(clockFrequency*unitDuration + 0.5)
)
PORT MAP (
morseOut => morseOut,
clock => clock,
reset => reset,
charNotReady => charNotReady,
charIn => characterReg,
readChar => readChar
);
I_tone : toneGenerator
GENERIC MAP (
toneDivide => integer(clockFrequency/toneFrequency + 0.5)
)
PORT MAP (
tone => tone,
clock => clock,
reset => reset
);
I_UART : serialPortReceiver
GENERIC MAP (
dataBitNb => uartDataBitNb,
baudRateDivide => integer(clockFrequency/uartBaudRate + 0.5)
)
PORT MAP (
RxD => RxD,
clock => clock,
reset => reset,
dataOut => characterIn,
dataValid => characterValid
);
END struct;

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@ -1,26 +0,0 @@
-- VHDL Entity Morse.toneGenerator.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:13:01 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY toneGenerator IS
GENERIC(
toneDivide : positive := 100E3
);
PORT(
tone : OUT std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic
);
-- Declarations
END toneGenerator ;

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@ -1,29 +0,0 @@
-- VHDL Entity Morse.unitCounter.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:13:01 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY unitCounter IS
GENERIC(
unitCountDivide : positive := 10E3;
unitCountBitNb : positive := 3
);
PORT(
clock : IN std_ulogic;
reset : IN std_ulogic;
startCounter : IN std_ulogic;
unitNb : IN unsigned (unitCountBitNb-1 DOWNTO 0);
done : OUT std_ulogic
);
-- Declarations
END unitCounter ;

Binary file not shown.

View File

@ -1,33 +0,0 @@
DESIGN char@to@morse
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN char@to@morse
VIEW symbol.sb
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DESIGN char@to@morse
VIEW symbol.sb
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DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 204,0 18 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 310,0 19 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 315,0 20 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 457,0 21 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 581,0 22 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 348,0 23 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 1,0 26 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 1,0 27 0

View File

@ -1,161 +0,0 @@
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 123,0 9 0
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 12
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 0,0 15 2
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 1,0 18 0
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 18
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 365,0 21 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 371,0 22 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 377,0 23 0
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 24
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 25
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW student@version
GRAPHIC 806,0 27 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 14,0 28 1
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 204,0 33 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 310,0 34 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 315,0 35 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 348,0 36 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 457,0 37 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 671,0 38 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 676,0 39 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 681,0 40 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 764,0 41 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 427,0 44 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 14,0 45 1
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 310,0 50 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 315,0 51 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 671,0 52 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 676,0 53 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 681,0 54 0
LIBRARY Morse
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 57
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 806,0 60 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 427,0 61 0
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 64
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 66
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 806,0 68 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 813,0 69 1
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 15,0 74 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 29,0 75 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 43,0 76 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 633,0 77 0
DESIGN char@to@morse
VIEW struct.bd
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DESIGN char@to@morse
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DESIGN char@to@morse
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GRAPHIC 379,0 80 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 373,0 81 0
DESIGN char@to@morse
VIEW struct.bd
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DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 427,0 84 0
DESIGN char@to@morse
VIEW struct.bd
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DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 397,0 90 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 389,0 91 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 367,0 92 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 379,0 93 0
DESIGN char@to@morse
VIEW struct.bd
GRAPHIC 373,0 94 0
DESIGN char@to@morse
VIEW struct.bd
NO_GRAPHIC 97

View File

@ -1,42 +0,0 @@
DESIGN char@to@morse@controller
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 50,0 8 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 13,0 13 1
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 204,0 18 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 310,0 19 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 315,0 20 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 348,0 21 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 457,0 22 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 671,0 23 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 676,0 24 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 681,0 25 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 764,0 26 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 1,0 29 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 1,0 30 0

View File

@ -1,600 +0,0 @@
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 27,0 9 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 12
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 45 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 46
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 49 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 50
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 66,0 51 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 56,0 53 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 54
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 56 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 57
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 59 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 60
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 67 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 39,0 68 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 186,0 69 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 164,0 70 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 39,0 72 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 73
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 164,0 74 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 213,0 75 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 191,0 78 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1083,0 156 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1027,0 162 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 163
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1083,0 164 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1027,0 165 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 168
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 169 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 172 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 173
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 26,0 178 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 182
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 184 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 191,0 185 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 206,0 186 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 325,0 187 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 340,0 188 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 364,0 190 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 379,0 191 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
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LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 396,0 193 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 428,0 194 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 443,0 195 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 445,0 196 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 460,0 197 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 502,0 199 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 517,0 200 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 519,0 201 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 534,0 202 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 586,0 204 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 601,0 205 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 603,0 206 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 618,0 207 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 620,0 209 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 635,0 210 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 637,0 211 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 652,0 212 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 654,0 213 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 669,0 214 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 671,0 215 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 686,0 216 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 688,0 217 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 703,0 218 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 705,0 220 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 720,0 221 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1027,0 223 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1042,0 224 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1083,0 225 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 1098,0 226 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 228
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
GRAPHIC 2,0 230 0
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW fsm.sm
NO_GRAPHIC 232

View File

@ -1,27 +0,0 @@
DESIGN morse@encoder
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 50,0 8 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 13,0 13 1
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 204,0 21 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 310,0 22 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 315,0 23 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 671,0 24 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 1,0 27 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 1,0 28 0

View File

@ -1,256 +0,0 @@
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 105,0 9 0
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 12
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 0,0 17 2
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1,0 20 0
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 20
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 435,0 23 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 351,0 24 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 353,0 25 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 720,0 26 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 732,0 27 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1089,0 28 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1095,0 29 0
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 30
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 31
LIBRARY Memory
DESIGN @f@i@f@o_bram
VIEW @r@t@l
GRAPHIC 1764,0 33 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 14,0 34 1
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 168,0 39 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 173,0 40 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 178,0 41 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 188,0 42 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 193,0 43 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 216,0 44 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 221,0 45 0
DESIGN @f@i@f@o_bram
VIEW symbol.sb
GRAPHIC 229,0 46 0
LIBRARY Morse
DESIGN char@to@morse
VIEW struct
GRAPHIC 1073,0 49 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 14,0 50 1
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 204,0 55 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 310,0 56 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 315,0 57 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 457,0 58 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 581,0 59 0
DESIGN char@to@morse
VIEW symbol.sb
GRAPHIC 348,0 60 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 756,0 63 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 14,0 64 1
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 204,0 68 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 310,0 69 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 315,0 70 0
LIBRARY RS232
DESIGN serial@port@receiver
VIEW @r@t@l
GRAPHIC 193,0 73 0
DESIGN serial@port@receiver
VIEW symbol.sb
GRAPHIC 14,0 74 1
DESIGN serial@port@receiver
VIEW symbol.sb
GRAPHIC 168,0 79 0
DESIGN serial@port@receiver
VIEW symbol.sb
GRAPHIC 173,0 80 0
DESIGN serial@port@receiver
VIEW symbol.sb
GRAPHIC 178,0 81 0
DESIGN serial@port@receiver
VIEW symbol.sb
GRAPHIC 188,0 82 0
DESIGN serial@port@receiver
VIEW symbol.sb
GRAPHIC 193,0 83 0
LIBRARY Morse
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 86
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1764,0 89 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1073,0 90 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 193,0 91 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 756,0 92 0
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 95
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 714,0 98 0
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 100
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 101
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1764,0 103 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1771,0 104 1
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 213,0 109 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 419,0 110 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 411,0 111 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 427,0 112 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1097,0 113 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 205,0 114 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1091,0 115 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1073,0 118 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1080,0 119 1
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 722,0 124 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 517,0 125 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 509,0 126 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1091,0 127 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 427,0 128 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1097,0 129 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 756,0 131 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 763,0 132 1
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 734,0 136 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 654,0 137 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 646,0 138 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 193,0 140 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 200,0 141 1
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 1550,0 146 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 15,0 147 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 43,0 148 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 205,0 149 0
DESIGN morse@encoder
VIEW struct.bd
GRAPHIC 213,0 150 0
DESIGN morse@encoder
VIEW struct.bd
NO_GRAPHIC 153

View File

@ -1,24 +0,0 @@
DESIGN tone@generator
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 50,0 8 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 13,0 13 1
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 204,0 17 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 310,0 18 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 315,0 19 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 1,0 22 0
DESIGN tone@generator
VIEW symbol.sb
GRAPHIC 1,0 23 0

View File

@ -1,30 +0,0 @@
DESIGN unit@counter
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 50,0 8 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 13,0 13 1
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 310,0 18 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 315,0 19 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 671,0 20 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 676,0 21 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 681,0 22 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 1,0 25 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 1,0 26 0

View File

@ -64,23 +64,23 @@ VExpander (VariableExpander
vvMap [ vvMap [
(vvPair (vvPair
variable "HDLDir" variable "HDLDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hdl" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hdl"
) )
(vvPair (vvPair
variable "HDSDir" variable "HDSDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds"
) )
(vvPair (vvPair
variable "SideDataDesignDir" variable "SideDataDesignDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\struct.bd.info" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\struct.bd.info"
) )
(vvPair (vvPair
variable "SideDataUserDir" variable "SideDataUserDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\struct.bd.user" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\struct.bd.user"
) )
(vvPair (vvPair
variable "SourceDir" variable "SourceDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds"
) )
(vvPair (vvPair
variable "appl" variable "appl"
@ -104,27 +104,27 @@ value "%(unit)_%(view)_config"
) )
(vvPair (vvPair
variable "d" variable "d"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse"
) )
(vvPair (vvPair
variable "d_logical" variable "d_logical"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse"
) )
(vvPair (vvPair
variable "date" variable "date"
value "10.04.2024" value "28.04.2023"
) )
(vvPair (vvPair
variable "day" variable "day"
value "mer." value "ven."
) )
(vvPair (vvPair
variable "day_long" variable "day_long"
value "mercredi" value "vendredi"
) )
(vvPair (vvPair
variable "dd" variable "dd"
value "10" value "28"
) )
(vvPair (vvPair
variable "designName" variable "designName"
@ -152,11 +152,11 @@ value "struct"
) )
(vvPair (vvPair
variable "graphical_source_author" variable "graphical_source_author"
value "remi.heredero" value "axel.amand"
) )
(vvPair (vvPair
variable "graphical_source_date" variable "graphical_source_date"
value "10.04.2024" value "28.04.2023"
) )
(vvPair (vvPair
variable "graphical_source_group" variable "graphical_source_group"
@ -164,11 +164,11 @@ value "UNKNOWN"
) )
(vvPair (vvPair
variable "graphical_source_host" variable "graphical_source_host"
value "WE2330808" value "WE7860"
) )
(vvPair (vvPair
variable "graphical_source_time" variable "graphical_source_time"
value "13:09:12" value "14:49:52"
) )
(vvPair (vvPair
variable "group" variable "group"
@ -176,7 +176,7 @@ value "UNKNOWN"
) )
(vvPair (vvPair
variable "host" variable "host"
value "WE2330808" value "WE7860"
) )
(vvPair (vvPair
variable "language" variable "language"
@ -187,10 +187,6 @@ variable "library"
value "Morse" value "Morse"
) )
(vvPair (vvPair
variable "library_downstream_Concatenation"
value "$HDS_PROJECT_DIR/../Morse/concat"
)
(vvPair
variable "library_downstream_ModelSimCompiler" variable "library_downstream_ModelSimCompiler"
value "$SCRATCH_DIR/Morse" value "$SCRATCH_DIR/Morse"
) )
@ -212,11 +208,11 @@ value "avril"
) )
(vvPair (vvPair
variable "p" variable "p"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\struct.bd" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\struct.bd"
) )
(vvPair (vvPair
variable "p_logical" variable "p_logical"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse\\struct.bd" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse\\struct.bd"
) )
(vvPair (vvPair
variable "package_name" variable "package_name"
@ -268,7 +264,7 @@ value "struct"
) )
(vvPair (vvPair
variable "time" variable "time"
value "13:09:12" value "14:49:52"
) )
(vvPair (vvPair
variable "unit" variable "unit"
@ -276,7 +272,7 @@ value "charToMorse"
) )
(vvPair (vvPair
variable "user" variable "user"
value "remi.heredero" value "axel.amand"
) )
(vvPair (vvPair
variable "version" variable "version"
@ -288,11 +284,11 @@ value "struct"
) )
(vvPair (vvPair
variable "year" variable "year"
value "2024" value "2023"
) )
(vvPair (vvPair
variable "yy" variable "yy"
value "24" value "23"
) )
] ]
) )
@ -1696,7 +1692,7 @@ text (MLText
uid 814,0 uid 814,0
va (VaSet va (VaSet
) )
xt "12000,42600,38700,45000" xt "15000,42600,41700,45000"
st "characterBitNb = characterBitNb ( positive ) st "characterBitNb = characterBitNb ( positive )
unitCountBitNb = unitCountBitNb ( positive ) " unitCountBitNb = unitCountBitNb ( positive ) "
) )
@ -1910,9 +1906,9 @@ f (Text
uid 370,0 uid 370,0
va (VaSet va (VaSet
) )
xt "34000,29800,41800,31000" xt "33750,30000,41550,31200"
st "startCounter" st "startCounter"
blo "34000,30800" blo "33750,31000"
tm "WireNameMgr" tm "WireNameMgr"
) )
) )
@ -1990,9 +1986,9 @@ f (Text
uid 382,0 uid 382,0
va (VaSet va (VaSet
) )
xt "34000,31800,38000,33000" xt "33750,32000,37750,33200"
st "unitNb" st "unitNb"
blo "34000,32800" blo "33750,33000"
tm "WireNameMgr" tm "WireNameMgr"
) )
) )
@ -2250,8 +2246,8 @@ tm "BdCompilerDirectivesTextMgr"
] ]
associable 1 associable 1
) )
windowSize "301,100,1557,827" windowSize "-8,-8,1928,1048"
viewArea "-750,11425,76350,54400" viewArea "-8435,-1430,118740,67667"
cachedDiagramExtent "-7000,0,90000,66000" cachedDiagramExtent "-7000,0,90000,66000"
pageSetupInfo (PageSetupInfo pageSetupInfo (PageSetupInfo
ptrCmd "" ptrCmd ""
@ -2278,7 +2274,7 @@ exportStdPackageRefs 1
) )
hasePageBreakOrigin 1 hasePageBreakOrigin 1
pageBreakOrigin "-7000,0" pageBreakOrigin "-7000,0"
lastUid 950,0 lastUid 923,0
defaultCommentText (CommentText defaultCommentText (CommentText
shape (Rectangle shape (Rectangle
layer 0 layer 0

File diff suppressed because it is too large Load Diff

View File

@ -477,23 +477,23 @@ value " "
) )
(vvPair (vvPair
variable "HDLDir" variable "HDLDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hdl" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hdl"
) )
(vvPair (vvPair
variable "HDSDir" variable "HDSDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds"
) )
(vvPair (vvPair
variable "SideDataDesignDir" variable "SideDataDesignDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\symbol.sb.info" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\symbol.sb.info"
) )
(vvPair (vvPair
variable "SideDataUserDir" variable "SideDataUserDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\symbol.sb.user" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\symbol.sb.user"
) )
(vvPair (vvPair
variable "SourceDir" variable "SourceDir"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds"
) )
(vvPair (vvPair
variable "appl" variable "appl"
@ -517,27 +517,27 @@ value "%(unit)_%(view)_config"
) )
(vvPair (vvPair
variable "d" variable "d"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse"
) )
(vvPair (vvPair
variable "d_logical" variable "d_logical"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse"
) )
(vvPair (vvPair
variable "date" variable "date"
value "10.04.2024" value "28.04.2023"
) )
(vvPair (vvPair
variable "day" variable "day"
value "mer." value "ven."
) )
(vvPair (vvPair
variable "day_long" variable "day_long"
value "mercredi" value "vendredi"
) )
(vvPair (vvPair
variable "dd" variable "dd"
value "10" value "28"
) )
(vvPair (vvPair
variable "designName" variable "designName"
@ -565,11 +565,11 @@ value "symbol"
) )
(vvPair (vvPair
variable "graphical_source_author" variable "graphical_source_author"
value "remi.heredero" value "axel.amand"
) )
(vvPair (vvPair
variable "graphical_source_date" variable "graphical_source_date"
value "10.04.2024" value "28.04.2023"
) )
(vvPair (vvPair
variable "graphical_source_group" variable "graphical_source_group"
@ -577,11 +577,11 @@ value "UNKNOWN"
) )
(vvPair (vvPair
variable "graphical_source_host" variable "graphical_source_host"
value "WE2330808" value "WE7860"
) )
(vvPair (vvPair
variable "graphical_source_time" variable "graphical_source_time"
value "13:09:12" value "14:49:52"
) )
(vvPair (vvPair
variable "group" variable "group"
@ -589,7 +589,7 @@ value "UNKNOWN"
) )
(vvPair (vvPair
variable "host" variable "host"
value "WE2330808" value "WE7860"
) )
(vvPair (vvPair
variable "language" variable "language"
@ -600,10 +600,6 @@ variable "library"
value "Morse" value "Morse"
) )
(vvPair (vvPair
variable "library_downstream_Concatenation"
value "$HDS_PROJECT_DIR/../Morse/concat"
)
(vvPair
variable "library_downstream_Generic_1_file" variable "library_downstream_Generic_1_file"
value "U:\\SEm_curves\\Synthesis" value "U:\\SEm_curves\\Synthesis"
) )
@ -637,11 +633,11 @@ value "avril"
) )
(vvPair (vvPair
variable "p" variable "p"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\symbol.sb" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\char@to@morse\\symbol.sb"
) )
(vvPair (vvPair
variable "p_logical" variable "p_logical"
value "C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse\\symbol.sb" value "C:\\dev\\sem-labs\\05-Morse\\Prefs\\..\\Morse\\hds\\charToMorse\\symbol.sb"
) )
(vvPair (vvPair
variable "package_name" variable "package_name"
@ -717,7 +713,7 @@ value "symbol"
) )
(vvPair (vvPair
variable "time" variable "time"
value "13:09:12" value "14:49:52"
) )
(vvPair (vvPair
variable "unit" variable "unit"
@ -725,7 +721,7 @@ value "charToMorse"
) )
(vvPair (vvPair
variable "user" variable "user"
value "remi.heredero" value "axel.amand"
) )
(vvPair (vvPair
variable "version" variable "version"
@ -737,11 +733,11 @@ value "symbol"
) )
(vvPair (vvPair
variable "year" variable "year"
value "2024" value "2023"
) )
(vvPair (vvPair
variable "yy" variable "yy"
value "24" value "23"
) )
] ]
) )
@ -1719,7 +1715,7 @@ xt "0,6000,0,6000"
tm "SyDeclarativeTextMgr" tm "SyDeclarativeTextMgr"
) )
) )
lastUid 841,0 lastUid 818,0
okToSyncOnLoad 1 okToSyncOnLoad 1
OkToSyncGenericsOnLoad 1 OkToSyncGenericsOnLoad 1
activeModelName "Symbol" activeModelName "Symbol"

View File

@ -1,6 +0,0 @@
EDIT_LOCK
remi.heredero
UNKNOWN
WE2330808
16888
27.03.2024-13:12:03.328000

View File

@ -1,15 +0,0 @@
-- VHDL Entity Morse_test.charToMorseController_tb.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:12:49 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
ENTITY charToMorseController_tb IS
-- Declarations
END charToMorseController_tb ;

View File

@ -1,137 +0,0 @@
--
-- VHDL Architecture Morse_test.charToMorseController_tb.struct
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:50:43 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.ALL;
LIBRARY Morse;
LIBRARY Morse_test;
ARCHITECTURE struct OF charToMorseController_tb IS
-- Architecture declarations
constant characterBitNb: positive := 7;
constant unitCountBitNb: positive := 3;
constant unitDuration: real := 50.0E-6;
constant clockFrequency: real := 60.0E6;
--constant clockFrequency: real := 66.0E6;
-- Internal signal declarations
SIGNAL char : std_ulogic_vector(characterBitNb-1 DOWNTO 0);
SIGNAL charNotReady : std_ulogic;
SIGNAL clock : std_ulogic;
SIGNAL done : std_ulogic;
SIGNAL morseOut : std_ulogic;
SIGNAL readChar : std_ulogic;
SIGNAL reset : std_ulogic;
SIGNAL startCounter : std_ulogic;
SIGNAL unitNb : unsigned(unitCountBitNb-1 DOWNTO 0);
-- Component Declarations
COMPONENT charToMorseController
GENERIC (
characterBitNb : positive := 8;
unitCountBitNb : positive := 3
);
PORT (
morseOut : OUT std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic ;
charNotReady : IN std_ulogic ;
char : IN std_ulogic_vector (characterBitNb-1 DOWNTO 0);
startCounter : OUT std_ulogic ;
unitNb : OUT unsigned (unitCountBitNb-1 DOWNTO 0);
counterDone : IN std_ulogic ;
readChar : OUT std_ulogic
);
END COMPONENT;
COMPONENT unitCounter
GENERIC (
unitCountDivide : positive := 10E3;
unitCountBitNb : positive := 3
);
PORT (
clock : IN std_ulogic ;
reset : IN std_ulogic ;
startCounter : IN std_ulogic ;
unitNb : IN unsigned (unitCountBitNb-1 DOWNTO 0);
done : OUT std_ulogic
);
END COMPONENT;
COMPONENT charToMorseController_tester
GENERIC (
clockFrequency : real;
characterBitNb : positive
);
PORT (
morseOut : IN std_ulogic ;
readChar : IN std_ulogic ;
char : OUT std_ulogic_vector (characterBitNb-1 DOWNTO 0);
charNotReady : OUT std_ulogic ;
clock : OUT std_ulogic ;
reset : OUT std_ulogic
);
END COMPONENT;
-- Optional embedded configurations
-- pragma synthesis_off
FOR ALL : charToMorseController USE ENTITY Morse.charToMorseController;
FOR ALL : charToMorseController_tester USE ENTITY Morse_test.charToMorseController_tester;
FOR ALL : unitCounter USE ENTITY Morse.unitCounter;
-- pragma synthesis_on
BEGIN
-- Instance port mappings.
I_DUT : charToMorseController
GENERIC MAP (
characterBitNb => characterBitNb,
unitCountBitNb => unitCountBitNb
)
PORT MAP (
morseOut => morseOut,
clock => clock,
reset => reset,
charNotReady => charNotReady,
char => char,
startCounter => startCounter,
unitNb => unitNb,
counterDone => done,
readChar => readChar
);
I_cnt : unitCounter
GENERIC MAP (
unitCountDivide => integer(clockFrequency*unitDuration + 0.5),
unitCountBitNb => unitCountBitNb
)
PORT MAP (
clock => clock,
reset => reset,
startCounter => startCounter,
unitNb => unitNb,
done => done
);
I_tester : charToMorseController_tester
GENERIC MAP (
clockFrequency => clockFrequency,
characterBitNb => characterBitNb
)
PORT MAP (
morseOut => morseOut,
readChar => readChar,
char => char,
charNotReady => charNotReady,
clock => clock,
reset => reset
);
END struct;

View File

@ -1,30 +0,0 @@
-- VHDL Entity Morse_test.charToMorseController_tester.interface
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:50:43 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.ALL;
ENTITY charToMorseController_tester IS
GENERIC(
clockFrequency : real;
characterBitNb : positive
);
PORT(
morseOut : IN std_ulogic;
readChar : IN std_ulogic;
char : OUT std_ulogic_vector (characterBitNb-1 DOWNTO 0);
charNotReady : OUT std_ulogic;
clock : OUT std_ulogic;
reset : OUT std_ulogic
);
-- Declarations
END charToMorseController_tester ;

View File

@ -1,15 +0,0 @@
-- VHDL Entity Morse_test.morseEncoder_tb.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 09:12:49 03/29/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
ENTITY morseEncoder_tb IS
-- Declarations
END morseEncoder_tb ;

View File

@ -1,101 +0,0 @@
--
-- VHDL Architecture Morse_test.morseEncoder_tb.struct
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:51:13 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.ALL;
LIBRARY Morse;
LIBRARY Morse_test;
ARCHITECTURE struct OF morseEncoder_tb IS
-- Architecture declarations
constant clockFrequency: real := 60.0E6;
--constant clockFrequency: real := 66.0E6;
constant uartBaudRate: real := 115.2E3;
constant uartDataBitNb: positive := 7;
constant morseUnitDuration: real := 50.0E-6;
constant morseToneFrequency: real := 10.0/morseUnitDuration;
-- Internal signal declarations
SIGNAL RxD : std_ulogic;
SIGNAL clock : std_ulogic;
SIGNAL morseCode : std_ulogic;
SIGNAL reset : std_ulogic;
-- Component Declarations
COMPONENT morseEncoder
GENERIC (
clockFrequency : real := 100.0E6;
uartBaudRate : real := 115.2E3;
uartDataBitNb : positive := 8;
unitDuration : real := 100.0E-3;
toneFrequency : real := 300.0
);
PORT (
morseCode : OUT std_ulogic ;
clock : IN std_ulogic ;
reset : IN std_ulogic ;
RxD : IN std_ulogic
);
END COMPONENT;
COMPONENT morseEncoder_tester
GENERIC (
clockFrequency : real;
uartBaudRate : real;
uartDataBitNb : positive
);
PORT (
morseCode : IN std_ulogic ;
RxD : OUT std_ulogic ;
clock : OUT std_ulogic ;
reset : OUT std_ulogic
);
END COMPONENT;
-- Optional embedded configurations
-- pragma synthesis_off
FOR ALL : morseEncoder USE ENTITY Morse.morseEncoder;
FOR ALL : morseEncoder_tester USE ENTITY Morse_test.morseEncoder_tester;
-- pragma synthesis_on
BEGIN
-- Instance port mappings.
I_DUT : morseEncoder
GENERIC MAP (
clockFrequency => clockFrequency,
uartBaudRate => uartBaudRate,
uartDataBitNb => uartDataBitNb,
unitDuration => morseUnitDuration,
toneFrequency => morseToneFrequency
)
PORT MAP (
morseCode => morseCode,
clock => clock,
reset => reset,
RxD => RxD
);
I_tester : morseEncoder_tester
GENERIC MAP (
clockFrequency => clockFrequency,
uartBaudRate => uartBaudRate,
uartDataBitNb => uartDataBitNb
)
PORT MAP (
morseCode => morseCode,
RxD => RxD,
clock => clock,
reset => reset
);
END struct;

View File

@ -1,29 +0,0 @@
-- VHDL Entity Morse_test.morseEncoder_tester.interface
--
-- Created:
-- by - axel.amand.UNKNOWN (WE7860)
-- at - 14:51:13 28.04.2023
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.ALL;
ENTITY morseEncoder_tester IS
GENERIC(
clockFrequency : real;
uartBaudRate : real;
uartDataBitNb : positive
);
PORT(
morseCode : IN std_ulogic;
RxD : OUT std_ulogic;
clock : OUT std_ulogic;
reset : OUT std_ulogic
);
-- Declarations
END morseEncoder_tester ;

Binary file not shown.

View File

@ -1,12 +0,0 @@
DESIGN char@to@morse@controller_tb
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN char@to@morse@controller_tb
VIEW symbol.sb
GRAPHIC 50,0 8 0
DESIGN char@to@morse@controller_tb
VIEW symbol.sb
GRAPHIC 1,0 11 0
DESIGN char@to@morse@controller_tb
VIEW symbol.sb
GRAPHIC 1,0 12 0

View File

@ -1,213 +0,0 @@
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 142,0 9 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 12
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 0,0 16 2
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 1,0 19 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 19
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3175,0 26 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3096,0 27 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 2564,0 28 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3145,0 29 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3167,0 30 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3088,0 31 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 2556,0 32 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3133,0 33 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3139,0 34 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 35
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 36
LIBRARY Morse
DESIGN char@to@morse@controller
VIEW student@version
GRAPHIC 3079,0 38 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 14,0 39 1
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 204,0 44 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 310,0 45 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 315,0 46 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 348,0 47 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 457,0 48 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 671,0 49 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 676,0 50 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 681,0 51 0
DESIGN char@to@morse@controller
VIEW symbol.sb
GRAPHIC 764,0 52 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3124,0 55 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 14,0 56 1
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 310,0 61 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 315,0 62 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 671,0 63 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 676,0 64 0
DESIGN unit@counter
VIEW symbol.sb
GRAPHIC 681,0 65 0
LIBRARY Morse_test
DESIGN char@to@morse@controller_tester
VIEW test
GRAPHIC 3410,0 68 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 14,0 69 1
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3169,0 74 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3090,0 75 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3177,0 76 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3098,0 77 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 2566,0 78 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 2558,0 79 0
LIBRARY Morse_test
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 82
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3079,0 85 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3410,0 86 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3124,0 87 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 90
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 92
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3079,0 94 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3086,0 95 1
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3169,0 100 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 2566,0 101 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 2558,0 102 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3098,0 103 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3177,0 104 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3135,0 105 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3141,0 106 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3147,0 107 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3090,0 108 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3124,0 110 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3131,0 111 1
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3159,0 116 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3151,0 117 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3135,0 118 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3141,0 119 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3147,0 120 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3410,0 122 0
DESIGN char@to@morse@controller_tb
VIEW struct.bd
GRAPHIC 3417,0 123 1
DESIGN char@to@morse@controller_tb
VIEW struct.bd
NO_GRAPHIC 136

View File

@ -1,33 +0,0 @@
DESIGN char@to@morse@controller_tester
VIEW interface
NO_GRAPHIC 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 50,0 8 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 13,0 13 1
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 586,0 18 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 591,0 19 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 571,0 20 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 576,0 21 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 581,0 22 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 596,0 23 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 1,0 26 0
DESIGN char@to@morse@controller_tester
VIEW interface
GRAPHIC 1,0 27 0

View File

@ -1,12 +0,0 @@
DESIGN morse@encoder_tb
VIEW symbol.sb
NO_GRAPHIC 0
DESIGN morse@encoder_tb
VIEW symbol.sb
GRAPHIC 50,0 8 0
DESIGN morse@encoder_tb
VIEW symbol.sb
GRAPHIC 1,0 11 0
DESIGN morse@encoder_tb
VIEW symbol.sb
GRAPHIC 1,0 12 0

View File

@ -1,117 +0,0 @@
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 142,0 9 0
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 12
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 0,0 16 2
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 1,0 19 0
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 19
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2572,0 27 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2564,0 28 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2580,0 29 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2556,0 30 0
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 31
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 32
LIBRARY Morse
DESIGN morse@encoder
VIEW struct
GRAPHIC 2755,0 34 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 14,0 35 1
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 204,0 43 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 310,0 44 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 315,0 45 0
DESIGN morse@encoder
VIEW symbol.sb
GRAPHIC 671,0 46 0
LIBRARY Morse_test
DESIGN morse@encoder_tester
VIEW test
GRAPHIC 2178,0 49 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 14,0 50 1
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2582,0 56 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2574,0 57 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2566,0 58 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2558,0 59 0
LIBRARY Morse_test
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 62
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2755,0 65 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2178,0 66 0
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 69
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 71
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2755,0 73 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2762,0 74 1
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2582,0 82 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2566,0 83 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2558,0 84 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2574,0 85 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2178,0 87 0
DESIGN morse@encoder_tb
VIEW struct.bd
GRAPHIC 2185,0 88 1
DESIGN morse@encoder_tb
VIEW struct.bd
NO_GRAPHIC 100

View File

@ -1,27 +0,0 @@
DESIGN morse@encoder_tester
VIEW interface
NO_GRAPHIC 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 50,0 8 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 13,0 13 1
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 563,0 19 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 573,0 20 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 558,0 21 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 568,0 22 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 1,0 25 0
DESIGN morse@encoder_tester
VIEW interface
GRAPHIC 1,0 26 0

View File

@ -1,6 +1,5 @@
[Concat] [Concat]
Board = $HDS_PROJECT_DIR/../Board/concat Board = $HDS_PROJECT_DIR/../Board/concat
Morse = $HDS_PROJECT_DIR\..\Morse\concat
[ModelSim] [ModelSim]
Board = $SCRATCH_DIR/Board Board = $SCRATCH_DIR/Board
Common = $SCRATCH_DIR/Common Common = $SCRATCH_DIR/Common

View File

@ -1,55 +0,0 @@
version "8.0"
RenoirTeamPreferences [
(BaseTeamPreferences
version "1.1"
verConcat 0
ttDGProps [
]
fcDGProps [
]
smDGProps [
]
asmDGProps [
]
bdDGProps [
]
syDGProps [
]
)
(VersionControlTeamPreferences
version "1.1"
VMPlugin ""
VMRepository "$HDS_HOME/examples/hds_scratch/hds_repository"
VMRcsHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/%(library)/hds_vm"
VMRcsHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository/%(library)/hdl_vm"
VMCvsHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hds_vm"
VMCvsHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hdl_vm"
VMCVSmkIIHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hds_vm"
VMCVSmkIIHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository"
VMVssHdsRepository "$/hds_scratch/hds_repository/%(library)/hds_vm"
VMVssHdlRepository "$/hds_scratch/hds_repository/%(library)/hdl_vm"
VMDsHdsRepository "sync://<host_name>:<port>/hds_scratch/hds_repository/hds_vm"
VMDsHdlRepository "sync://<host_name>:<port>/hds_scratch/hds_repository/hdl_vm"
VMPvcsHdsRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hds_vm"
VMPvcsHdlRepository "$HDS_HOME/examples/hds_scratch/hds_repository/hdl_vm"
VMSvnHdlRepository ""
VMDefaultView 1
VMCurrentDesignHierarchyOnly 0
VMUserData 1
VMGeneratedHDL 0
VMVerboseMode 0
VMAlwaysEmpty 0
VMSetTZ 1
VMSymbol 1
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"C:\\work\\edu\\sem\\labo\\sem_labs\\05-Morse\\Prefs\\hds.hdp" "C:\\work\\edu\\sem\\labo\\sem_labs\\05-Morse\\Prefs\\hds.hdp"
"C:\\dev\\sem-labs\\05-Morse\\Prefs\\hds.hdp" "C:\\dev\\sem-labs\\05-Morse\\Prefs\\hds.hdp"
"C:\\Users\\remi.heredero\\GIT\\2024-sem-labs-herederoremi\\05-Morse\\Prefs\\hds.hdp"
] ]
libMappingsRootDir "" libMappingsRootDir ""
teamLibMappingsRootDir "" teamLibMappingsRootDir ""
@ -1301,144 +1300,288 @@ exportedDirectories [
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exportStdPackageRefs 1 exportStdPackageRefs 1
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second "3" second "1"
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@ -21,7 +21,7 @@ onShortcutBar 0
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@ -1,32 +0,0 @@
-- VHDL Entity Memory.FIFO_bram.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 13:45:15 08/28/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY FIFO_bram IS
GENERIC(
dataBitNb : positive := 8;
depth : positive := 8
);
PORT(
write : IN std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic;
dataOut : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0);
read : IN std_ulogic;
dataIn : IN std_ulogic_vector (dataBitNb-1 DOWNTO 0);
empty : OUT std_ulogic;
full : OUT std_ulogic
);
-- Declarations
END FIFO_bram ;

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View File

@ -1,39 +0,0 @@
DESIGN @f@i@f@o_bram
VIEW symbol.sb
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View File

@ -1,29 +0,0 @@
-- VHDL Entity RS232.serialPortReceiver.symbol
--
-- Created:
-- by - francois.francois (Aphelia)
-- at - 13:45:48 08/28/19
--
-- Generated by Mentor Graphics' HDL Designer(TM) 2019.2 (Build 5)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.numeric_std.all;
ENTITY serialPortReceiver IS
GENERIC(
dataBitNb : positive := 8;
baudRateDivide : positive := 2083
);
PORT(
RxD : IN std_ulogic;
clock : IN std_ulogic;
reset : IN std_ulogic;
dataOut : OUT std_ulogic_vector (dataBitNb-1 DOWNTO 0);
dataValid : OUT std_ulogic
);
-- Declarations
END serialPortReceiver ;

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@ -1,30 +0,0 @@
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[Concat]
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WaveformGenerator = $SCRATCH_DIR/WaveformGenerator
WaveformGenerator_test = $SCRATCH_DIR/WaveformGenerator_test
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std = $HDS_HOME/hdl_libs/std/hdl
WaveformGenerator = $HDS_PROJECT_DIR/../WaveformGenerator/hdl
WaveformGenerator_test = $HDS_PROJECT_DIR/../WaveformGenerator_test/hdl
[hds]
ieee = $HDS_HOME/hdl_libs/ieee/hds
std = $HDS_HOME/hdl_libs/std/hds
WaveformGenerator = $HDS_PROJECT_DIR/../WaveformGenerator/hds
WaveformGenerator_test = $HDS_PROJECT_DIR/../WaveformGenerator_test/hds
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std = standard
[shared]
others = $HDS_TEAM_HOME/shared.hdp

View File

@ -1,23 +0,0 @@
[hds_settings]
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project_description = The standard HDS shared project
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std = $HDS_HOME/hdl_libs/std/hds
synopsys = $HDS_HOME/hdl_libs/synopsys/hds
verilog = $HDS_HOME/hdl_libs/verilog/hds
vital2000 = $HDS_HOME/hdl_libs/vital2000/hds
[hdl]
ieee = $HDS_HOME/hdl_libs/ieee/hdl
std = $HDS_HOME/hdl_libs/std/hdl
synopsys = $HDS_HOME/hdl_libs/synopsys/hdl
verilog = $HDS_HOME/hdl_libs/verilog/hdl
vital2000 = $HDS_HOME/hdl_libs/vital2000/hdl
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std = standard
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View File

@ -1,55 +0,0 @@
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VMDsHdlRepository "sync://<host_name>:<port>/hds_scratch/hds_repository/hdl_vm"
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"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"Generator"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Concatenate HDL"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_concatenate.bmp"
hasBitmap 1
tooltip "Appends all HDL files together"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
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"Concatenation"
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"TaskSetting"
(SettingsMap
settingsMap [
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"%(concat_file)"
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"v"
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""
]
)
]
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onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Trim libraries"
bitmap "tool_default_tool.bmp"
hasBitmap 1
tooltip "comment out library declarations for singles file"
taskSettings [
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(SettingsMap
settingsMap [
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".\\..\\..\\Scripts\\trimLibs.pl %(concat_file).vhd $DESIGN_NAME.vhd"
"captureOutput"
"1"
"customPrompt"
""
"initialDir"
"$CONCAT_DIR"
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"/usr/bin/perl"
"runnableObjectType"
"executable"
"useViewSpecific"
"0"
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]
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onShortcutBar 0
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onToolbar 0
enabled 1
hierDepth 3
)
]
)

View File

@ -1,114 +0,0 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Xilinx Project Navigator"
bitmap "/usr/opt/HDS/resources/bitmaps/tools/tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Xilinx Flow"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"flowSettingsDlg"
""
"taskInvocationScript"
""
]
)
]
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]
onShortcutBar 0
onPulldownMenu 0
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Update Project"
bitmap "tool_default_tool.bmp"
hasBitmap 1
tooltip "Update file references in the Xilinx project .xise file"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
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"$SYNTHESIS_BASE_DIR/../../Scripts/update_ise.pl $DESIGN_NAME.xise $CONCAT_DIR/$DESIGN_NAME.vhd $CONCAT_DIR/$DESIGN_NAME.ucf"
"captureOutput"
"1"
"customPrompt"
""
"initialDir"
"$SYNTHESIS_WORK_DIR"
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"/usr/bin/perl"
"runnableObjectType"
"executable"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx Project Navigator"
bitmap "$HDS_HOME/resources/bitmaps/tools/tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Invokes Xilinx ISE Synthesis Tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
"$SYNTHESIS_WORK_DIR"
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"$SYNTHESIS_HOME/bin/lin64/ise"
"runnableObjectType"
"executable"
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"0"
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)
"TaskSetting"
(SettingsMap
settingsMap [
"exePath"
"/usr/opt/Xilinx/14.7/ISE_DS/ISE/bin/lin64"
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onToolbar 0
enabled 1
hierDepth 3
)
]
)

View File

@ -1,15 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Architecture files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(architecture)

View File

@ -1,17 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of combined VHDL Architecture and Entity files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(entity)
--
%(architecture)

View File

@ -1,19 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name)_config.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Configuration files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Configuration %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
CONFIGURATION %(entity_name)_config OF %(entity_name) IS
FOR %(arch_name)
END FOR;
END %(entity_name)_config;

View File

@ -1,15 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_entity.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Entity files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Entity %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(entity)

View File

@ -1,16 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_pkg_body.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Package Body files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Package Body %(library).%(unit)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
PACKAGE BODY %(entity_name) IS
END %(entity_name);

View File

@ -1,18 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_pkg.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Package Header files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Package Header %(library).%(unit)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
PACKAGE %(entity_name) IS
END %(entity_name);

View File

@ -1,41 +0,0 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Generate"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_generate.bmp"
hasBitmap 1
tooltip "Performs generation of graphics files"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"Generator"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 2
)

View File

@ -1,98 +0,0 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "ModelSim Compile"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_modelsim_compile.bmp"
hasBitmap 1
tooltip "Runs ModelSim compilation"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"ModelSimCompiler"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
"TaskSetting"
(SettingsMap
settingsMap [
"64bit"
"0"
"compAlways"
"0"
"covSwitch"
""
"coverNoSub"
""
"dontAskAgain"
"0"
"enableMFCU"
"1"
"excludePSL"
"0"
"exepath"
"$MODELSIM_HOME"
"logFile"
""
"logicalLib"
"1"
"mapAllLib"
"0"
"mapQuartusIPs"
"1"
"masterCov"
"0"
"peSe"
"EE"
"prevOnly"
"0"
"quartusSimDir"
"$HDS_PROJECT_DIR/QuartusIPSimLibs"
"replayScriptPath"
""
"saveReplayScript"
"0"
"server"
""
"showCmd"
"0"
"transcript"
"1"
"useFlatLibrary"
"0"
"useRemote"
"0"
"useShortName"
"0"
"vhdlSwitches"
" -nologo"
"vlogSwitches"
" -nologo"
]
)
]
PreferedTasks [
]
onShortcutBar 1
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)

View File

@ -1,83 +0,0 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "ModelSim Flow"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_modelsim.bmp"
hasBitmap 1
tooltip "Generate and run entire ModelSim flow"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"flowSettingsDlg"
""
"taskInvocationScript"
""
]
)
]
PreferedTasks [
(preferedMap
preferedEnum 0
preferedSetting "$MODELSIM_HOME"
)
(preferedMap
preferedEnum 2
preferedSetting "ModelSim"
)
]
onShortcutBar 1
onPulldownMenu 1
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTaskRef
TaskName "Generate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:Generate"
)
(HDSTaskRef
TaskName "ModelSim Compile"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
reffedTaskName "USER:ModelSim Compile"
)
(HDSTaskRef
TaskName "ModelSim Simulate"
bitmap ""
hasBitmap 1
tooltip ""
taskSettings [
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
reffedTaskName "USER:ModelSim Simulate"
)
]
)

View File

@ -1,96 +0,0 @@
version "1.1"
HDSTool (HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "ModelSim Simulate"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_modelsim_invoke.bmp"
hasBitmap 1
tooltip "Invokes the ModelSim Simulator"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"1"
"runMethod"
"gui"
"runnableObject"
"ModelSimSimulator"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
"TaskSetting"
(SettingsMap
settingsMap [
"Arguments"
""
"Arguments1"
"do controller.do"
"Arguments2"
"controller.do"
"Communication"
"1"
"DelaySelection"
"typ"
"GlitchGeneration"
"1"
"InitCmd"
"$SIMULATION_DIR\\IND.do"
"LogFile"
""
"RemoteHost"
""
"Resolution"
"ps"
"SdfDelay"
"typ"
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"latest"
"SdfReduce"
"0"
"SdfWarnings"
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"VitalVersion"
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)
]
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onShortcutBar 1
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)

View File

@ -1,162 +0,0 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Prepare for Synthesis"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools\\tool_synthesis.bmp"
hasBitmap 1
tooltip "generates a single file"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"flowSettingsDlg"
""
"taskInvocationScript"
""
]
)
]
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]
onShortcutBar 0
onPulldownMenu 0
onToolbar 1
enabled 1
hierDepth 1
subTasks [
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Generate"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_generate.bmp"
hasBitmap 1
tooltip "Performs generation of graphics files"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"Generator"
"runnableObjectType"
"tcl_plugin"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Concatenate HDL"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools/tool_concatenate.bmp"
hasBitmap 1
tooltip "Appends all HDL files together"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
""
"captureOutput"
"0"
"customPrompt"
""
"initialDir"
""
"promptForRunSettings"
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"gui"
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"Concatenation"
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"tcl_plugin"
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"1"
]
)
"TaskSetting"
(SettingsMap
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"outputFileNameRoot"
"%(concat_file)"
"outputVerilogFileExtension"
"v"
"outputVhdlFileExtension"
"vhd"
"place"
"0"
"specifyDir"
""
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Trim libraries"
bitmap "tool_default_tool.bmp"
hasBitmap 1
tooltip "comment out library declarations for singles file"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
".\\..\\..\\Scripts\\trimLibs.pl %(concat_file).vhd $DESIGN_NAME.vhd"
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"customPrompt"
""
"initialDir"
"$CONCAT_DIR"
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"$HDS_HOME\\resources\\perl\\bin\\perl.exe"
"runnableObjectType"
"executable"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

View File

@ -1,163 +0,0 @@
version "1.1"
HDSFlow (HDSFlow
TaskName "Xilinx Project Navigator"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools\\tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Xilinx Flow"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"flowSettingsDlg"
""
"taskInvocationScript"
""
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 1
subTasks [
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Update.xise"
bitmap "tool_default_tool.bmp"
hasBitmap 1
tooltip "Update file references in the Xilnx project .xise file"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
"$CONCAT_DIR\\..\\..\\Scripts\\update_ise.pl $DESIGN_NAME.xise $CONCAT_DIR\\$DESIGN_NAME.vhd $CONCAT_DIR\\$DESIGN_NAME.ucf"
"captureOutput"
"1"
"customPrompt"
""
"initialDir"
"$ISE_WORK_DIR"
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"$HDS_HOME\\resources\\perl\\bin\\perl.exe"
"runnableObjectType"
"executable"
"useViewSpecific"
"0"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
(HDSTool
hasAssociatedFileExt 0
associatedFileExt ""
TaskName "Xilinx Project navigator"
bitmap "$HDS_HOME\\resources\\bitmaps\\tools\\tool_xilinx_synthesis.bmp"
hasBitmap 1
tooltip "Invokes the Xilinx ISE tool"
taskSettings [
"InternalTaskSetting"
(SettingsMap
settingsMap [
"additionalToolArgs"
"$DESIGN_NAME.xise"
"captureOutput"
"0"
"customPrompt"
""
"descriptiveName"
"FPGA Technology Setup Plugin"
"initialDir"
"$ISE_WORK_DIR"
"isHierarchical"
"0"
"needsSave"
"0"
"pluginInfo"
"FPGA Technology Setup Plug-in v2.0
For additional information, exceptions, compatibility issues and updates, visit SupportNet."
"pluginVersion"
"2.0"
"promptForRunSettings"
"0"
"runMethod"
"gui"
"runnableObject"
"$ISE_HOME\\bin\\nt64\\ise.exe"
"runnableObjectType"
"executable"
"useViewSpecific"
"0"
]
)
"TaskSetting"
(SettingsMap
settingsMap [
"InputFile"
"U:/ELN_board/Board/concat/cursor.vhd"
"RunFromPlugin"
"False"
"RunInteractiveFromPlugIn"
"True"
"createAsciiFile"
"False"
"createBinaryFile"
"False"
"createFiles"
"True"
"createScriptFile"
"False"
"device"
"xc2vp7"
"edifngcPath"
"U:/ELN_board/Board/concat/cursor.vhd"
"effortLevel"
"Standard"
"family"
"virtex2p"
"familyName"
"virtex2p"
"netlist"
"other"
"netlistDefaultView"
"True"
"package"
"fg456"
"simulationModelLanguage"
"Modelsim_VHDL"
"speed"
"-7"
"synthTool"
"Xilinx XST"
"ucfPath"
""
"vendor"
"xilinx"
]
)
]
PreferedTasks [
]
onShortcutBar 0
onPulldownMenu 0
onToolbar 0
enabled 1
hierDepth 3
)
]
)

View File

@ -1,15 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Architecture files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(architecture)

View File

@ -1,17 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name).vhd
DESCRIPTION_START
This is the default template used for the creation of combined VHDL Architecture and Entity files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Architecture %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(entity)
--
%(architecture)

View File

@ -1,19 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_%(arch_name)_config.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Configuration files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Configuration %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
CONFIGURATION %(entity_name)_config OF %(entity_name) IS
FOR %(arch_name)
END FOR;
END %(entity_name)_config;

View File

@ -1,15 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_entity.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Entity files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Entity %(library).%(unit).%(view)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
%(entity)

View File

@ -1,16 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_pkg_body.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Package Body files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Package Body %(library).%(unit)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
PACKAGE BODY %(entity_name) IS
END %(entity_name);

View File

@ -1,18 +0,0 @@
FILE_NAMING_RULE: %(entity_name)_pkg.vhd
DESCRIPTION_START
This is the default template used for the creation of VHDL Package Header files.
Template supplied by Mentor Graphics.
DESCRIPTION_END
--
-- VHDL Package Header %(library).%(unit)
--
-- Created:
-- by - %(user).%(group) (%(host))
-- at - %(time) %(date)
--
-- using Mentor Graphics HDL Designer(TM) %(version)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
PACKAGE %(entity_name) IS
END %(entity_name);

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