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.hdlsidedata
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2024-02-23 13:01:05 +00:00 |
@f@i@f@o
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@f@i@f@o_bram
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@f@i@f@o_one@register
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bram
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bram@Bin@ASCII@Init
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bram@dualport
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2024-02-23 13:01:05 +00:00 |
bram@dualport@writefirst
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2024-02-23 13:01:05 +00:00 |
bram@Hex@ASCII@Init
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2024-02-23 13:01:05 +00:00 |
fifo@bridge
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fifo@bridge@bus@width@adaption
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fifo@bridge@rx@to@tx
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2024-02-23 13:01:05 +00:00 |
fifo@bridge@rx@to@tx@bus@width@adaption@rx@bigger
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fifo@bridge@rx@to@tx@bus@width@adaption@txbigger
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flash@controller
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sdram@controller
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sdram@controller@build@address
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sdram@controller@fsm
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sdram@controller@refresh@counter
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sdram@controller@s@r
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sdram@controller@sample@data@in
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sdram@controller@store@data
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sdram@controller@timings@shift@register
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2024-02-23 13:01:05 +00:00 |
_bram._epf
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_bramBinASCIIInit._epf
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2024-02-23 13:01:05 +00:00 |
_bramdualport._epf
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2024-02-23 13:01:05 +00:00 |
_bramdualportwritefirst._epf
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_bramHexASCIIInit._epf
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_fifo_bram._epf
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_fifo_oneregister._epf
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_fifo._epf
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2024-02-23 13:01:05 +00:00 |
_fifobridge._epf
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2024-02-23 13:01:05 +00:00 |
_fifobridgebuswidthadaption._epf
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_fifobridgerxtotx._epf
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2024-02-23 13:01:05 +00:00 |
_fifobridgerxtotxbuswidthadaptionrxbigger._epf
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2024-02-23 13:01:05 +00:00 |
_fifobridgerxtotxbuswidthadaptiontxbigger._epf
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_flashcontroller._epf
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_sdramcontroller._epf
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2024-02-23 13:01:05 +00:00 |
_sdramcontrollerbuildaddress._epf
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_sdramcontrollerfsm._epf
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2024-02-23 13:01:05 +00:00 |
_sdramcontrollerrefreshcounter._epf
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2024-02-23 13:01:05 +00:00 |
_sdramcontrollersampledatain._epf
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_sdramcontrollersr._epf
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2024-02-23 13:01:05 +00:00 |
_sdramcontrollerstoredata._epf
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2024-02-23 13:01:05 +00:00 |
_sdramcontrollertimingsshiftregister._epf
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2024-02-23 13:01:05 +00:00 |